JPH04180249A - Integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a desired high-voltage IC without damaging the characteristics of a element device to be used in a high-voltage IC, by a method wherein high impurity density buried layer is provided with a structure where the layer does not directly contact with a p-type semiconductor substrate. CONSTITUTION:Formed is a first n-type epitaxial layer 11 whose resistivity is determined by the withstanding voltage required on a p-type semiconductor substrate 11. Then, an n-type buried layer 2 with a high impurity concentration is formed on a specified position within the epitaxial layer 11, and a second n-type epitaxial layer 3 is formed to bury the n-type buried layer 2. Then, an isolation area 4 is formed which extends to the p-type semiconductor substrate across the first n-type epitaxial layer 11 and the second n-type epitaxial layer 3. Then, a base region 5 and emitter region 6 for a transistor are formed on the island region that is formed by the isolation area 4, and an n-type collector-wall region 7 with a high impurity concentration is formed. Thus, it is possible to obtain a sufficient high withstanding voltage without making the resistivity of the buried layer 2 high.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high breakdown voltage monolithic integrated circuit device, and particularly provides an integrated circuit device that can obtain large t5L and high breakdown voltage characteristics.

[Conventional technology]

Originally, a high-voltage monolithic integrated circuit device C (hereinafter referred to as high-voltage XC) with the cross-sectional structure shown in Figure 2 has been proposed. In the figure, Illt/i1) type semiconductor substrate, (
21 is n-type high impurity 7I degree buried layer, ・31 is n
Cedar epitaxial layer, 14) is p-type isolation @ region, 51 is p
Sugi pace isolated @臘, 16) is the n-type that becomes the collector @ area.
Impurity concentration emitter expansion ratio, 71Hn Sugi Nao impurity level collector wall ratio, (8) indicates a protective film, and (9) indicates an electrode.

In order to outperform the above-mentioned high breakdown voltage ICa, the n-type epitaxial layer 31 is formed to have a specific resistance and a large thickness (usually 20 μm to 50 μm) according to the required breakdown voltage.

In addition, in order to improve the 11EfIL characteristics of transistors, diodes, etc. used in high voltage ICKOe, a collector wall head plate (71) with a high n-type impurity concentration is sometimes formed so as to reach the buried layer 121. Problems to be Solved by the Invention] Since the conventional high voltage XC was configured as described above,
N-type high impurity concentration entrainment layer (2) and p-type semiconductor substrate 11
The breakdown voltage (!ft pressure) of the PN junction tlol formed by
The breakdown voltage of the IC is determined, and therefore, in order to obtain a high breakdown voltage of 500V or more, it is necessary to make the specific resistance of the p-type semiconductor substrate and the inner region of the buried layer high. If the specific resistance is made high, the IE style customization of transistors, diodes, etc. formed in the high-voltage structure C will be impaired, or high-voltage ICs formed with a p-type base head, an n-type collector, and a p-type semiconductor substrate will be damaged. There is a problem in that the effect of preventing the formation of anomalous transistors is diminished.

This invention was made in order to solve the above-mentioned problems, and it is a monolithic high pressure I with a structure that can obtain a sufficiently high breakdown voltage without making the specific resistance of the buried layer high.
The purpose is to obtain C.

[Means for resolving the problem] In order to have a structure in which the high breakdown voltage ICi according to the present invention does not directly form a PN base with the p-type semiconductor substrate and the buried layer, the following steps are taken.
An n-type paper impurity concentration epitaxial layer is formed on a p-type semiconductor substrate, and then an n-cedar buried layer is formed on this n-cedar epitaxial layer.

[Effect]

In the present invention, the breakdown of the high voltage I
It is now possible to obtain a high breakdown voltage of 5oOV or more, and because the buried layer is formed with a sufficiently high impurity concentration (low specific resistance), annium devices such as transistors and diodes are also suitable. Current characteristics can be obtained, and a sufficiently large effect 2q can be achieved in preventing the formation of parasitic transistors.

〔Example〕

Hereinafter, a warehouse diagram as an example of this invention will be explained.

A first embodiment of a monolithic pressure-resistant construction C according to the present invention will be described with reference to FIG.

FIG.
Major % of C! It is a sectional view showing a dying process.

In addition, the same line number or 1 is attached to the same item or equivalent portion as the conventional one in d11 in Figure 1.

1S Figure 1 1ot/! A first n-type epitaxial layer d11 whose specific resistance is determined by the withstand voltage is formed on a p-type semiconductor substrate.

Subsequently, a predetermined portion of the epitaxial layer dυ is formed as an n-type high impurity buried layer 121. Kyu VC Figure 1 1
A second n-type epitaxial layer 3 is formed by epitaxial growth to bury the 4<s” type buried layer 12) shown in b+.
form 1. Subsequently, as shown in FIG. 1, an isolation layer 141 is formed across the first n-type epitaxial layer dυ and the second n-type epitaxial layer 1311 to reach the p-type semiconductor substrate 111.

Next, for this minute 1@@[(41, the transistor pace is opened in the 14 head area 1!11 and the emitter@
Form area (6). Next is n Sugi Taka impurity? Forms Ik degree collector wall territory [+71. Next, as shown in FIG. 1 (the ridges), a surface film (8) and an electrode (91) are formed to obtain the desired high pressure-resistant structure C.

In the high-voltage structure C having such a structure, P formed between the p-type semiconductor substrate 11 and the n-type semiconductor region dυ of the film 1 is
Since a sufficiently high resistivity of the n-type semiconductor Uυ can be selected for the I contact 1121, a desired high breakdown voltage can be achieved. In addition, the current characteristics of elemental devices such as transistors and diodes that are used under high pressure conditions and the effect of preventing the formation of parasitic transistors can be achieved without getting used to the current characteristics and the effect of preventing the formation of parasitic transistors. characteristics can be obtained. Therefore, the cylinder pressure work C of this implementation row
Compared to the conventional method, by simply adding the step of forming the second n-type semiconductor mzuII, it is possible to obtain a high withstand voltage that could not be obtained conventionally, and to reduce the loss of characteristics, especially current characteristics, of elemental devices such as transistors and diodes. High withstand voltage I
A high breakdown voltage IC can be obtained that can prevent the generation of parasitic transistors that are likely to occur in C.

〔Effect of the invention〕

As described above, according to the present invention, the high impurity concentration buried layer has a structure that does not come in direct contact with the p-type semiconductor substrate, thereby improving the characteristics of element devices used in high voltage CK, especially large current and low Vcs. (aat) There is an effect that the desired surface pressure-resistant work C can be obtained without damaging the custom order.

[Brief explanation of drawings]

FIG. 1 tjL+ to tdl is a sectional view f showing the manufacturing process of a high pressure IC according to an embodiment of the present invention, and FIG. In the figure, %: Otori' is the p-type semiconductor substrate, 21 is the ni high impurity concentration buried layer, 31 is the n-type epitaxial layer of porridge 2, 4) is the p-type portion 41@ area, +51 is the paste head, 1
6) is the emitter @ region, 171 is the n-type high impurity concentration collector wall @ region, 18) is the protective film, I9) is the electrode,
tlQl represents a PN junction, an represents the l-th n-type epitaxial layer, and a21 represents a PM junction. In Figure 1, the same reference numerals are the same and indicate the corresponding parts.

Claims (1)

[Claims] A semiconductor substrate having a first conductivity type, a first semiconductor layer having a second conductivity type formed on the semiconductor substrate, and a semiconductor layer having the second conductivity type formed in a predetermined portion of the first semiconductor layer. a second semiconductor region having an impurity concentration; a third semiconductor layer having a second conductivity type formed so as to bury the second region; crossing the first semiconductor layer and the third semiconductor layer; An integrated circuit device comprising at least an isolation region having a first conductivity type that reaches a semiconductor substrate.