JPH04177823A - Semiconductor manufacturing device - Google Patents

Semiconductor manufacturing device

Info

Publication number
JPH04177823A
JPH04177823A JP30689190A JP30689190A JPH04177823A JP H04177823 A JPH04177823 A JP H04177823A JP 30689190 A JP30689190 A JP 30689190A JP 30689190 A JP30689190 A JP 30689190A JP H04177823 A JPH04177823 A JP H04177823A
Authority
JP
Japan
Prior art keywords
wafer
spin
edge chip
semiconductor manufacturing
image input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30689190A
Other languages
Japanese (ja)
Other versions
JP2674874B2 (en
Inventor
Ken Futsukaichi
二日市 研
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP2306891A priority Critical patent/JP2674874B2/en
Publication of JPH04177823A publication Critical patent/JPH04177823A/en
Application granted granted Critical
Publication of JP2674874B2 publication Critical patent/JP2674874B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Coating Apparatus (AREA)

Abstract

PURPOSE:To prevent the break or crack of a wafer by providing an image input part for detecting the edge chip of a wafer inside an application treatment cup, and finding out the edge chip before rotational application and stopping the wafer from rotating. CONSTITUTION:The wafer 1 is held by vacuum with a spin chuck 6, and a chemical is dropped on the wafer 1 in a cup, and the wafer 1 is spin-coated by a spin motor 7. Prior to this spin-coating, an image processor 3 detects the existence of the edge chip with the data inputted from an image input part 2, and sends the detection signal to an operation part 4, and further sends the data made in the operation part 4 to the CPU 5, and controls the operation of the processor not to spin-coat the wafer which has an edge chip. Hereby, the break or the cracks of the wafer can be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体製造装置に関し、特に半導体基板(以下
ウェハーと称す)へのフォトレジストの塗布装置や百合
露光後の現像装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to semiconductor manufacturing equipment, and more particularly to a photoresist coating apparatus for semiconductor substrates (hereinafter referred to as wafers) and a developing apparatus after exposure.

〔従来の技術〕[Conventional technology]

従来、この種の半導体製造装置では、スピンチャック上
に搬送されたウェハーに対しエツジチップ(ウェハー周
辺部の割れ、欠け)の有無を検出する機能は設けられて
おらず、従って、エツジチップの有無に関係なくウェハ
ーをスピンチャックに真空吸着し、薬液を滴下して回転
塗布処理を行っていた。
Conventionally, this type of semiconductor manufacturing equipment has not been equipped with a function to detect the presence or absence of edge chips (cracks or chips in the periphery of the wafer) on the wafer transferred onto the spin chuck. Instead, the wafer was vacuum-adsorbed onto a spin chuck, and a chemical solution was dropped onto it for spin coating.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の半導体製造装置では、エツジチップのあ
るウェハーで回転処理を行なうと、ウェハーの割れやク
ラックが発生しやすいという問題点があった。
The conventional semiconductor manufacturing apparatus described above has a problem in that when a wafer with edge chips is subjected to rotation processing, the wafer is likely to break or crack.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体製造装置は、塗布処理カップ内にウェハ
ーのエツジチップを検出するための画像入力部を設け、
入力部からの信号に基づいてエツジチップを検出し、こ
の検出信号を演算部に送り、演算部で作られたデータを
CPU部に送り、装置を制御する機能を備えている。
The semiconductor manufacturing apparatus of the present invention includes an image input section for detecting edge chips of the wafer in the coating processing cup,
It has a function of detecting an edge chip based on a signal from an input section, sending this detection signal to a calculation section, sending data created by the calculation section to a CPU section, and controlling the device.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の概略構成図である。ウェハ
ー1はスピンチャック6に真空吸着され、カップの中で
薬液を滴下され、スピンモータ7で回転塗布処理される
。この回転塗布処理前に、画像入力部2より入力したデ
ータて画像処理部3がエツジチップの有無を検出し、検
出信号を演算部4に送り、さらに演算部4で作られたデ
ータをCPU部5に送り、エツジチップを有するウェハ
ーを回転処理しないように処理装置の動作を制御する。
FIG. 1 is a schematic diagram of an embodiment of the present invention. The wafer 1 is vacuum-adsorbed by a spin chuck 6, a chemical solution is dropped into a cup, and a spin coating process is performed by a spin motor 7. Before this spin coating process, the image processing section 3 detects the presence or absence of an edge chip using the data input from the image input section 2, sends a detection signal to the calculation section 4, and further sends the data created by the calculation section 4 to the CPU section 5. The operation of the processing equipment is controlled so that wafers with edge chips are not rotated.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、回転塗布処理前にエツジ
チップを発見することによりウェハーを回転させないよ
うにし、ウェハーの割れやクラックを防ぐことができる
という効果を有する。
As explained above, the present invention has the effect of preventing the wafer from rotating by detecting edge chips before the spin coating process, thereby preventing cracks and cracks in the wafer.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の概略構成図である。 1・・・ウェハー、2・・・画像入力部、3・・・画像
処理部、4・・・演算部、5・CPU部、6・・・スピ
ンチャック、7・・スピンモータ。
FIG. 1 is a schematic diagram of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Wafer, 2... Image input section, 3... Image processing section, 4... Arithmetic section, 5. CPU section, 6... Spin chuck, 7... Spin motor.

Claims (1)

【特許請求の範囲】[Claims]  半導体基板を真空吸着し、薬液を滴下して回転塗布処
理する半導体製造装置において、処理カップ内に設置さ
れたウェハーの画像入力部と、処理カップ外に設置され
た画像処理部及び演算部と、演算部からのデータにより
装置を制御するCPU部とを有することを特徴とする半
導体製造装置。
In a semiconductor manufacturing apparatus that vacuum-chucks a semiconductor substrate, drips a chemical solution, and performs a spin coating process, a wafer image input unit installed in a processing cup, an image processing unit and a calculation unit installed outside the processing cup, A semiconductor manufacturing device comprising: a CPU section that controls the device using data from a calculation section.
JP2306891A 1990-11-13 1990-11-13 Semiconductor manufacturing equipment Expired - Fee Related JP2674874B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2306891A JP2674874B2 (en) 1990-11-13 1990-11-13 Semiconductor manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2306891A JP2674874B2 (en) 1990-11-13 1990-11-13 Semiconductor manufacturing equipment

Publications (2)

Publication Number Publication Date
JPH04177823A true JPH04177823A (en) 1992-06-25
JP2674874B2 JP2674874B2 (en) 1997-11-12

Family

ID=17962502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2306891A Expired - Fee Related JP2674874B2 (en) 1990-11-13 1990-11-13 Semiconductor manufacturing equipment

Country Status (1)

Country Link
JP (1) JP2674874B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592295A (en) * 1995-05-08 1997-01-07 Memc Electronic Materials, Inc. Apparatus and method for semiconductor wafer edge inspection
US6485782B2 (en) * 1999-04-19 2002-11-26 Tokyo Electron Limited Coating film forming method and coating apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62250968A (en) * 1986-04-23 1987-10-31 Hitachi Ltd Coating apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62250968A (en) * 1986-04-23 1987-10-31 Hitachi Ltd Coating apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592295A (en) * 1995-05-08 1997-01-07 Memc Electronic Materials, Inc. Apparatus and method for semiconductor wafer edge inspection
US6485782B2 (en) * 1999-04-19 2002-11-26 Tokyo Electron Limited Coating film forming method and coating apparatus

Also Published As

Publication number Publication date
JP2674874B2 (en) 1997-11-12

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