JPH04177764A - Forming method of schottky electrode - Google Patents

Forming method of schottky electrode

Info

Publication number
JPH04177764A
JPH04177764A JP30379890A JP30379890A JPH04177764A JP H04177764 A JPH04177764 A JP H04177764A JP 30379890 A JP30379890 A JP 30379890A JP 30379890 A JP30379890 A JP 30379890A JP H04177764 A JPH04177764 A JP H04177764A
Authority
JP
Japan
Prior art keywords
metal
film
nitride film
nitrogen
metal nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30379890A
Other languages
Japanese (ja)
Inventor
Tomohiro Nemoto
智裕 根本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eneos Corp
Original Assignee
Nippon Mining Co Ltd
Nikko Kyodo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mining Co Ltd, Nikko Kyodo Co Ltd filed Critical Nippon Mining Co Ltd
Priority to JP30379890A priority Critical patent/JPH04177764A/en
Publication of JPH04177764A publication Critical patent/JPH04177764A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To reduce internal resistance by a method wherein, after a conductive metal nitride film is formed by evaporating first metal on III-V compound semiconductor, in an atmosphere of nitrogen or nitrogen compound gas, a metal film is formed by evaporating second metal on the metal nitride film in a vacuum. CONSTITUTION:A metal nitride film 6A is formed by evaporating first metal on semiconductor composed of III-V compound semiconductor, in an atmosphere of nitrogen or nitrogen compound gas. A metal film 6B is formed by evaporating second metal on the metal nitride film 6A in a vacuum. Since the metal nitride film 6A is formed by reactive evaporation, the compound semiconductor is not damaged, and since the second metal is evaporated in a vacuum, the increase of internal resistance of a gate electrode can be prevented.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は窒化チタン(TiN)からなるショットキー電
極の形成方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for forming a Schottky electrode made of titanium nitride (TiN).

[従来の技術] 金属・半導体接合障壁であるショットキー接合障壁を用
いたショットキー型半導体装置は、高速性に優れ、高周
波回路弯に広く利用されている。
[Prior Art] A Schottky semiconductor device using a Schottky junction barrier, which is a metal-semiconductor junction barrier, has excellent high-speed performance and is widely used in high-frequency circuits.

特にGaAs半専体半月体、ショットキー電極をゲート
電極として用いた電界効果トランジスタ(以下、MES
FETという)は、マイグロ波帯での能動素子として優
れた特性を示すものである。
In particular, field effect transistors (hereinafter referred to as MES) using GaAs semi-dedicated crescents and Schottky electrodes as gate electrodes
(FET) exhibits excellent characteristics as an active element in the microwave band.

このようなMESFETのゲート電極として、G a 
A、 s半導体と接する最下層にA]、T1などの金属
層を用いることが多い。この場合、A1、T1などの金
属層が半導体中へ拡散しやすいため、M E S FE
 Tの動作、特に高温での動作が安定しない。
As the gate electrode of such MESFET, Ga
A, sA metal layer such as T1 is often used as the bottom layer in contact with the semiconductor. In this case, since metal layers such as A1 and T1 are likely to diffuse into the semiconductor, M E S FE
The operation of the T, especially at high temperatures, is unstable.

この拡散防止のためにTiN、TaN、ZrN、WNな
どの導電性の金属窒化物をショットキー電極の最下層に
用いることが検討されている。この場合に、これらの金
属窒化物は電気伝導率が低いため、高い電導率を有する
A1、A IJなどの金属との多層構造にすることが多
い。
In order to prevent this diffusion, the use of conductive metal nitrides such as TiN, TaN, ZrN, and WN as the bottom layer of the Schottky electrode is being considered. In this case, since these metal nitrides have low electrical conductivity, they often have a multilayer structure with metals such as A1 and AIJ that have high electrical conductivity.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、反応性スパッタリング法などによりTj
Hなどの導電性の金属窒化物を作成する場合、揮発成分
を含む化合物半導体の表面がプラズマガスにさらされる
ため、その表面に多大なダメージが与えられ半導体装置
の特性の劣化を招くこととなる。
However, Tj
When creating conductive metal nitrides such as H, the surface of a compound semiconductor containing volatile components is exposed to plasma gas, which causes significant damage to the surface and causes deterioration of the characteristics of semiconductor devices. .

また、反応性スパッタリング法などにより導電性の金属
窒化物を作成した後に、その表面にA1、T iなとの
酸化されやすい金属を形成する場合、金属窒化物の表面
に大気中での酸化などにともなう酸化物層が形成される
。この酸化物層のため、ショットキー電極の内部抵抗が
増大するという問題があった。
In addition, when forming a metal that is easily oxidized such as A1 or Ti on the surface of a conductive metal nitride using a reactive sputtering method or the like, the surface of the metal nitride may be exposed to oxidation in the atmosphere. An associated oxide layer is formed. This oxide layer causes a problem in that the internal resistance of the Schottky electrode increases.

本発明の目的は、化合物半導体の表面にダメージを与え
ず、かつ、内部抵抗の充分に低いショットキー電極の形
成方法を提供することにある。
An object of the present invention is to provide a method for forming a Schottky electrode that does not damage the surface of a compound semiconductor and has a sufficiently low internal resistance.

[課題を解決するための手段] 本発明によるショットキー電極の形成方法は、III−
V族化合物半導体からなる半導体上に、窒素または窒素
化合物ガスの雰囲気下で第1の金属を蒸着して導電性の
金属窒化物膜を形成し、次に、該金属窒化物膜上に真空
下で第2の金属を蒸着することで金属膜を形成するもの
である。
[Means for Solving the Problems] The method for forming a Schottky electrode according to the present invention includes III-
A first metal is deposited on a semiconductor made of a group V compound semiconductor in an atmosphere of nitrogen or nitrogen compound gas to form a conductive metal nitride film, and then a conductive metal nitride film is deposited under vacuum on the metal nitride film. A metal film is formed by depositing a second metal.

なお、前記第1の金属がチタンであり、前記第2の金属
がアルミニウムであることが望ましい。
Note that it is preferable that the first metal is titanium and the second metal is aluminum.

また、前記窒化金属膜の形成と前記第2の金属の蒸着は
同一の真空容器内で連続して行うことが望ましい。
Further, it is preferable that the formation of the metal nitride film and the vapor deposition of the second metal are performed continuously in the same vacuum vessel.

[作用] 本発明の構成によれば、反応性蒸着により金属窒化物膜
を形成するため、化合物半導体にダメージを与えること
はない。同時に、第2の金属を真空下で蒸着するため、
ゲート電極の内部抵抗が増大することはない。
[Function] According to the configuration of the present invention, since the metal nitride film is formed by reactive vapor deposition, no damage is caused to the compound semiconductor. At the same time, a second metal is deposited under vacuum;
The internal resistance of the gate electrode does not increase.

〔実施例1 以下、実施例により本発明をより詳細に説明する。本発
明による実施例であるMESFETの断面構造を第1図
に示す。
[Example 1] Hereinafter, the present invention will be explained in more detail with reference to Examples. FIG. 1 shows a cross-sectional structure of a MESFET according to an embodiment of the present invention.

半絶縁性GaAs基板1の一主面」−にN型のGaAs
からなるバッファ層2(ノンドープ、キャリア濃度1,
0E14/−以下、厚さ2μm)およびN型のGaAs
からなるチャンネル層3 (Slドープ、キャリア濃度
3.0E17/CI献厚さ0.15μm)を順次、気相
成長法により形成する。 (イオン注入法によりチャン
ネル層3を形成することもできる。) このチャンネル層3上に所定間隔(8μm)を離間して
オーミックコンタクトを形成する金属からなるソース電
極4およびドレイン電極5を形成する。
N-type GaAs is deposited on one main surface of the semi-insulating GaAs substrate 1.
Buffer layer 2 (non-doped, carrier concentration 1,
0E14/- or less, thickness 2 μm) and N-type GaAs
A channel layer 3 (Sl doped, carrier concentration 3.0E17/CI thickness 0.15 μm) is sequentially formed by vapor phase growth. (The channel layer 3 can also be formed by ion implantation.) A source electrode 4 and a drain electrode 5 made of metal are formed on the channel layer 3 at a predetermined interval (8 μm) to form an ohmic contact.

このソース電極4およびドレイン電極5の間のチャンネ
ル層3」−にゲート?’ii極長に相当する1μm幅の
開口を有するレジスト腺(図示せず)を全面に形成する
The channel layer 3'' between the source electrode 4 and the drain electrode 5 is connected to the gate? A resist gland (not shown) having a 1 μm wide opening corresponding to the maximum length is formed on the entire surface.

この基板を蒸着装置の蒸着室内に装着し、蒸着室を1 
、  OE −7t、、orr以下の高真空状態にする
This substrate is installed in the evaporation chamber of the evaporation equipment, and the evaporation chamber is
, OE -7t, , create a high vacuum state below orr.

=4− その後、窒素ガスを導入して1. 0E−4torr程
度の圧力とした状態で、電子ビームによりチタン金属を
溶解気化させて蒸着を行う。これにより、金属窒化物膜
である窒化チタン(T ]N)膜6Aを50nmの厚さ
に形成する。次に、蒸着室を再び1 、  OE −7
torr以下の高真空状態し、電子ビームによりアルミ
ニウム金属を溶解気化させて蒸着を行う。これにより、
窒化チタン(T i N)膜6A上に金属膜(アルミニ
ウム(ハ1)膜6B)を400nmの厚さに形成する。
=4- Then, nitrogen gas was introduced and 1. Vapor deposition is performed by melting and vaporizing titanium metal using an electron beam under a pressure of approximately 0E-4 torr. As a result, a titanium nitride (T 2 ]N) film 6A, which is a metal nitride film, is formed to a thickness of 50 nm. Next, the deposition chamber was set to 1, OE-7 again.
Vapor deposition is performed by melting and vaporizing aluminum metal using an electron beam under a high vacuum state of less than torr. This results in
A metal film (aluminum (C1) film 6B) is formed to a thickness of 400 nm on the titanium nitride (T i N) film 6A.

その後、蒸着室から基板を取りだしてレジスト膜を除去
することでゲート電極6を形成する。
Thereafter, the gate electrode 6 is formed by taking out the substrate from the deposition chamber and removing the resist film.

以上の]1程で、MESFETが作成されるが、FET
以外にもショットキー電極を用いるダイオードなどにも
本発明は利用できる。
The MESFET is created in step 1 above, but the FET
In addition to this, the present invention can also be applied to diodes using Schottky electrodes.

また、基板としてGaAsを用いたがIn、GaAs、
I n Pなどを用いることもできる。窒化チタンを金
属窒化物とし用いているが、タンタル(Ta:)、ジル
コニウム(Zr)、タングステン(W)などの窒化物を
用いることもできる。
In addition, although GaAs was used as the substrate, In, GaAs,
I n P or the like can also be used. Although titanium nitride is used as the metal nitride, nitrides such as tantalum (Ta), zirconium (Zr), and tungsten (W) can also be used.

A− 〔発明の効果〕 以上、説明したように本発明によるショットキー電極の
形成方法は、Ill −V族化合物半導体からなる半導
体上に、窒素または窒素化合物ガスの雰囲気下で第1の
金属を蒸着して導電性の金属窒化物膜を形成し、次に、
該金属窒化物膜上に真空下で第2の金属を蒸着すること
で金属膜を形成するものである。
A- [Effects of the Invention] As explained above, the method for forming a Schottky electrode according to the present invention includes forming a first metal on a semiconductor made of an Ill-V group compound semiconductor in an atmosphere of nitrogen or nitrogen compound gas. evaporate to form a conductive metal nitride film, then
A metal film is formed by depositing a second metal on the metal nitride film under vacuum.

したがって、反応性蒸着により金属窒化物膜を形成する
ため、化合物半導体にダメージを与えることはない。同
時に、第2の金属を真空下で蒸着するため、ショットキ
ー電極の内部抵抗か増大することはない。このため、優
れた特性のショットキー電極を作成することができる。
Therefore, since the metal nitride film is formed by reactive vapor deposition, no damage is caused to the compound semiconductor. At the same time, since the second metal is deposited under vacuum, the internal resistance of the Schottky electrode does not increase. Therefore, a Schottky electrode with excellent characteristics can be created.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明による実施例であるM E S FE
Tの断面構造を示す図である。 図中において、 ] 半絶縁性GaAs基板、 2・バッファ層、  3・・チャンネル層、4・・ソー
ス電極、  5・・・ドレイン電極、6 ・ゲート電極
、 6A・・窒化チタン(T i N)膜、6B・アルミニ
ウム(A1)膜。
FIG. 1 shows an M E S FE which is an embodiment according to the present invention.
It is a figure showing the cross-sectional structure of T. In the figure, ] Semi-insulating GaAs substrate, 2. Buffer layer, 3. Channel layer, 4. Source electrode, 5. Drain electrode, 6. Gate electrode, 6A.. Titanium nitride (T i N). Film, 6B aluminum (A1) film.

Claims (2)

【特許請求の範囲】[Claims] (1)III−V族化合物半導体からなる半導体上に、窒
素または窒素化合物ガスの雰囲気下で第1の金属を蒸着
して導電性の金属窒化物膜を形成し、次に、該金属窒化
物膜上に真空下で第2の金属を蒸着することで金属膜を
形成することを特徴とするショットキー電極の形成方法
(1) A first metal is deposited on a semiconductor made of a III-V group compound semiconductor in an atmosphere of nitrogen or nitrogen compound gas to form a conductive metal nitride film, and then the metal nitride is A method for forming a Schottky electrode, comprising forming a metal film by depositing a second metal on the film under vacuum.
(2)前記第1の金属がチタンであり、前記第2の金属
がアルミニウムであることを特徴とする第1項記載のシ
ョットキー電極の形成方法。
(2) The method for forming a Schottky electrode according to item 1, wherein the first metal is titanium and the second metal is aluminum.
JP30379890A 1990-11-13 1990-11-13 Forming method of schottky electrode Pending JPH04177764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30379890A JPH04177764A (en) 1990-11-13 1990-11-13 Forming method of schottky electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30379890A JPH04177764A (en) 1990-11-13 1990-11-13 Forming method of schottky electrode

Publications (1)

Publication Number Publication Date
JPH04177764A true JPH04177764A (en) 1992-06-24

Family

ID=17925429

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30379890A Pending JPH04177764A (en) 1990-11-13 1990-11-13 Forming method of schottky electrode

Country Status (1)

Country Link
JP (1) JPH04177764A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013021822A1 (en) * 2011-08-05 2013-02-14 シャープ株式会社 Gan-based compound semiconductor device
JP2014500620A (en) * 2010-11-10 2014-01-09 クリー インコーポレイテッド Contact pad and manufacturing method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014500620A (en) * 2010-11-10 2014-01-09 クリー インコーポレイテッド Contact pad and manufacturing method thereof
US9607955B2 (en) 2010-11-10 2017-03-28 Cree, Inc. Contact pad
WO2013021822A1 (en) * 2011-08-05 2013-02-14 シャープ株式会社 Gan-based compound semiconductor device
JP2013038180A (en) * 2011-08-05 2013-02-21 Sharp Corp GaN-BASED COMPOUND SEMICONDUCTOR DEVICE

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