JPH04169984A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH04169984A
JPH04169984A JP2297549A JP29754990A JPH04169984A JP H04169984 A JPH04169984 A JP H04169984A JP 2297549 A JP2297549 A JP 2297549A JP 29754990 A JP29754990 A JP 29754990A JP H04169984 A JPH04169984 A JP H04169984A
Authority
JP
Japan
Prior art keywords
power supply
ram
supply terminal
side power
electrode side
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2297549A
Other languages
Japanese (ja)
Inventor
Takao Ichihashi
隆雄 市橋
Shuji Yamada
修治 山田
Masashi Matsumoto
正士 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Mita Industrial Co Ltd
Original Assignee
Mita Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mita Industrial Co Ltd filed Critical Mita Industrial Co Ltd
Priority to JP2297549A priority Critical patent/JPH04169984A/en
Publication of JPH04169984A publication Critical patent/JPH04169984A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Static Random-Access Memory (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To make it possible to backup an internal volatile memory and to reduce also power consumption by connecting the power supply terminal of the non-volatile memory electrically independently of the power supply terminals of other constitution parts. CONSTITUTION:An one-chip microcomputer is constituted of a CPU 1, a ROM 2, a RAM 3, an I/O port 4 and other apparatuses 5. A RAM-only positive electrode side power supply terminal 13 connected electrically independently of a main positive electrode side power supply terminal 11 is used as a positive electrode side power supply terminal for a RAM 3 and a RAM-only negative electrode side power supply terminal 14 connected electrically independently of a main negative electrode side power supply terminal 12 is used as a negative side power supply terminal for the RAM 3. Consequently, the internal RAM 3 is backed up and its power consumption can be reduced as compared to the backup of the whole microcomputer.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、たとえばワンチップマイコン等の揮発性メ
モリを有する半導体集積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit having a volatile memory, such as a one-chip microcomputer.

〔従来の技術] ワンチップマイコンは、通常、CPUSROM。[Conventional technology] One-chip microcontrollers are usually CPUROM.

RAM、I10ポート等で構成されている。そして、こ
れら各構成部の電源端子は共通化されている。
It consists of RAM, I10 port, etc. The power terminals of these components are shared.

[発明が解決しようとする課題] 上記従来のワンチップマイコンでは、マイコンの電源が
切れると、揮発性メモリであるRAMに記憶されている
データは消去されてしまう。したがって、マイコンの電
源が切れても保持させておきたいデータを取り扱う場合
には、外部にバックアップ専用のRAMを設けなければ
ならない。
[Problems to be Solved by the Invention] In the conventional one-chip microcomputer described above, when the microcomputer is powered off, data stored in the RAM, which is a volatile memory, is erased. Therefore, when handling data that should be retained even when the microcomputer is powered off, it is necessary to provide an external RAM exclusively for backup.

通常、ワンチップマイコン内部のRAMの容量が128
〜512バイトであるのに対して、外部RAMの容量は
IKバイト以上であり、バックアップするデータ量が少
ない場合には、バックアップ専用の外部RAMの未使用
記憶エリアが多くなり、使用効率が非常に悪いという問
題がある。
Usually, the RAM capacity inside a one-chip microcontroller is 128
~512 bytes, whereas the external RAM capacity is more than IK bytes, and if the amount of data to be backed up is small, there will be a large amount of unused storage area in the external RAM dedicated to backup, resulting in very inefficient usage. The problem is that it's bad.

一方、マイコン内部のRAMをバックアップしようとす
れば、マイコン全体をバックアップしなければならず、
余分な電力を消費することになる。
On the other hand, if you want to back up the RAM inside the microcomputer, you have to back up the entire microcomputer.
This will consume extra power.

この発明は、内部の揮発性メモリをバックアップでき、
しかも消費電力も半導体集積回路全体をバックアップす
る場合に比べて少なくてすむ半導体集積回路を提供する
ことを目的とする。
This invention can back up internal volatile memory,
Moreover, it is an object of the present invention to provide a semiconductor integrated circuit that consumes less power than when backing up the entire semiconductor integrated circuit.

[課題を解決するための手段] この発明による半導体集積回路は、揮発性メモリを有す
る半導体集積回路において、揮発性メモリの電源端子が
他の構成部の電源端子とは電気的に独立して設けられて
いることを特徴とする。
[Means for Solving the Problems] A semiconductor integrated circuit according to the present invention is a semiconductor integrated circuit having a volatile memory, in which a power supply terminal of the volatile memory is provided electrically independently from power supply terminals of other components. It is characterized by being

[発明の作用] この発明による半導体集積回路では、揮発性メモリの電
源端子が他の構成部の電源端子とは電気的に独立して設
けられている。したがって、揮発性メモリのみをバック
アップすることができる。
[Operation of the Invention] In the semiconductor integrated circuit according to the present invention, the power supply terminal of the volatile memory is provided electrically independent of the power supply terminals of other components. Therefore, only volatile memory can be backed up.

[実施例] 以下、図面を参照して、この発明をワンチップマイコン
に適用した場合の実施例について説明する。
[Example] Hereinafter, an example in which the present invention is applied to a one-chip microcomputer will be described with reference to the drawings.

図面は、ワンチップマイコンの構成を示している。ワン
チップマイコンは、CPUI、ROM2、RAM3、I
10ポート4およびその他の機器5から構成されている
The drawing shows the configuration of a one-chip microcomputer. One-chip microcomputer has CPUI, ROM2, RAM3, I
It consists of 10 ports 4 and other devices 5.

CPUI、ROM2、I10ボート4およびその他の機
器5の正極側電源端子としては、共通の主正極側電源端
子11が用いられ、負極側電源端子としては共通の主負
極側電源端子12が用いられている。
A common main positive power terminal 11 is used as the positive power terminal for the CPU, ROM 2, I10 boat 4, and other devices 5, and a common main negative power terminal 12 is used as the negative power terminal. There is.

RAM3の正極側電源端子としては、主正極側電源端子
11とは電気的に独立して設けられたRAM専用正極側
電源端子13が用いられ、負極側電源端子としては主負
極側電源端子12とは電気的に独立して設けられたRA
M専用負極側電源端子14が用いられている。RAM3
の負極側電源端子は、主負極側電源端子12と共通であ
ってもよい。
As the positive power terminal of the RAM 3, a RAM exclusive positive power terminal 13, which is provided electrically independently of the main positive power terminal 11, is used, and as the negative power terminal, the main negative power terminal 12 and the main negative power terminal 12 are used. is an electrically independently provided RA
An M exclusive negative electrode side power supply terminal 14 is used. RAM3
The negative power terminal may be common to the main negative power terminal 12.

主正極側電源端子11と主負極側電源端子12との間に
は、通常の電源が接続される。
A normal power source is connected between the main positive power terminal 11 and the main negative power terminal 12.

RAM専用正極側電源端子13とRAM専用負極側電源
端子14との間には、切替スイッチを介して通常の電源
とバックアップ用蓄電池とが並列に接続される。そして
、通常の電源が入れらているときには通常の電源が切替
スイッチにより選択され、通常の電源が切られていると
きにはバックアップ用蓄電池か切替スイッチにより選択
される。
A normal power source and a backup storage battery are connected in parallel between the RAM-dedicated positive power supply terminal 13 and the RAM-dedicated negative power supply terminal 14 via a changeover switch. When the normal power source is turned on, the normal power source is selected by the changeover switch, and when the normal power source is turned off, the backup storage battery is selected by the changeover switch.

このワンチップマイコンでは、内部のRAM3かバック
アップされているので、マイコンの電源が切られてもR
AMB内のデータが保持される。
This one-chip microcontroller has internal RAM3 backed up, so even if the power to the microcontroller is turned off, the R
Data in AMB is retained.

このため、バックアップの必要なデータか取り扱われる
場合においても、外部RAMを設ける必要がなくなる。
Therefore, even when data that requires backup is handled, there is no need to provide an external RAM.

また、このようにしても、マイコン全体をバックアップ
する場合に比べて消費電力は少なくてすむ。
Furthermore, even in this case, the power consumption is lower than when backing up the entire microcomputer.

なお、RAM専用正極側電源端子13とRAM専用負極
側電源端子14との間にバックアップ用蓄電池のみを接
続してもよい。
Note that only a backup storage battery may be connected between the positive power supply terminal 13 exclusively for RAM and the negative power supply terminal 14 exclusively for RAM.

[発明の効果] この発明によれば、揮発性メモリの電源端子が他の構成
部の電源端子とは電気的に独立して設けられているので
、揮発性メモリのみをバックアップすることができる。
[Effects of the Invention] According to the present invention, since the power supply terminal of the volatile memory is provided electrically independent of the power supply terminals of other components, only the volatile memory can be backed up.

したがって、バックアップの必要なデータが取り扱われ
る場合においても、外部メモリを設ける必要がなくなる
。また、半導体集積回路全体をバックアップする場合に
比べて消費電力は少なくてすむ。
Therefore, even when data that requires backup is handled, there is no need to provide an external memory. Furthermore, power consumption is lower than when backing up the entire semiconductor integrated circuit.

【図面の簡単な説明】[Brief explanation of drawings]

図面はこの発明の実施例を示し、ワンチップマイコンの
構成を示す電気回路図である。 3・・・RAM、11・・・主正極側電源端子、12・
・・主負極側電源端子、13・・・RAM専用正極側電
源端子、14・・・RAM専用負極側電源端子。 以上
The drawings show an embodiment of the present invention and are electrical circuit diagrams showing the configuration of a one-chip microcomputer. 3...RAM, 11...Main positive power supply terminal, 12...
... Main negative power supply terminal, 13... Positive power supply terminal exclusively for RAM, 14... Negative power supply terminal exclusively for RAM. that's all

Claims (1)

【特許請求の範囲】[Claims] (1)揮発性メモリを有する半導体集積回路において、
揮発性メモリの電源端子が他の構成部の電源端子とは電
気的に独立して設けられていることを特徴とする半導体
集積回路。
(1) In a semiconductor integrated circuit having volatile memory,
A semiconductor integrated circuit characterized in that a power supply terminal of a volatile memory is provided electrically independently from power supply terminals of other components.
JP2297549A 1990-11-01 1990-11-01 Semiconductor integrated circuit Pending JPH04169984A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2297549A JPH04169984A (en) 1990-11-01 1990-11-01 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2297549A JPH04169984A (en) 1990-11-01 1990-11-01 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH04169984A true JPH04169984A (en) 1992-06-17

Family

ID=17847982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2297549A Pending JPH04169984A (en) 1990-11-01 1990-11-01 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH04169984A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005062182A1 (en) * 2003-12-19 2005-07-07 Renesas Technology Corp. Semiconductor integrated circuit device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5310943A (en) * 1976-07-19 1978-01-31 Toshiba Corp Microcomputer
JPH04130977A (en) * 1990-09-21 1992-05-01 Nec Ic Microcomput Syst Ltd Microcomputer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5310943A (en) * 1976-07-19 1978-01-31 Toshiba Corp Microcomputer
JPH04130977A (en) * 1990-09-21 1992-05-01 Nec Ic Microcomput Syst Ltd Microcomputer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005062182A1 (en) * 2003-12-19 2005-07-07 Renesas Technology Corp. Semiconductor integrated circuit device

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