JPH04169918A - Microcomputer - Google Patents

Abstract

PURPOSE:To momently and easily operate a microcomputer against plural reset factors by providing a function which selects and sets different branch destination addresses in accordance with plural reset inputs. CONSTITUTION:The high level and the low level are inputted to reset signal lines A101 and B102 from the external respectively to turn on and off tristate buffers A103 and B104, respectively, and a reset vector A105 is outputted as the address to an address signal line 107. Contents of the address indicated by the reset vector A105 are read out from a memory 108 to a data bus 109, and a start address A is loaded to a program controller 110. As the result, the microcomputer starts execution of an initializing program from the start address A. When the low level and the high level are inputted to reset signal lines A101 and B102 from the external respectively, execution of the initializing program is started from a start address B. Thus, the initializing program is simplified and the immediateness is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer, and particularly relates to an improvement in a reset method.

[Summary of the Invention] The present invention provides a microcomputer with a plurality of reset input terminals and a plurality of pointers (hereinafter referred to as reset vectors) indicating memory addresses storing program start addresses. From the reset input, the memory is referenced using the corresponding reset vector, and it is possible to select and set a different branch destination address according to each reset input.

[Prior Art] In a conventional microcomputer, when the reset input terminal becomes active, the reset vector refers to the memory that stores the program start address, transfers the memory contents to the program counter, and the program starts. It started.

[Problem M to be Solved by the Invention] However, in the above-mentioned conventional technology, the reference memory address of the reset vector at the time of reset is fixed to one address, so when the reset is input, the input is At that point, it was not possible to determine whether the input was intentional or from an external system (power supply voltage abnormality detection device, watchdog timer, etc.) that monitors the operation of the microcomputer.

Therefore, the program's initialization routine must recognize the status input from the external system after that and determine whether the process is an intentional initialization or an abnormal process, which lacks immediacy and causes problems for the program. The problem was that it was a heavy load.

Therefore, the present invention is intended to solve these problems, and its purpose is to
To provide a means for instantly and easily operating a microcomputer.

[Means for Solving the Problem] In order to solve the problem, the microcomputer of the present invention sets the branch destination address of a program counter (PC) that holds address information of the next program to be executed by a reset input. This microcomputer is characterized by having a plurality of reset inputs and a function of selecting and setting a different branch destination address in accordance with each reset input.

[Example] Hereinafter, the present invention will be described in detail based on examples.

FIG. 1 is a block diagram of the present invention.

101 and 102 are reset signal lines A for resetting the microcomputer, and reset signal lines B0103 and 104 are tri-state buffers A coupled to the reset signal line AIDI and the reset signal @B102, respectively.
and tri-state buffer B, 105 are coupled to tri-state buffer AlO3 and generate a reset vector for the reset A input.Reset vector A, 106 is coupled to tri-state buffer B 104 and generates a reset vector for the reset B input. Generated reset vector B
, 107 are address signal lines coupled to the tri-state buffer AlO3 and the tri-state buffer B104 and outputting a vector address.

108 is coupled to the address signal fi107, and is connected to the reset vector AlO3 and the reset vector B10 at the time of reset.
Memory that stores the start address of the program specified by 6. 109 is a data bus coupled to memory 108; A program counter 110 is coupled to the data bus 109 and loads a start address transferred from the data bus 109.

The present invention is constituted by the above.

First, a HIGH level is inputted to the reset signal line Al0L and a LOW level is inputted to the reset signal line B102 from the outside. Here, the tristate buffer AlO3 is turned on, the tristate buffer B104 is turned off, and the reset vector Al05 is outputted to the address signal line 107 as an address. Next, the reset vector A is transferred from the memory 108.
The contents of the address indicated by lO3 are read to the data bus 109, and the start address A is input to the program counter 110.
Load. As a result, the microcomputer starts executing the initialization program from start address A.

Contrary to the above, LO is applied to the reset signal line Al01 from the outside.
When W level and HIGH are input to the reset signal 111B102, the tri-state buffer AlO3 is turned off.
, tristate buffer BIO4 is turned on. As a result of the above, the reset vector B106 is output as an address to the address signal line 107, and the contents of the address indicated by the f noset vector B106 are read from the memory 108 via the data bus 109, and the program counter 11
Load start address B into 0. As a result, the microcomputer starts executing the initialization program from start address B.

[Effects of the Invention] As described above, in the present invention, a plurality of reset input terminals and reset vectors are provided for the start address at reset, which was conventionally fixed to one address, and when each reset becomes active, By outputting the corresponding reset vector as an address and obtaining a different start address for each reset cause, inputting the status from an external system and determining the status on the microcomputer side, which were previously required, are no longer necessary. Become.

As described above, since branch processing for each reset factor is automatically performed, the initialization program can be simplified and immediacy can be improved.

Furthermore, as described above, since status input is not required, the circuit configuration of the external system can be simplified.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a microcomputer according to the present invention. 101... Reset signal line A lO2... Reset signal line B 103... Tri-state buffer AlO4...
... Tri-state buffer B105 ... Reset vector A 106 ... Reset vector B 107 ... Address signal line 108 ... Memory 109 ... ...Data bus 110...Program counter or more Applicant Seiko Epson Co., Ltd. agent Patent attorney Kizobe Suzuki and 1 other person

Claims (1)

[Scope of Claim] A microcomputer that can set a branch destination address of a program counter (PC) that holds address information of a program to be executed next by a reset input, which has a plurality of reset inputs, and each reset input has a plurality of reset inputs. A microcomputer characterized by having a function of selecting and setting a different branch destination address depending on the address.