JPH04167686A - Image pickup device - Google Patents

Abstract

PURPOSE:To reduce the power consumption and to prevent the delay of rise of the operation by stopping only the operation of a driving circuit whose power consumption is larger than that of the other circuit parts. CONSTITUTION:When a sensor 15 does not detect the state change of an object, that is, when it is unnecessary to pick up the image of the object, the operation of a driving clock generating circuit 11 is stopped with an operating timing generating circuit 13 and a signal processing pulse generating circuit 14 operated, and power is consumed in a synchronizing signal separating circuit 21, a clock generating circuit 22, the operation timing generating circuit 13, and the signal processing pulse generating circuit 14. In this manner, the standby state is set that only the operation of the driving circuit of large power consumption is stopped with the signal processing circuit 14 and the timing control circuit 13 operated. Thus, circuit parts requiring a long time for the rise of operation are always kept in the operating state, and only the circuit part of large power consumption is stopped. Consequently, the power consumption is reduced and the rising time of the operation of the circuit is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to an imaging device that starts operation by detecting the state of a subject.

(B) Prior Art In a surveillance system using a plurality of television cameras, the plurality of television cameras are connected to a central control device so that images from each television camera can be played back simultaneously. Possible ways to play back multiple videos at the same time include splitting the monitor screen and displaying the video from each TV camera in each area, or repeatedly displaying the video from each TV camera on the monitor in a time-sharing manner. Each method is adopted depending on the need.

FIG. 3 is a block diagram schematically showing a numerical monitoring system.

The three television cameras (la) (lb) (lc) are
It is configured to operate in response to a synchronization signal from a synchronization signal generation circuit (2), and generates video signals Y8, Y6, and Yo synchronized with a common synchronization signal. This TV camera (l
a) Video signals Y1, Yl obtained from (1bH1c)
,Y. are manually input to the screen control circuit (3) to create a video signal Y that repeatedly displays the video corresponding to each video signal Y8, Y5, Y, in a fixed period unit, and this video signal Y is input to the monitor (4). ). In such a system, each television camera (la) (lb) (lc
) operate according to a common synchronization signal C3, so the video signals Y, , Y5, and Yo are synchronized, and the video signals Y6, Y5, and Y. can be easily synthesized.

Figure 4 shows each television camera (la) (lb) (lc)
FIG. 2 is a block diagram showing the configuration of FIG.

The COD solid-state imaging device (10) operates according to a timing signal from a drive clock generation circuit (11) and generates an imaging output X. This imaging output X is output from the signal processing circuit (1
After being subjected to processing such as sample hold and gamma correction in step 2), it is output as a video signal Y to the outside. On the other hand, the drive timing generation circuit (13) and the signal processing pulse generation circuit (14) each operate based on the synchronization signal C3.
A clock generation circuit (11) drives a timing pulse CT that sets the drive timing of the OD solid-state image sensor (10).
A signal processing pulse PS including pulses necessary for signal processing, such as sampling pulses and blanking pulses, is supplied to the signal processing circuit (12). Therefore, CO
The D solid-state image sensor (10) operates at a timing according to the synchronization signal, and the signal processing circuit performs predetermined signal processing in synchronization with the synchronization signal C3, and a video signal Y synchronized with the synchronization signal C5 is output. Ru.

By the way, the TV camera used for door cameras etc.
In order to reduce power consumption, the sensor (15) is configured to start operating when some change occurs in the area imaged by the television camera, and detects the state of the subject.
is attached.

That is, the sensor (15), which is composed of an infrared sensor, an ultrasonic sensor, etc., gives an operation command to the drive timing generation circuit (13) and the signal processing pulse generation circuit (14) when it detects a change in the state of the subject. to start the operation. Therefore, the operation of each part is stopped until a change occurs in the state of the subject, and power consumption can be reduced.

(c) Problems to be Solved by the Invention However, in the above-mentioned television camera, the start-up of the operation of the operation timing generation circuit (13) and the signal processing pulse generation circuit (14), that is, the operation thereof, does not coincide with the synchronization signal C3. Since it takes a long time to synchronize, there is a problem that the output of the video signal of the television camera is delayed with respect to the detection output of the sensor (15).

Therefore, an object of the present invention is to reduce power consumption without delaying the output of a video signal.

(d) Means for Solving the Problems The present invention has been made to solve the above-mentioned problems, and is characterized by a sensor that detects the state of the subject and a sensor that detects the state of the subject and detects the incident light from the subject. A solid-state image sensor that receives light and generates information charges, a drive circuit that pulse-drives the solid-state image sensor to transfer and output the information charges, and obtains a vertical synchronization signal and a horizontal synchronization signal that are compatible with a predetermined television system. a synchronization signal generation circuit, a signal processing circuit that obtains a video signal according to the vertical synchronization signal and the horizontal synchronization signal from the output of the solid-state image sensor, and setting the operation timing of the drive circuit based on the vertical synchronization signal and the horizontal synchronization signal. and a timing control circuit for causing the drive circuit to stop operating in accordance with the output of the sensor.

(e) Effects According to the present invention, by setting the standby state in which the signal processing circuit and timing control circuit remain in the operating state and only the operation of the drive circuit, which consumes significantly more power, is stopped, the start-up of the operation is prevented. Circuit parts that require a long time are always kept in operation, and only circuit parts that consume a lot of power are stopped. Therefore, it is possible to reduce power consumption and shorten the start-up time of circuit operation.

(f) Example Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration number of the imaging apparatus of the present invention. In this figure, a CCD solid-state image sensor (10), a drive clock generation circuit (11), a signal processing circuit (12),
The operation timing generation circuit (13) and signal processing pulse generation circuit (14) are the same as in FIG. 4, and the same parts are given the same reference numerals.

A synchronization signal C3 from a central control device or the like is superimposed on the communication line (20), and the synchronization signal C3 is taken into the imaging device by the synchronization separation circuit (21). The clock generation circuit (22) receives the synchronization signal C3 from the synchronization signal separation circuit (21), forms a phase-locked loop with this synchronization signal C3 as a reference, and generates a timing clock VT for the vertical scanning period and a timing clock for the horizontal scanning period. Generates HT. These timing clocks VT and 1-IT are used as an operation timing generation circuit (13).
and the signal processing pulse generation circuit (14). The synchronization separation circuit (21), clock generation circuit (22), operation timing generation circuit (13), and signal processing pulse generation circuit (14) described above are always set in an operating state regardless of the state of the subject.

On the other hand, the drive clock generation circuit (11) that drives the CCD solid-state image sensor (10) has a logical product (23) of the eight forces of the sensor (15) and the output of the operation timing generation circuit (13).
), and the output of the operation timing generation circuit (13) is input to the drive clock generation circuit (11) only when the sensor (15) detects a change in the state of the subject. Therefore, when the sensor (15) does not detect a change in the state of the subject, that is, when there is no need to image the subject, the operation timing generation circuit (13) and the signal processing pulse generation circuit (14) remain in the operation state. The drive clock generation circuit (11) stops operating, and the synchronization separation circuit (21), clock generation circuit (22), operation timing generation circuit (13), and signal processing pulse generation circuit (14)
electricity is consumed.

FIG. 2 is a block diagram showing a case where a synchronization signal is created inside the imaging device, and is provided with clock generation circuits (24) and (25) that operate according to a basic clock. That is,
The clock generation circuit (24) generates a timing clock HT with a horizontal scanning period by counting the basic clock CK with a constant period, and also generates a timing clock HT with a horizontal scanning period.
25) is configured to generate a timing clock for the vertical scanning period by counting the timing clock I-IT. In this way, when creating a synchronization signal inside the imaging device, there is no need to apply a synchronization signal from the outside, but the resulting video signal Y will have a different phase for each imaging device.

According to the above-described imaging device, there is no delay in the start-up of the device's operation, whether synchronization is achieved by applying a synchronization signal externally or when the synchronization signal is created internally, and the sensor (
15) detects a change in the state of the subject, the CCD
Driving of the solid-state image sensor (1o) is started.

(G) Effects of the Invention According to the present invention, only the operation of the drive circuit, which consumes much more power than other circuit parts, is stopped (thereby, it is possible to reduce the power consumption and to speed up the start-up of the operation. Delays can be prevented.Therefore, it is possible to realize an imaging apparatus that consumes less power and quickly reacts to changes in the state of the subject and starts imaging.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a block diagram showing another embodiment, Fig. 3 is a block diagram of a monitoring system, and Fig. 4 is a block diagram of a conventional imaging device. be. (la) (lb) (lc)-・TV camera, <21
・-Synchronization signal generation circuit, (3)-・Screen control circuit, (4
)...Monitor, (10) -CCD solid-state image sensor, (
11)... Drive clock generation circuit, (12)...
Signal processing circuit, (13)...Operation timing generation circuit, (14)...Signal processing pulse generation circuit, (15)...
...Sensor, (20) ...Communication line, (21)
...Synchronization separation circuit, (22) (23) (24)・
...Clock generation circuit.

Claims (3)

[Claims] (1) A sensor that detects the state of the subject; a solid-state image sensor that receives incident light from the subject and generates information charges; and a drive circuit that drives the solid-state image sensor in pulses to transfer and output the information charges. a synchronization signal generation circuit that obtains a vertical synchronization signal and a horizontal synchronization signal compatible with a predetermined television system; and a signal processing circuit that obtains a video signal according to the vertical synchronization signal and horizontal synchronization signal from the output of the solid-state image sensor. An imaging device comprising: a timing control circuit that sets the operation timing of the drive circuit based on the vertical synchronization signal and the horizontal synchronization signal, wherein the drive circuit stops operating according to the output of the sensor. (2) The imaging device according to claim 1, wherein the synchronization signal generation circuit includes a phase-locked loop that operates based on a synchronization signal applied from the outside. (3) The imaging device according to claim 1, wherein the synchronization signal generation circuit includes a counter that performs a counting operation according to a basic clock having a constant period.