JPH0416472Y2 - - Google Patents

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Publication number
JPH0416472Y2
JPH0416472Y2 JP440085U JP440085U JPH0416472Y2 JP H0416472 Y2 JPH0416472 Y2 JP H0416472Y2 JP 440085 U JP440085 U JP 440085U JP 440085 U JP440085 U JP 440085U JP H0416472 Y2 JPH0416472 Y2 JP H0416472Y2
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JP
Japan
Prior art keywords
substrate
substrates
electronic circuit
electronic
recesses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP440085U
Other languages
Japanese (ja)
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JPS61121775U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to JP440085U priority Critical patent/JPH0416472Y2/ja
Publication of JPS61121775U publication Critical patent/JPS61121775U/ja
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Publication of JPH0416472Y2 publication Critical patent/JPH0416472Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 [考案の技術分野] 本考案は例えば無線機器等のように異なる周波
数帯域の電子回路が混在する電子機器に用いられ
る電子回路装置に関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an electronic circuit device used in an electronic device, such as a wireless device, in which electronic circuits of different frequency bands coexist.

[考案の技術的背景とその問題点] 例えば小型の無線機器のように数100MHzから
数GHzに亘る広帯域の周波数特性を有する電子機
器においては、この電子機器を構成する電子回路
を単一の基板上に組み込むことはその広帯域の周
波数特性のため極めて困難である。
[Technical background of the invention and its problems] For example, in electronic devices such as small wireless devices that have broadband frequency characteristics ranging from several 100 MHz to several GHz, the electronic circuits that make up this electronic device are mounted on a single substrate. Due to its broadband frequency characteristics, it is extremely difficult to integrate

そこで従来においては第2図に示すように例え
ば100MHz〜300MHzの周波数特性の伝送信号を分
担する第1の電子回路1を第1の基板3上に組み
込むとともに、300MHz〜1GHzの周波数特性の伝
送信号を分担する第2の電子回路2を第2の基板
4上に組み込み、これらの基板3,4間にスペー
サ5a,5bを介在しつつ両基板3,4をボルト
及びナツト等の固着部材6a,6bを用いて一体
的に積み重ねるようにしたものが知られている。
Therefore, in the past, as shown in FIG. 2, for example, a first electronic circuit 1 that shares the transmission signal with frequency characteristics of 100MHz to 300MHz is incorporated on the first substrate 3, and a transmission signal with frequency characteristics of 300MHz to 1GHz is installed. A second electronic circuit 2 that shares the above is assembled on a second substrate 4, and spacers 5a, 5b are interposed between these substrates 3, 4, and both substrates 3, 4 are fixed with fixing members 6a, such as bolts and nuts. 6b is known in which they are stacked integrally.

尚、第2図において、7aは第1の基板3上に
設けられた回路パターンで、この回路パターン7
a上には第1の電子回路1を構成するチツプ部品
8a,9aが接続され、また、第2の基板4上に
設けられた回路パターン7b上には第2の電子回
路2を構成するチツプ部品8a,9bが接続され
ている。
In addition, in FIG. 2, 7a is a circuit pattern provided on the first substrate 3;
Chip components 8a and 9a constituting the first electronic circuit 1 are connected to the chip a, and chip components constituting the second electronic circuit 2 are connected to the circuit pattern 7b provided on the second substrate 4. Components 8a and 9b are connected.

そして、第1の電子回路1と第2の電子回路2
とは、第1の基板3に設けたスルーホール10と
第2の基板4上の回路パターン7bとの間に接続
線11を接続することにより電気的に接続され全
体として一体的に機能するようになつている。し
かしながら、上述した従来の電子回路装置におい
ては、第1の基板3と第2の基板4とはスペーサ
5a,5bを介して積み重ねられる構成であるた
め、この装置の全体の厚さH2は第1、第2の基
板3,4の厚さとチツプ部品8a,9a及びチツ
プ部品8b,9bの厚さとが加算されたものとな
つて相当大きくなり、この装置の小型化を図るこ
とができないという問題があつた。
Then, the first electronic circuit 1 and the second electronic circuit 2
By connecting the connecting wire 11 between the through hole 10 provided on the first substrate 3 and the circuit pattern 7b on the second substrate 4, they are electrically connected and function as a whole. It's getting old. However, in the conventional electronic circuit device described above, the first substrate 3 and the second substrate 4 are stacked with spacers 5a and 5b in between, so the overall thickness H2 of this device is 1. The problem is that the thickness of the second substrates 3 and 4 plus the thicknesses of the chip components 8a and 9a and the chip components 8b and 9b become considerably large, making it impossible to miniaturize the device. It was hot.

[考案の目的] 本考案は上記事情に鑑みてなされたものであ
り、低い周波数帯域から高い周波数帯域に亘る広
帯域の周波数特性を有する電子回路が混在する場
合でも、全体の厚さを大幅に低減することがで
き、装置の薄型化を図ることができる電子回路装
置を提供することを目的とするものである。
[Purpose of the invention] The present invention was created in view of the above circumstances, and is intended to significantly reduce the overall thickness even when electronic circuits with wide frequency characteristics ranging from low frequency bands to high frequency bands are mixed. It is an object of the present invention to provide an electronic circuit device that can be made thinner and thinner.

[考案の概要] 上記目的を達成するための本考案の概要は、誘
電率の異なる少なくとも2枚の基板にそれぞれ対
応配置の凹陥部を形成し、これらの凹陥部を体面
させつつ前記各基板を積層接合するとともに、前
記各基板の凹陥部にはこれら基板の誘電率の相違
と相反関係の周波数帯域を有する電子回路をそれ
ぞれ組み込みこれらの電子回路をそれぞれ電気的
に接続したことを特徴とするものである。
[Summary of the invention] The outline of the invention for achieving the above object is to form concave portions correspondingly arranged in at least two substrates having different dielectric constants, and to form each of the substrates with these concave portions facing each other. In addition to laminated bonding, electronic circuits having frequency bands that are inversely related to the difference in permittivity of these substrates are built into the recessed portions of each of the substrates, and these electronic circuits are electrically connected to each other. It is.

[考案の実施例] 以下に本考案の実施例を第1図を参照して詳細
に説明する。
[Embodiment of the invention] An embodiment of the invention will be described below in detail with reference to FIG.

尚、第1図に示す装置において、第2図に示す
ものと同等の機能を有するものには同一の符号を
付し、その詳細な説明は省略する。
In the apparatus shown in FIG. 1, parts having the same functions as those shown in FIG. 2 are given the same reference numerals, and detailed explanation thereof will be omitted.

第1図に示す装置が第2図に示すものと異なる
点は、第1の基板13を高い誘電率εHを有するセ
ラミツクスを用いて前記第1の基板3よりも若干
厚く形成し、また、第2の基板14を低い誘電率
εLを有するセラミツクス又はテフロン登録商標、
エポキシ樹脂を用いて第1の基板13と同等の厚
さに形成したこと、第1、第2の基板13,14
の略中央部に互いに対応する位置関係を有する凹
陥部15、16をそれぞれ形成しこの各凹陥部1
5,16底面にそれぞれ回路パターン17a,1
7bを設けたこと、回路パターン17a上には第
1の電子回路1を構成するチツプ部品8a,9a
を、回路パターン17b上には第2の電子回路2
を構成するチツプ部品8b,9bをそれぞれ接続
したこと、前記凹陥部15,16を対面させつつ
第1、第2の基板13,14を積層接合しこの凹
陥部15,16内に第1,第2の電子回路1,2
を収納するとともに回路パターン17a,17b
間を接続線11により電気的に接続したことであ
る。
The difference between the device shown in FIG. 1 and the device shown in FIG. 2 is that the first substrate 13 is made of ceramics having a high dielectric constant ε H and is formed to be slightly thicker than the first substrate 3. The second substrate 14 is made of ceramics or Teflon (registered trademark) having a low dielectric constant ε L ;
The first and second substrates 13 and 14 are formed using epoxy resin to have the same thickness as the first substrate 13.
Recesses 15 and 16 having corresponding positional relationships are formed at approximately the center of each recess 1.
Circuit patterns 17a and 1 on the bottom surfaces of 5 and 16, respectively.
7b, and chip components 8a and 9a constituting the first electronic circuit 1 are provided on the circuit pattern 17a.
The second electronic circuit 2 is placed on the circuit pattern 17b.
The first and second substrates 13 and 14 are laminated and bonded with the recesses 15 and 16 facing each other, and the first and second substrates are connected in the recesses 15 and 16, respectively. 2 electronic circuits 1, 2
and circuit patterns 17a, 17b.
The connection line 11 is used to electrically connect the two terminals.

尚、第1の基板13と第2の基板14を積層接
合したときに、チツプ部品8a,9aとチツプ部
品8b,9bとが接触しないように、予めこれら
のチツプ部品8a,9a,8b,9bの回路パタ
ーン17a,17bに対する接続位置を設定して
おくものとする。また、この装置の入力端子及び
出力端子は図示していないが予め第1の基板13
又は第2の基板14にスルーホール等を設けて形
成しておくものとする。
Note that when the first substrate 13 and the second substrate 14 are laminated and bonded, the chip components 8a, 9a, 8b, 9b are bonded in advance so that the chip components 8a, 9a and the chip components 8b, 9b do not come into contact with each other. It is assumed that the connection positions for the circuit patterns 17a and 17b are set in advance. In addition, although the input terminal and output terminal of this device are not shown, they are connected to the first substrate 13 in advance.
Alternatively, the second substrate 14 may be formed with a through hole or the like.

次に上記構成の電子回路装置の作用を第1の基
板13上に組み込んだ第1の電子回路1の動作周
波数400MHz、第2の基板14上に組み込んだ第
2の電子回路2の動作周波数を900MHzとした場
合を例にとつて説明する。
Next, the operation frequency of the first electronic circuit 1 incorporated on the first substrate 13 and the operating frequency of the second electronic circuit 2 incorporated on the second substrate 14 are determined to be 400 MHz. The case will be explained using 900MHz as an example.

凹陥部15,16で形成される空間に収納され
た第1の電子回路1が400MHzの周波数で動作す
る場合、既述したように第1の基板13の誘電率
εHが第2の基板14の誘電率εLよりも高いため、
誘電率εLの基板を仮に用いる場合に比較し等価的
に第1の基板13の全体の寸法を小さくすること
ができる、この場合、動作周波数が400MHzと相
対的に低い周波数であるため、第1の基板13の
凹陥部15に形成した回路パターン17aとこの
装置のアース間の浮遊容量を大きくすることがで
き、これに伴いこの電子回路の入力インピーダン
ス、出力インピーダンスも小さくなる。
When the first electronic circuit 1 housed in the space formed by the recesses 15 and 16 operates at a frequency of 400 MHz, the dielectric constant ε H of the first substrate 13 is equal to that of the second substrate 14 as described above. Since the dielectric constant ε of is higher than L ,
Compared to the case where a substrate with a dielectric constant ε L is used, the overall dimensions of the first substrate 13 can be equivalently reduced. In this case, since the operating frequency is relatively low at 400 MHz, The stray capacitance between the circuit pattern 17a formed in the concave portion 15 of the substrate 13 of No. 1 and the ground of this device can be increased, and accordingly, the input impedance and output impedance of this electronic circuit are also reduced.

一方、第2の基板14の凹陥部16に収納した
第2の電子回路2が900MHzの周波数で動作する
場合、第2の基板14の誘電率εLは第1の基板1
3の誘電率εHよりも小さいため、第2の基板14
の回路パターン17bとアース間の浮遊容量を第
1の基板13の場合と略同等にすることができ、
これに伴いこの第2の電子回路2の入力インピー
ダンス、出力インピーダンスも第1の基板13の
凹陥部15に収納した第1の電子回路1の場合と
略同等にすることができる。
On the other hand, when the second electronic circuit 2 housed in the recess 16 of the second substrate 14 operates at a frequency of 900MHz, the dielectric constant ε L of the second substrate 14 is equal to that of the first substrate 1.
Since the dielectric constant ε H of 3 is smaller than the second substrate 14
The stray capacitance between the circuit pattern 17b and the ground can be made approximately equal to that of the first substrate 13,
Accordingly, the input impedance and output impedance of the second electronic circuit 2 can be made substantially the same as those of the first electronic circuit 1 housed in the recessed portion 15 of the first substrate 13.

この結果、両電子回路1,2のインピーダンス
整合を容易に取ることができる。
As a result, impedance matching between both electronic circuits 1 and 2 can be easily achieved.

また、一般に基板を縮小するためにその誘電率
を上げると回路パターンの精度が問題となるが、
本実施例の電子回路装置では高誘電率εHの第1の
基板13に低い周波数で動作する第1の電子回路
1を組み込むようにしているため、第1の基板1
3の回路パターン17aの精度は特に問題となら
ない。
Additionally, if the dielectric constant of the substrate is increased in order to reduce the size of the substrate, the precision of the circuit pattern becomes a problem.
In the electronic circuit device of this embodiment, since the first electronic circuit 1 that operates at a low frequency is incorporated in the first substrate 13 having a high dielectric constant ε H , the first substrate 1
The accuracy of the circuit pattern 17a of No. 3 is not a particular problem.

このようにこの電子回路装置によれば、異なる
周波数で動作する2つの電子回路1,2を分布定
数回路を構成するように第1、第2の基板13,
14の凹陥部15,16内に収納し、かつ、第1
の基板13の誘電率εHを第2の基板14の誘電率
よりも高くしているため、凹陥部15に設ける回
路パターン17aの寸法を凹陥部16に設ける回
路パターン17bの寸法と同等にすることがで
き、しかも、両凹陥部15,16により形成され
る空間を利用して各チツプ部品8a,9a,8
b,9bを収納するようにしたことからこの装置
の厚さH1を両基板13,14の厚さの合計のみ
で定まる値まで低減することができる。
In this way, according to this electronic circuit device, the first and second substrates 13,
14, and the first
Since the dielectric constant ε H of the substrate 13 is higher than that of the second substrate 14, the dimensions of the circuit pattern 17a provided in the recess 15 are made equal to the dimensions of the circuit pattern 17b provided in the recess 16. Moreover, each chip component 8a, 9a, 8 can be
Since the substrates b and 9b are accommodated, the thickness H1 of this device can be reduced to a value determined only by the sum of the thicknesses of both substrates 13 and 14.

本考案は上述した実施例に限定されるものでは
なく、その要旨の範囲内で種々の変形が可能であ
ることはいうまでもない。
It goes without saying that the present invention is not limited to the embodiments described above, and that various modifications can be made within the scope of the invention.

例えば、上述した実施例では2枚の基板に凹陥
部を形成し、これらの凹陥部にそれぞれ第1,第
2の電子回路を組み込みつつ両基板を積層接合し
た全体の厚さの低減を図る場合について説明した
が、この他積層接合した2枚の基板に対しさらに
上述した実施例と同様に構成した別の電子回路装
置を積層して4層構造の電子回路装置を構成する
ことによつても全体の厚さを低減することが可能
なものを提供することができる。
For example, in the above-mentioned embodiment, when recesses are formed in two substrates, and the first and second electronic circuits are incorporated into these recesses, respectively, the overall thickness of the two substrates is laminated and bonded. However, it is also possible to construct an electronic circuit device with a four-layer structure by laminating another electronic circuit device configured in the same manner as in the above-mentioned embodiment on two laminated and bonded substrates. It is possible to provide one that allows the overall thickness to be reduced.

[考案の効果] 以上詳述した本考案によれば、誘電率の異なる
第1、第2の基板に設けられ、かつ、対面配置さ
れる凹陥部によつて形成される空間を利用して電
子回路を収納するようにしたものであるから、広
い周波数帯域を有する電子回路全体の薄型が可能
で電子機器の小型化に寄与し得る電子回路装置を
提供することができる。
[Effects of the invention] According to the invention described in detail above, electronic Since the circuit is housed therein, it is possible to provide an electronic circuit device that can have a wide frequency band and can have a thin overall electronic circuit, thereby contributing to miniaturization of electronic equipment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す断面図、第2図
は従来の電子回路装置の断面図である。 1……第1の電子回路、2……第2の電子回
路、13……第1の基板、14……第2の基板、
15,16……凹陥部。
FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional electronic circuit device. 1... First electronic circuit, 2... Second electronic circuit, 13... First substrate, 14... Second substrate,
15, 16... Concave portion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘電率の異なる少なくとも2枚の基板にそれぞ
れ対応配置の凹陥部を形成し、これらの凹陥部を
対面させつつ前記各基板を積層接合するととも
に、前記各基板の凹陥部にはこれらの基板の誘電
率の相違と相反関係の周波数帯域を有する電子回
路をそれぞれ組み込みこれらの電子回路をそれぞ
れ電気的に接続したことを特徴とする電子回路装
置。
At least two substrates with different dielectric constants are formed with correspondingly arranged recesses, and the respective substrates are laminated and bonded with the recesses facing each other, and the recesses of the respective substrates are provided with dielectrics of these substrates. What is claimed is: 1. An electronic circuit device characterized in that electronic circuits each having a different rate and a reciprocal frequency band are incorporated, and these electronic circuits are electrically connected to each other.
JP440085U 1985-01-16 1985-01-16 Expired JPH0416472Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP440085U JPH0416472Y2 (en) 1985-01-16 1985-01-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP440085U JPH0416472Y2 (en) 1985-01-16 1985-01-16

Publications (2)

Publication Number Publication Date
JPS61121775U JPS61121775U (en) 1986-07-31
JPH0416472Y2 true JPH0416472Y2 (en) 1992-04-13

Family

ID=30479933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP440085U Expired JPH0416472Y2 (en) 1985-01-16 1985-01-16

Country Status (1)

Country Link
JP (1) JPH0416472Y2 (en)

Also Published As

Publication number Publication date
JPS61121775U (en) 1986-07-31

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