JPH04163926A - Sealing method for semiconductor - Google Patents
Sealing method for semiconductorInfo
- Publication number
- JPH04163926A JPH04163926A JP29035290A JP29035290A JPH04163926A JP H04163926 A JPH04163926 A JP H04163926A JP 29035290 A JP29035290 A JP 29035290A JP 29035290 A JP29035290 A JP 29035290A JP H04163926 A JPH04163926 A JP H04163926A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- guard ring
- sealing resin
- sealing
- heating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007789 sealing Methods 0.000 title claims abstract description 46
- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000000034 method Methods 0.000 title claims description 11
- 229920005989 resin Polymers 0.000 claims abstract description 61
- 239000011347 resin Substances 0.000 claims abstract description 61
- 238000010438 heat treatment Methods 0.000 claims abstract description 14
- 238000005538 encapsulation Methods 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 239000000758 substrate Substances 0.000 abstract description 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000007363 ring formation reaction Methods 0.000 abstract 1
- 239000004020 conductor Substances 0.000 description 18
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 230000009974 thixotropic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
この発明は、回路基板上に実装すべき半導体素子の回路
基板上での封止に用いられる半導体封止方法に関する。The present invention relates to a semiconductor sealing method used for sealing a semiconductor element to be mounted on a circuit board on a circuit board.
混成集積回路で」・よ、１回路基板に導体パターンが形
成された後、抵抗等の受動素子とともに、半導体が設置
としてペアチップが実装される。回路基板には、ペアチ
ップの周辺部にペアチップの端子と接続すべき導体パタ
ーンが形成されており、ペアチップの各端子と導体パタ
ーンとは導体ワイヤを用いてワイヤボンディングにより
電気的な接続が行われる。
このような電気的な接続が行われた後、導体ワイヤ及び
ペアチップを包囲する範囲には封止樹脂を堰き止める堰
止め枠としてのガードリングが封止樹脂で形成され、こ
のガードリングの固化を待って、その内側に封止樹脂を
充填し、その封止樹脂でペアチップ、導体ワイヤ及びそ
の周辺部の導体パターンが封止される。In a hybrid integrated circuit, after a conductor pattern is formed on a circuit board, paired chips are mounted with semiconductors and passive elements such as resistors. A conductor pattern to be connected to the terminal of the pair chip is formed on the circuit board around the pair chip, and each terminal of the pair chip and the conductor pattern are electrically connected by wire bonding using a conductor wire. After such an electrical connection is made, a guard ring is formed of the sealing resin as a damming frame that blocks the sealing resin in the area surrounding the conductor wire and the pair chip, and this guard ring is prevented from solidifying. Then, a sealing resin is filled inside thereof, and the paired chips, the conductor wires, and the conductor pattern around them are sealed with the sealing resin.
ところで、このような半導体素子の樹脂封止に用いるガ
ードリングは、封止樹脂を堰き止めるためのものであり
、理想的には封止樹脂より流動性の低い樹脂が用いられ
る０作業性からみれば、ガードリングは即座に硬化する
ことが望ましく、狭い範囲で十分な高さを設定できる樹
脂が望まれている。
従来、ガードリングには、封止樹脂とは異なるチクソ性
の樹脂が用いられ、そのための調整が非常に面倒であっ
た。
ところで、ガードリングの形成にガードリング用の特別
な樹脂を用いても、僅かに流動性が異なる程度であって
、ガードリングに最適な樹脂はなく、十分な高さを取る
ためには単位面積当たりの滴下量が増え、固化の途上で
その流動性故に拡がり、回路基板に対する部品の実装効
率を低下させる原因になっている。
そこで、この発明は、ガードリングを形成する封止樹脂
を加熱して硬化を早め、最適なガードリングを形成して
効率的な樹脂封止を実現した半導体封止方法の提供を目
的とする。By the way, guard rings used in such resin encapsulation of semiconductor elements are used to dam the encapsulation resin, and ideally a resin with lower fluidity than the encapsulation resin is used, which is difficult to achieve due to zero workability. For example, it is desirable that the guard ring harden immediately, and a resin that can set a sufficient height within a narrow range is desired. Conventionally, a thixotropic resin different from the sealing resin has been used for the guard ring, and the adjustment thereof has been very troublesome. By the way, even if a special resin for guard rings is used to form guard rings, the fluidity will be slightly different, and there is no optimal resin for guard rings, and in order to obtain a sufficient height, the unit area The amount of drops per drop increases, and during solidification, it spreads due to its fluidity, causing a decrease in the efficiency of mounting components on circuit boards. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor encapsulation method that achieves efficient resin encapsulation by heating the encapsulation resin that forms the guard ring to accelerate its curing and forming an optimal guard ring.
即ち、この発明の半導体封止方法は、半導体素子（ペア
チップ４）が設置された回路基板（２）の前記半導体の
周囲部にガードリング（１８）を形成し、その内部に封
止樹脂を充填させて半導体を封止する半導体封止方法に
おいて、前記回路基板のガードリングを形成すべき部分
に封止樹脂（１６）を供給しながら、前記回路基板に供
給された前記封止樹脂を加熱して硬化させることを特徴
とする。That is, the semiconductor encapsulation method of the present invention includes forming a guard ring (18) around the semiconductor of a circuit board (2) on which a semiconductor element (pair chip 4) is installed, and filling the inside of the guard ring (18) with a sealing resin. In the semiconductor encapsulation method, the encapsulation resin (16) supplied to the circuit board is heated while the encapsulation resin (16) is supplied to a portion of the circuit board where a guard ring is to be formed. It is characterized by being hardened.
ガードリングを形成する封止樹脂を回路基板上で迅速に
加熱によって硬化させることができるので、その硬化に
よって十分な高さを持つガードリングが少ない樹脂量で
形成される。ガードリングの硬化が迅速化され、しかも
十分な強度が短時間で得られるので、ガードリングの形
成後、直ぐに封止樹脂の充填が行える。Since the sealing resin forming the guard ring can be quickly cured by heating on the circuit board, the guard ring with sufficient height can be formed by the curing with a small amount of resin. Since the guard ring can be cured quickly and sufficient strength can be obtained in a short time, the sealing resin can be filled immediately after the guard ring is formed.
以下、この発明を図面に示した実施例を参照して詳細に
説明する。
第１図及び第２図は、この発明の半導体封止方法の一実
施例を示す。
第１図及び第２図の（Ａ）に示すように、アルミナやセ
ラミック等の絶縁性材料で回路基板２が形成され、その
回路基板２の表面には半導体素子としてのペアチップ４
を実装すべき部分に導体６が印刷によって形成されてい
るとともに、この導体６に一定の間隔を設けて導体パタ
ーン８が形成されている。導体パターン８は、図示しな
い回路部品や他の機能回路との回路パターンを形成する
ものである。
導体６の上面には、第２図の（Ｂ）に示すように、ペア
チップ４が導電性接着剤１０を以て固着されるとともに
、ペアチップ４の半導体基板が導体６と電気的に接続さ
れている。ペアチップ４の縁部に形成されている電極１
２と対応する導体パターン８との間にはワイヤボンディ
ングによって導体ワイヤ１４が接続され、電気的に接続
されている。
そして、このペアチップ４並びに導体ワイヤ１４が接続
された導体パターン８を包囲する範囲に封止樹脂１６を
以てガードリング１８が形成される。即ち、樹脂供給手
段としてのシリンジ２０の先端に取り付けられたニード
ル２２が用いられ、このニードル２２から回路基板２の
上面に一筆書きの形態で封止樹脂１６が供給される。
シリンジ２０の近傍には、加熱源としてのレーザー源２
４からレーザーエネルギを受けて加熱線としてのレーザ
ー光２６を発生するレーザー照射管２８が設置されてい
る。そして、レーザー光２６はニードル２２から回路基
板２上に滴下された封止樹脂１６に照射される。
このレーザー光２６の照射を受けた封止樹脂１６は、レ
ーザー光２６のエネルギで加熱され、その加熱により硬
化する。即ち、この硬化によって封止樹脂１６の流動が
阻止され、第２図の（Ｃ）に示すように、狭い範囲で十
分な高さ及び強度を持つガードリング１８に形成される
。
このガードリング１８の内部には、第２図の（Ｄ）に示
すように、シリンジ２０を以てニードル２２から封止樹
脂１６が充填され、第２図の（Ｅ）に示すように、ペア
チップ４の上面を十分な厚みを以て覆う樹脂皮膜が形成
されて樹脂封止を完了する。
このような樹脂封止では、封止樹脂１６の熱硬化を利用
して少ない封止樹脂１６で十分な強度と高さを持つガー
ドリング１日を形成し、その内部にガードリング１８を
形成した同様の封止樹脂１６を以て封止を行われる。特
に、加熱硬化によって、ガードリング１８を形成すべき
封止樹脂１６の流れ出しが阻止できるので、シリンジ２
０の操作が容易でしかも、精度の高いガードリング１８
が形成される。
実験によれば、封止樹脂１６にエポキシ樹脂を用いた場
合、レーザー光２６で封止樹脂１６の表面温度を１５０
°Ｃないし２００℃に上昇させることができ、封止樹脂
１６を熱硬化させ、ペアチップ４を覆う封止樹脂１６の
充填に十分な強度と高さを設定することができた。
なお、実施例では、加熱源にレーザー源２４を用いた場
合について説明したが、可視光や赤外線を発生する光源
、あるいは、熱風を発生する熱源を用いてもよく、同様
にガードリング１８を形成すべき封止樹脂１６の熱硬化
を行うことができる。Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. 1 and 2 show an embodiment of the semiconductor encapsulation method of the present invention. As shown in FIGS. 1 and 2 (A), a circuit board 2 is formed of an insulating material such as alumina or ceramic, and a paired chip 4 as a semiconductor element is formed on the surface of the circuit board 2.
Conductors 6 are formed by printing on the portions where the components are to be mounted, and conductor patterns 8 are formed on the conductors 6 at regular intervals. The conductor pattern 8 forms a circuit pattern with circuit components and other functional circuits (not shown). As shown in FIG. 2(B), the paired chips 4 are fixed to the upper surface of the conductor 6 with a conductive adhesive 10, and the semiconductor substrate of the paired chips 4 is electrically connected to the conductor 6. Electrode 1 formed on the edge of paired chip 4
A conductor wire 14 is connected between the conductor pattern 2 and the corresponding conductor pattern 8 by wire bonding, so that they are electrically connected. Then, a guard ring 18 is formed using a sealing resin 16 in a range surrounding the pair chip 4 and the conductor pattern 8 to which the conductor wire 14 is connected. That is, a needle 22 attached to the tip of a syringe 20 is used as a resin supply means, and the sealing resin 16 is supplied from the needle 22 onto the upper surface of the circuit board 2 in a single stroke. A laser source 2 as a heating source is provided near the syringe 20.
A laser irradiation tube 28 is installed which receives laser energy from 4 and generates laser light 26 as a heating wire. Then, the laser beam 26 is irradiated from the needle 22 onto the sealing resin 16 dropped onto the circuit board 2. The sealing resin 16 irradiated with the laser beam 26 is heated by the energy of the laser beam 26, and is cured by the heating. That is, this curing prevents the sealing resin 16 from flowing, and as shown in FIG. 2C, the guard ring 18 is formed to have sufficient height and strength within a narrow range. The inside of this guard ring 18 is filled with sealing resin 16 from a needle 22 using a syringe 20, as shown in FIG. 2(D), and the paired chips 4 are filled as shown in FIG. A resin film covering the upper surface with sufficient thickness is formed to complete the resin sealing. In such resin sealing, a guard ring with sufficient strength and height is formed using a small amount of sealing resin 16 by utilizing thermosetting of the sealing resin 16, and a guard ring 18 is formed inside the guard ring. Sealing is performed using a similar sealing resin 16. In particular, heating and curing can prevent the sealing resin 16 that should form the guard ring 18 from flowing out.
Guard ring 18 that is easy to operate and has high precision
is formed. According to experiments, when an epoxy resin is used as the sealing resin 16, the surface temperature of the sealing resin 16 is raised to 150℃ using the laser beam 26.
℃ to 200° C., the sealing resin 16 was thermally cured, and the strength and height sufficient for filling the sealing resin 16 covering the paired chips 4 could be set. In addition, in the embodiment, a case has been described in which the laser source 24 is used as the heating source, but a light source that generates visible light or infrared rays, or a heat source that generates hot air may be used, and the guard ring 18 may be formed in the same way. The sealing resin 16 can be thermally cured.
以上説明したように、この発明によれば、次の効果が得
られる。
（ａ） 封止樹脂を加熱によって硬化させてガードリ
ングを形成するので、ガードリングの形成時間が短く、
しかもガードリングを即座に封止樹脂を充填できる程度
の強度に硬化させることができ、ガードリングの形成及
びその内部への封止樹脂の充填を同一工程で行うことが
でき、製造時間を短縮でき、製造コストの低減を図るこ
とができる。
（ｂ） ガードリングは封止樹脂を加熱して形成する
ので、その加熱により硬化を速めることができ、ガード
リングを形成する封止樹脂とガードリングの内部に充電
すべき封止樹脂に同一のものを使用でき、ガードリング
の形成に特別な封止樹脂を用いる必要がないため、材料
面からも製造コストの低減が図られる。
（Ｃ） ガードリングを形成するための封止樹脂が持
つ流動性によりこの封止樹脂が回路基板面へ必要以上に
拡がることを防止でき、回路基板の高密度実装に寄与す
ることができる。As explained above, according to the present invention, the following effects can be obtained. (a) Since the guard ring is formed by hardening the sealing resin by heating, the formation time of the guard ring is short.
Moreover, the guard ring can be instantly cured to a strength that allows it to be filled with sealing resin, and the formation of the guard ring and the filling of the sealing resin inside it can be performed in the same process, reducing manufacturing time. , it is possible to reduce manufacturing costs. (b) Since the guard ring is formed by heating the sealing resin, the heating can speed up curing, and the sealing resin forming the guard ring and the sealing resin to be charged inside the guard ring are Since there is no need to use a special sealing resin to form the guard ring, manufacturing costs can be reduced from the material standpoint as well. (C) The fluidity of the sealing resin for forming the guard ring prevents the sealing resin from spreading more than necessary onto the circuit board surface, contributing to high-density mounting of the circuit board.
第１図はこの発明の半導体封止方法の一実施例を示す部
分斜視図、
第２図はこの発明の半導体封止方法の一実施例を示す断
面図である。
２・・・回路基板
４・・・ペアチップ（半導体素子）
１６・・・封止樹脂
１８・・・ガードリング
−杯ζ
第２FIG. 1 is a partial perspective view showing an embodiment of the semiconductor sealing method of the present invention, and FIG. 2 is a sectional view showing an embodiment of the semiconductor sealing method of the present invention. 2... Circuit board 4... Pair chip (semiconductor element) 16... Sealing resin 18... Guard ring-cup ζ 2nd
Claims (1)
ガードリングを形成し、このガードリングの内部に封止
樹脂を充填させて半導体を封止する半導体封止方法にお
いて、 前記回路基板の前記ガードリングを形成すべき部分に封
止樹脂を供給しながら、前記回路基板に供給された前記
封止樹脂を加熱して硬化させることを特徴とする半導体
封止方法。[Scope of Claims] A semiconductor encapsulation method in which a guard ring is formed around the semiconductor of a circuit board on which the semiconductor is installed, and the inside of the guard ring is filled with a sealing resin to seal the semiconductor. A method for encapsulating a semiconductor, comprising: heating and curing the encapsulating resin supplied to the circuit board while supplying the encapsulating resin to a portion of the circuit board where the guard ring is to be formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29035290A JPH04163926A (en) | 1990-10-26 | 1990-10-26 | Sealing method for semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29035290A JPH04163926A (en) | 1990-10-26 | 1990-10-26 | Sealing method for semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04163926A true JPH04163926A (en) | 1992-06-09 |
Family
ID=17754934
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29035290A Pending JPH04163926A (en) | 1990-10-26 | 1990-10-26 | Sealing method for semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04163926A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0568392A2 (en) * | 1992-04-30 | 1993-11-03 | Sharp Kabushiki Kaisha | Assembly structure and assembling method of flat type display device and apparatus and method for supplying and curing resin therefor |
| CN103137523A (en) * | 2011-11-30 | 2013-06-05 | 株式会社安川电机 | Robot system and method of manufacturing workpiece |
-
1990
- 1990-10-26 JP JP29035290A patent/JPH04163926A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0568392A2 (en) * | 1992-04-30 | 1993-11-03 | Sharp Kabushiki Kaisha | Assembly structure and assembling method of flat type display device and apparatus and method for supplying and curing resin therefor |
| EP0568392A3 (en) * | 1992-04-30 | 1995-11-08 | Sharp Kk | Assembly structure and assembling method of flat type display device and apparatus and method for supplying and curing resin therefor |
| CN103137523A (en) * | 2011-11-30 | 2013-06-05 | 株式会社安川电机 | Robot system and method of manufacturing workpiece |
| JP2013111736A (en) * | 2011-11-30 | 2013-06-10 | Yaskawa Electric Corp | Robot system and method of manufacturing workpiece |
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