JPH04163703A - Data reading circuit - Google Patents

Abstract

PURPOSE:To make it possible to pull the read signal, when a writing state is switched into a reading state, into a specified amplitude quickly by switching an input signal into an AGC circuit in the writing state with a switching circuit so that the input signal is aligned with the amplitude of the input signal in the reading state. CONSTITUTION:A RAM 4 is controlled with an address signal. A signal having the amplitude corresponding to a storing cylinder is outputted into an amplitude controlling circuit 3 as the RAM output signal (f). The amplitude controlling circuit 3 outputs an amplitude-controlling-circuit output signal (e) obtained by controlling the RAM output signal (f) at the specified amplitude into a switching circuit 1. The switching circuit 1 selects the amplitude-controlling- circuit output signal (e) which is approximate to a data reading signal (a) when a read/write (R/W) switching signal (b) sent from an upper position is in the writing state. When the R/W switching signal (b) is in the reading state, the data reading signal (a) is selected. Then, a switching-circuit output signal (c) is outputted into an AGC circuit 2. Therefore, the fluctuation of the amplitude of the input signal becomes less in the automatic gain control circuit (AGC circuit) 2 even if the writing state is switched into the reading state.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data reading circuit used in a magnetic disk device.

[Conventional technology]

A conventional data read circuit is controlled by switching between a data read (hereinafter abbreviated as "read") state and a data write (hereinafter abbreviated as "write") state. Then, as shown in FIG. 3, an automatic gain control circuit (hereinafter abbreviated as AGC circuit) receives a data read signal, which is data read from the magnetic head, and controls the gain so as to have a predetermined output amplitude.
It is composed of 2.

Next, the operation of the conventional data read circuit will be explained. As shown in FIG. 4, when the read/write switching signal (hereinafter abbreviated as R/W switching signal) from the host device is in the write state, the data read signal a has no amplitude.
Therefore, the gain of the AGC circuit 2 is maximized to obtain a predetermined output amplitude.

Subsequently, when the R/W switching signal switches from the write state to the read state, the data read signal a suddenly changes from a no-signal state to a signal state. At this time, since the AGC circuit 2 has the maximum gain, the AGC output signal, which is the output of the AGC circuit 2, becomes excessive, and then gradually falls to a predetermined output amplitude.

[Problem to be solved by the invention]

This conventional data readout circuit has a problem in that it takes a long time for the AGC output signal to stabilize at a constant amplitude because the AGC circuit cannot follow sudden changes in input amplitude.

[Means to solve the problem]

The data read circuit of the present invention includes a random access memory that stores read signal information of the magnetic head for each cylinder in advance and outputs the corresponding read signal information based on an address signal indicating the cylinder position of the magnetic head. , an amplitude control circuit that outputs a signal with a constant amplitude according to an output signal of the random access memory; and a switching signal from a host device that sends out the output signal of the amplitude control circuit when writing data to the magnetic head;
It is comprised of a switching circuit that sends out a data read signal when reading data from the magnetic head, and an automatic gain control circuit that controls the gain of the output signal sent out from the switching circuit so that it has a constant amplitude.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, the data reading circuit of the present invention includes a RAM 4 controlled by an address signal g indicating the cylinder position of the magnetic head, an amplitude control circuit 3 which outputs a signal having a constant amplitude from the RAM output signal; A switching circuit 1 that selects either the amplitude control circuit output signal e or the data read signal a according to the R/W switching signal, and an AGC circuit that controls the gain of the switching circuit output signal C so that it always has a constant amplitude. It consists of 2.

FIG. 2 is a time chart diagram of the main signals in FIG. 1.

The amplitude of the read data signal read from the magnetic head differs depending on the cylinder position, and the amplitude of the read data signal for each cylinder from the magnetic head is stored in analog form in the RAM 4.
Information that has been digitally converted is stored. The RAM 4 is controlled by the address signal and outputs a signal having an amplitude corresponding to the stored cylinder to the amplitude control circuit 3 as a RAM output signal. The amplitude control circuit 3 outputs, to the switching circuit 1, an amplitude control circuit output signal e which is controlled to have a constant amplitude of the RAM output signal. The switching circuit 1 selects the amplitude control circuit output signal e which is similar to the data read signal a when the R/W switching signal sent from the host device (not shown) is in the write state. When the switching signal A is in the read state, the data read signal a is selected and outputted to the AGC circuit 2 as the switching circuit output signal C.

Therefore, in the write state, an output signal similar to the switching circuit output signal C in the read state is output to the AGC circuit 2. Therefore, even when the AGC circuit 2 switches from the write state to the read state, the amplitude fluctuation of the input signal is small.

〔Effect of the invention〕

As explained above, in order to switch the input signal to the AGC circuit in the write state by the switching circuit so as to match the amplitude of the input signal in the read state, the read signal when switching from the write state to the read state is This has the effect that the amplitude can be quickly pulled to a predetermined amplitude.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a time chart of the main signals in FIG. 1, FIG. 3 is a block diagram showing a conventional example, and FIG. FIG. 3 is a time chart diagram of main signals. DESCRIPTION OF SYMBOLS 1...Switching circuit, 2...AGC circuit, 3...Amplitude control circuit, 4...RAM.

Claims (1)

[Claims] a random access memory that stores readout signal information of the magnetic head for each cylinder in advance and outputs the corresponding readout signal information based on an address signal indicating the cylinder position of the magnetic head; an amplitude control circuit that outputs a signal with a constant amplitude according to an output signal; a switching signal from a host device that sends out the output signal of the amplitude control circuit when writing data to the magnetic head; and when reading data from the magnetic head; 1. A data read circuit comprising: a switching circuit that sends out a data read signal; and an automatic gain control circuit that controls the gain of the output signal sent from the switching circuit so that it has a constant amplitude.