JPH04162113A - Power supply voltage dropping circuit - Google Patents

Abstract

PURPOSE:To minimize the working delay of an integrated circuit which is caused by the rise of temperature, the process variance, etc., by supplying the reference voltage to the power supply voltage dropping circuit. CONSTITUTION:The reference voltage Vref rises as the temperature rises, and the threshold voltage of a MOSFET contained in a reference voltage generating circuit 1 rises. Therefore, the power supply voltage Vdd also rises as the temperature rises. Meanwhile the delay time of a semiconductor circuit 3 increases as the temperature rises as long as the Vdd is kept constant. Then the Vdd rises as the temperature rises and the gate length of the MOSFET increases. The working of the circuit 3 is accelerated as the Vdd rises. Thus it is possible to prevent the increase of the delay time caused by the rise of temperature and the rise of the threshold voltage.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit, and is particularly suitable for a semiconductor integrated circuit equipped with a power supply voltage step-down circuit that steps down the power supply voltage supplied from the outside within the integrated circuit. Provides a power supply voltage step-down circuit.

[Conventional technology]

A known example of integrating a conventional power supply voltage step-down circuit on an integrated circuit is IEEE, 1990 Symposium on VLSI Circuits Digest of Technical Papers P, 75 (IEEE, '90
Symposiu+++ on V L S
I C1rcuitsp, 75) is known.

In this known example, a circuit that outputs a constant voltage that is independent of the temperature or the manufacturing process of the semiconductor integrated circuit is used as a reference voltage generating circuit that serves as a reference for the step-down circuit.

[Problem to be solved by the invention]

In the above-mentioned known example, a circuit that outputs a constant voltage that is independent of temperature or manufacturing process is used as the reference voltage generating circuit. On the other hand, in integrated circuits using MOSFETs, an increase in temperature slows down the operating speed. Furthermore, it is known that, due to process variations, for example, if the gate length of a MOSFET becomes larger than a designed value, the operating speed will also become slower. However, in the above-mentioned known example, the reference voltage does not change even if there is a temperature change or a process change. Therefore, it can be said that the above-described delay in operating speed due to temperature rise or process variation was not taken into account.The present invention solves the problems of the above-mentioned known examples, and when the temperature rises or process variation This provides a means to minimize delays in operating speed in certain cases.

[Means to solve the problem]

In order to solve the above problems, the present invention uses the following means. The first means is a circuit that generates a reference voltage for a power supply voltage step-down circuit, and is a means for increasing the reference voltage as the temperature rises. The second means is a circuit that generates a reference voltage, which is a MOSFE formed on a semiconductor substrate.
This is a means for setting the threshold voltage of the MOSFET having the minimum gate length among T as a reference voltage.

The third means is a means for generating a reference voltage by superimposing the first means and the second means.

[Effect]

According to the first means of the present invention, the reference voltage increases as the temperature rises, and this reference voltage is used in the power supply voltage step-down circuit, so that the output voltage, which is the power supply voltage inside the integrated circuit, increases. will rise. Increasing the output voltage increases the speed of the MO8 integrated circuit. Therefore, it has the effect of canceling out the speed delay caused by the temperature rise and preventing an increase in the delay time caused by the temperature rise.

On the other hand, in MO8 integrated circuits, ! is used! 'l0SFE
The gate length of T may become longer than the designed value due to fluctuations in the manufacturing process. At this time, the current driving capability of the MOSFET is reduced, so the operating speed becomes slower than the designed value. On the other hand, it is known that as the gate length of a MOSFET increases, its threshold voltage increases.According to the second means of the present invention, the threshold voltage of the MOSFET is given to the reference voltage. Therefore, MOSFET
When the gate length becomes longer, increasing the voltage of the reference voltage further increases the output voltage of the power supply voltage generation circuit, which has the effect of preventing an increase in delay time.

In the third means of the present invention, the reference voltage of the first means and the second
Since the reference voltage of the above means is superimposed, it is effective to prevent an increase in the delay time of the integrated circuit due to temperature rise and process fluctuation.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a power supply voltage step-down circuit according to a first embodiment of the present invention, a diagram conceptually showing the relationship between the characteristics of the reference voltage generation circuit, the delay time of the semiconductor circuit, and the reference voltage. In FIG. 1, 1 is a reference voltage generation circuit, 2 is a differential amplifier, and 3 is a semiconductor circuit. The power supply voltage step-down circuit converts the reference voltage Vref generated from the reference voltage generation circuit 1 into a low impedance one using the differential amplifier 2 to generate a stepped down power supply voltage Vdd, which is supplied as the power supply voltage to the semiconductor circuit 3. . Therefore, the power supply voltage Vdd is approximately equal to the reference voltage Vref generated by the reference voltage generation circuit.The present invention is characterized by this reference voltage generation method. That is, as shown in FIG. 1, Vref increases as the temperature rises, and also increases as the threshold voltage of the MOSFET used in the reference voltage generating circuit increases. Therefore, the voltage of Vdd similarly increases as the temperature rises, and increases as the threshold voltage of the MOSFET increases. On the other hand, if the power supply voltage is constant, the higher the temperature, the smaller the MOSFET's current driving ability, which increases the delay time of the semiconductor circuit.6. An increase in the threshold voltage of the MOSFET means that the current drive capability of the MOSFET decreases, which also increases the delay time.6 In the present invention, as the temperature increases, the
05FET is characterized in that the power supply voltage increases as the gate length increases, but the operation of the semiconductor circuit is
As shown in the figure, the speed becomes faster as the power supply voltage increases, which has the effect of preventing an increase in delay time due to the rise in temperature or rise in threshold voltage as described above.

FIG. 2 shows the dependence of the drain current of a MOSFET on the gate voltage as a temperature parameter. This figure specifically shows a circuit means for increasing the reference voltage as the temperature increases. As shown in Figure 2,
In a region where the gate voltage is below the threshold voltage, that is, about 0.7 V or below, the MOSFET current increases exponentially with respect to the gate voltage. The reciprocal of the slope, that is, the gate voltage required to change the current by one order of magnitude, is room temperature (2
3°C), it is approximately 90 mV/DEC, and at 80°C, it is approximately 106 mV/DEC. Therefore, if the slope of this drain current can be extracted as a voltage, it is possible to obtain a reference voltage whose voltage increases with temperature rise.

FIG. 3 shows a circuit for extracting the slope of the drain current shown in FIG. 2 as a voltage. In FIG. 3, 31 is a MOSFET, 32 is a current source for providing a current of 100nA, 33 is a MOSFET, and 34 is a 10nA current source.
This is a current source for providing a current of A. In Figure 3, MOS
FETs 31 and 33 have the same device parameters
It is an OSFET. In the circuit of Figure 3, MOSFET3
1 is diode-connected, but a current of 100nA flows through it, so Va has a current of 100nA.
A gate voltage Vg (100 nA) required for A to flow appears. The gate voltage of MOSFET 33 is Va, but since a current source that flows 10 nA is connected, the gate voltage Vg (1
A voltage minus 0 nA) appears at its source electrode. Therefore, the output voltage terminal of this circuit has a MOSFET of 10
A difference between the gate voltages ΔVg=Vg(100nA) Vg(10nA) required to flow currents of 0 nA and 10 nA appears. As shown in FIG. 2, this voltage increases as the temperature increases, from 90 mV at room temperature to 106 mV at 80G.

In the embodiment shown in FIG. 3, it is assumed that MOSFETs 31 and 33 have the same gate length, gate width, and threshold voltage, but in addition to these conditions, the following applications can be considered.1 For example,
The gate width of MOSFET 31 is set to 1/10 of the gate width of NO5FET 33. In this case current source 3
If current source 2 and current source 34 are configured to provide the same current, the same effect as the circuit shown in FIG. 3 can be obtained.

In addition, the threshold voltage of NO5FET31 is set to Vth (31
), the threshold voltage of NO5FET33 is Vth (33)
If the threshold voltage is set so that Vth(33)<Vth(31) holds, the output voltage of the circuit will be the temperature-dependent voltage ΔVg and the temperature-independent Vg(3
1) The sum of the voltages -Vg(33) is obtained. That is, a voltage such as V o =ΔVg+Vg(31) Vg(33) is obtained.

FIG. 4 shows another circuit method for extracting the slope of the drain current shown in FIG. 2 as a voltage.

41.42 in the 4th W is NO3FET with the same constant.

43 is a differential amplifier, 44 and 45 are each 100nA
It is a current source that flows t 10 n A. Now, if a voltage Vi is applied to the positive input terminal of the differential amplifier 43, a voltage Vi also appears at the negative input terminal due to the action of the differential amplifier. Since the negative input terminal is connected to the source end of NO5FET41, the gate electrode Va has Vi
The gate voltage V required to cause 100, nA to flow
A voltage equal to the sum of g (100 n A) will appear. That is, Va=Vi+Vg(lOOnA),
Since Va is connected to the gate electrode of the NO5FET 42 through which a current of 10 nA flows, the potential Vo of the source electrode of the NO5 FET 42 is a value less than Va minus the gate voltage Vg (10 nA) required for flowing 10 nA.

Therefore, Vo=Va-Vg(l On A)=Vi+Vg(10
0nA)-Vg(10nA)=Vi+AVg. In other words, the output voltage of this circuit appears to be ΔVg larger than the input voltage Vi. As shown in FIG. 2, this voltage also increases as the temperature increases, from 90 mV at room temperature to 106 mV at 80C.

In the embodiment shown in FIG. 4, NO5FETs 41 and 42 were assumed to have the same gate length, gate width, and threshold voltage, but in addition to these conditions, the same device parameters as described in the explanation of FIG. Needless to say, changes are possible.

The method of extracting the voltage shown in Figs. 3 and 4 is a temperature-dependent voltage; however, this voltage is 10
It is too small, around 0 mV, and cannot be used as a reference voltage for a power supply voltage step-down circuit.

Therefore, make sure that a large voltage can be extracted as shown in the following figure. FIG. 5 is a diagram showing a second embodiment of the present invention, and shows a circuit for generating a reference voltage having a relatively large and positive temperature dependence. In Figure 5,
Applying the voltage extraction method of the embodiment shown in Fig. 3, 4ΔV
A voltage g can be output to vl. That is,
4 diode-connected N through which a current of 10i flows
There is an O8FET, and this is the NO5FET shown in Figure 3 (7).
It corresponds to 31. Also, there are four NOs through which a current i flows.
There are 8 FETs, which correspond to N05FE733 in FIG. Therefore, the voltage v1 taken out is NO5F
67g for 4 ETs, that is, V1=4ΔVg.

On the other hand, for the voltage vl in FIG. 5, by applying the voltage extraction method of the embodiment shown in FIG. 4, it is possible to extract a voltage 4ΔVg greater than vl, that is, a voltage of V2=v1+4ΔVg.

There are four diode-connected NO5FETs through which a current of 10i flows, and this is the NO5FE in Figure 4.
Corresponds to T41. Also, there are four N through which a current i flows.
This is because there is an O8FET, which corresponds to the fourth @NO5FET42.

In this way, by gradually adding voltage,
Finally, a voltage of 32ΔVg can be obtained at vl. If ΔVg at room temperature is 90 mV, approximately 2.
A relatively large reference voltage of 5V is obtained. Needless to say, this output voltage also tends to increase as the temperature rises.

FIG. 6 shows a circuit diagram of a third embodiment of the present invention, and shows a circuit for extracting the threshold voltage of the NO8FET as a reference voltage. In FIG. 6, 61 is a diode-connected nNO8FET.

62 is a diode-connected pMO5FET.

63 is a differential amplifier, and 64 is a current source that provides a current of 10 nA. In addition, 65 is an input terminal, 66 is an intermediate contact, 6
7 is an output terminal. Here, the threshold voltage is MOS
It is defined as the gate voltage required to cause a current of 10 nA to flow through the FET. In FIG. 6, it is assumed that a potential Vi is input to the input terminal 65. Then, due to the action of the differential amplifier 63, the voltage at the intermediate junction 66 becomes the same potential as Vi. Current source 6 is connected to diode-connected MOSFET 61, 62.
4, a current of 10 nA flows through the output voltage terminal 67 than the terminal 66.
A voltage higher by the threshold voltage of the FET, that is, Vi+V
A voltage of th(n)+Vth(P) will appear. In this way, it is possible to extract the threshold voltage using the circuit shown in FIG.

The effect of extracting the threshold voltage in this way will be explained using the following diagram.

FIG. 7 shows the relationship between the gate length and threshold voltage of a MOSFET. As shown in Figure 7, MOSF
The threshold voltage of ET increases as the gate length increases. The operating speed of a semiconductor integrated circuit is generally determined by the current drive capability of a MOSFET with a minimum gate length. Therefore, if the gate length becomes large due to problems in the semiconductor manufacturing process, the delay time will increase. However, at the same time, the threshold voltage also increases, so the sixth
If the reference voltage is increased as shown in the figure.

This makes it possible to minimize the increase in delay time. That is, the design value of the minimum gate length within the semiconductor substrate is L2.
Then, the threshold voltage at that time is v2. If the gate length becomes longer due to the manufacturing process, the threshold voltage at that time will be V, which is greater than v2. Therefore, by using this as a reference voltage, the increase in delay time can be minimized. It can be suppressed.

Conversely, if the gate length is shortened to Ll, the threshold voltage at that time becomes vl, which is a smaller value than v2. At this time, since the gate length is short, the delay time is shorter than the designed value. Therefore, there is no problem even if the threshold voltage becomes smaller and the step-down power supply voltage decreases.

FIG. 8 is a circuit diagram of a fourth embodiment of the present invention.

In FIG. 8, 81 is a temperature-dependent reference voltage generation circuit;
2 is a reference voltage generating circuit 83 that depends on the threshold voltage of the MOSFET, is a current source circuit, 84 is a differential amplifier that supplies a stepped down voltage to the semiconductor circuit when the semiconductor circuit is operating, and 85 is a reference voltage generating circuit that is dependent on the threshold voltage of the MOSFET. A differential amplifier supplies a step-down voltage to the semiconductor circuit in a standby state, 86 is a node where a temperature-dependent reference voltage is generated, and 87 is a node where a temperature-dependent and threshold voltage-dependent reference voltage is generated. Node 88 is a semiconductor circuit. In the embodiment shown in the figure, a temperature-dependent reference voltage is generated at node 86. moreover,
This voltage is input to a reference voltage generation circuit that is dependent on the threshold voltage. This makes it possible to generate a voltage that has both temperature dependence and threshold voltage dependence at the node 87 where the reference voltage is output. Furthermore, by performing impedance conversion on this voltage using a differential amplifier of 84.85, the semiconductor circuit becomes temperature dependent.
In addition, it is possible to supply a power supply voltage that is dependent on the threshold voltage.

FIG. 9 shows simulation waveforms for the circuit diagram of the example shown in FIG. Figure 9(a) shows the case where the threshold voltage of the MOSFET is constant and the temperature is changed.
8 as the temperature increases from 0℃ to 35℃ to 70℃.
It can be seen that the node voltages at nodes 6 and 87 become larger. Moreover, FIG. 9(b) is n M OS F E T
This figure shows the case where the threshold voltage Vto(n) of 86 changes.Since the temperature does not change, the node voltage of 86 is constant, but the voltage 86 is the sum of this voltage and the threshold voltage.
7, its output voltage also increases as the threshold voltage increases. Therefore, in this embodiment as well, when the operating speed of the integrated circuit is slowed down due to a rise in temperature or a rise in threshold voltage, increasing the internal power supply voltage has the effect of minimizing the delay.

FIG. 10 is a circuit diagram of a fifth embodiment of the present invention. In this embodiment, 102 is n with threshold voltage V'thn.
MOS FET, 101 is the threshold voltage V't
pMO5FET with hp, 103 is differential amplifier 104
, 105 is pM with threshold voltage v thp, 08F
ET, 106, 107, and 108 are constant current sources. 6th
The examples in the figure are nMOS FET and pMO3FE.
In contrast to the circuit that outputs the sum of the threshold voltages of T, this embodiment is a circuit that outputs the smaller threshold voltage. When the input voltage is Vin, the intermediate node Va has a constant current g10
6 becomes Vin+v' thp. Further, the voltage at the intermediate node vb becomes Vin+V'thn due to the action of the constant current source 107 and the differential amplifier 103. These voltages are MO
The signals are input to SFETs 104 and 105, respectively.

At this time, the output voltage Vo is v t from Va and vb, respectively.
hp tries to reach a higher voltage, but the rate is limited by the lower voltage. Therefore, the output voltage vO is Vin+Vth
p+ (the smaller voltage of V'thn and V'thp) will be output. In this example, pMO5FE
It outputs the smaller of the threshold voltages of T and nMOSFET. Therefore, if this voltage is used as a reference voltage, even if the threshold voltage of only one type of MOSFET decreases, the reference voltage can be adjusted to 74.
% can be reduced.

FIG. 11 is a block diagram of a sixth embodiment of the present invention.

In this figure, 111 is an internal circuit, 112 is a temperature threshold voltage dependent step-down circuit, 113 is a signal input circuit, and 114
1 is a constant voltage step-down circuit, 115 is an output circuit, 116 is a signal input circuit, and 117 is a signal output circuit. This embodiment shows a method of ideally using the temperature threshold voltage dependent step-down circuit described up to the fifth embodiment of the present invention on a semiconductor circuit. In other words, as mentioned above, the internal circuit uses the voltage generated in the temperature threshold voltage dependent step-down circuit as the power supply voltage, thereby minimizing the reduction in operating speed due to fluctuations in temperature or manufacturing process. I can do it. - On the other hand, since the input circuit must input a voltage such as TTL standard, the voltage of the input signal does not depend on temperature, etc., so there is a problem in using a temperature threshold voltage dependent step-down circuit. Therefore, a constant voltage step-down circuit that does not depend on the temperature or the threshold voltage of the MOSFET is used for the input circuit. In addition, a relatively large voltage must be output to the output circuit.In contrast, a large voltage can be output by directly using the power supply voltage Vcc without using a step-down circuit. In this way, in this example, by using the temperature threshold dependent step-down circuit only in the internal circuit, the semiconductor device can minimize the increase in signal delay time without impairing the function of the input circuit. Integrated circuits become possible.

Although the details of the present invention have been described above, the present invention is applicable to all kinds of integrated circuits using MOSFETs, such as large-capacity memories, gate arrays, and ASICs, as the semiconductor circuits shown in the embodiments.

〔Effect of the invention〕

As described above, the present invention has the effect of minimizing the delay in the operating speed of an integrated circuit due to temperature rise or process variations by increasing the internal power supply voltage. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a power supply voltage step-down circuit according to the first embodiment of the present invention, a diagram conceptually showing the characteristics of the reference voltage generation circuit, and the relationship between the delay time of the semiconductor circuit and the reference voltage, and FIG. is a diagram showing the dependence of MOSFET drain current on gate voltage as a temperature parameter, Figure 3 is a diagram showing a circuit for extracting the slope of the drain current shown in Figure 2, and Figure 4 is a diagram showing the dependence of the drain current on the gate voltage of the MOSFET. FIG. 5 is a circuit diagram of the second embodiment of the present invention, FIG. 6 is a circuit diagram of the third embodiment of the present invention, and FIG.
The figure shows the relationship between the gate length and threshold voltage of a MOSFET, FIG. 8 is a circuit diagram of the fourth embodiment of the present invention, and FIG.
The figure is a diagram showing simulation waveforms for the embodiment of FIG. 8. FIG. 10 is a circuit diagram of a fifth embodiment of the invention, and FIG. 11 is a block diagram of a sixth embodiment of the invention. 'f, + diagram (temperature) ■piece n V? tf Fig. 2 Fig. 3 Fig. aIl shi・V gu (no 14) - direction (lθ7 ripple foil 4 times V section ￥ I5 圜 2 fig. 'f) 1 fig. 0,) 4) Two pieces, information pressure (V) (b) Yaren voltage (n 411 times

Claims (1)

[Scope of Claims] 1. A power supply voltage step-down circuit that is formed on a semiconductor substrate and supplies an internal power supply voltage obtained by stepping down the power supply voltage supplied from the outside to a circuit on the semiconductor substrate, the power supply voltage step-down circuit A power supply voltage step-down circuit characterized in that a reference voltage, which serves as a reference for the output voltage of the circuit, increases due to a rise in temperature. 2. A power supply voltage step-down circuit including the reference voltage generation circuit according to claim 1 above, in which a first current I_1 is applied to a first MOSFET having a gate length L_1 and a gate width W_1.
A second current I_2 is caused to flow through a second MOSFET having a gate length L_2 and a gate width W_2, and I_1L_1
A power supply voltage step-down circuit characterized in that the difference between the voltages generated in the first MOSFET and the second MOSFET under the condition satisfying /W_1>I_2L_2/W_2 is used as a reference voltage or a portion of the reference voltage. 3. A power supply voltage step-down circuit that is formed on a semiconductor substrate and supplies an internal power supply voltage obtained by stepping down the power supply voltage supplied from the outside to a circuit on the semiconductor substrate, and a reference for the output voltage of the power supply voltage step-down circuit. A power supply voltage characterized in that the reference voltage is the threshold voltage of a third MOSFET having a substantially minimum gate length among the MOSFETs formed on the semiconductor substrate or a constant multiple thereof. Step-down circuit. 4. A power supply voltage step-down circuit including the reference voltage generation circuit according to claim 3 above, wherein the third MOSFET
The third MOSFE is
A power supply voltage step-down circuit, characterized in that it generates a threshold voltage of T, and uses the threshold voltage as the reference voltage. 5. A reference voltage is generated by superimposing the reference voltage set forth in claim 1 and the reference voltage set forth in claim 3, and an internal step-down voltage is generated using the reference voltage as a reference. Power supply voltage step-down circuit. 6. A first power supply voltage step-down circuit formed on a semiconductor substrate and supplying an internal power supply voltage obtained by stepping down a power supply voltage supplied from the outside to a circuit on the semiconductor substrate;
The reference voltage that serves as the reference for the output voltage of the power supply voltage step-down circuit is a first reference voltage that increases due to temperature rise, or has a gate length that is substantially the smallest among the MOSFETs formed on the semiconductor substrate. A second reference voltage that is the threshold voltage of the MOSFET or a constant multiple thereof, or a third reference voltage that is the sum of the first reference voltage and the second reference voltage.
A semiconductor integrated circuit characterized in that the reference voltage is a reference voltage of A semiconductor integrated circuit characterized by: