JPH04157653A - Tracking error detector - Google Patents

Abstract

PURPOSE:To improve a tracking error detecting accuracy by measuring synchronization of a reproducing clock, and detecting a tracking error including linearity of a track. CONSTITUTION:An azimuth phase difference detector 4 for detecting a tracking error from digital signals of two channels recorded and reproduced from two multi-magnetic heads 1, 2 having reverse azimuths to each other, is provided. In order to decide an offset value of the detector 4, a synchronization detector 17 for detecting a synchronizing timing from the reproduced digital signal of one channel and converting it to a digital signal having a normal data train, is provided. Further, an error detector 18 for detecting the number of errors from the digital signal output from the synchronization detector, and a minimum value detector 19 for detecting the minimum value of the number of errors of the detector 18, are provided. The synchronization of the signal divided in frequency from a reproducing clock is measured to detect the tracking error. Thus, a tracking error detecting accuracy is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a tracking error detection device for detecting tracking errors in a digital magnetic recording device that converts a video signal into a digital signal and records and reproduces the same.

BACKGROUND OF THE INVENTION Conventionally, a tracking error detection device used in a home VTR uses a control track in the longitudinal direction of a magnetic tape using a pulse indicating the rotational phase of a head drum as a control signal, in addition to a video track for recording and reproducing video signals. During playback, tracking errors are detected by comparing the phase of the reproduced control signal and the phase of the head drum rotation pulse (for example, supervised by Ryo Takahashi, VTR technology by Japan Broadcasting Corporation). .

The tracking error detection device used for 10,000N 8mm videos sets four low-frequency pilots with different frequencies, and records the low-frequency pilots by multiplexing them with the same wave number onto the video signal for each video track. . During playback, two low frequency pilots recorded on both adjacent video tracks are detected as crosstalk from adjacent video tracks, and a tracking error is detected by comparing the power difference between the two low frequency pilots.

Problems to be Solved by the Invention However, with the above conventional method using a control track, it is not possible to detect the linearity of a video track, and it is extremely difficult to improve the accuracy of tracking error detection.

In addition, although the tracking error detection device used for conventional 8mm video can detect the linearity of the video track, frequency multiplexing the low frequency pilot makes it difficult to record and play back digital signals.
There were problems such as interference waves.

The present invention has been made in view of the above points, and provides a method for detecting the linearity of the video track, improving tracking error detection accuracy, and not interfering with the digital signal.2. An object of the present invention is to provide a King error detection device.

Means for Solving the Problems In order to achieve the above objects, the tracking error detection device of the present invention includes two multi-configured magnetic heads having mutually opposite azimuths, and two magnetic heads recorded and reproduced from the two multi-magnetic heads. An azimuth phase difference detector detects a tracking error from the channel digital signal, and in order to determine the offset value of the azimuth phase difference detector, the synchronization timing is detected from the reproduced one channel digital signal, and normal data is detected. a synchronization detection circuit that converts the digital signal into a digital signal having a column; an error detection circuit that detects the number of errors from the digital signal output from the synchronization detection circuit; and a minimum value detection circuit that detects the minimum number of errors of the error detection circuit. It consists of a circuit.

Effect of the Invention With the above-described configuration, the present invention utilizes the characteristic that the periods of the two reproduction clocks change in opposite directions when the two multi-magnetic heads deviate from the reproduction track during reproduction, to generate a signal obtained by dividing the frequency of the reproduction clock. Tracking errors are detected by measuring the period.

Furthermore, the problem that the track playback position becomes unstable when the cycle is measured alone is solved by a configuration that detects the track center position from the number of errors. Therefore, tracking errors including reproduction track linearity can be detected, and tracking error detection accuracy can be improved. Furthermore, since pilots and the like are not frequency multiplexed on low frequencies, there is no interference with digital signals.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a main part of a tracking error detection device according to an embodiment of the present invention. First, magnetic tape 3
A is a digital signal obtained by converting a video signal into a digital signal and adding a synchronization signal, an ID address signal, and an error correction code to the digital signal.

B total of 2 channels, how to do opposite azimuth to each other 2
Recording is performed using one multi-magnetic head 1.2.

Next, in reproduction, two digital signals of the A channel and the B channel are reproduced using two multi-magnetic heads 1 and 2 having mutually opposite azimuths. Next, the two reproduced digital signals are corrected in equalizer circuits 5 and 6 so that their frequency characteristics become differential characteristics, and then the integrator circuits 7 and
In step 8, integration is performed to convert the frequency characteristic of the cosine roll-off waveform that the recorded digital signal had. Next, the PLL circuits 9 and 10 reproduce the reproduced clocks A and B of the A channel and the B channel, respectively, in accordance with the reproduced digital signal applied from the integrating circuit 7.8. Here, as shown in FIGS. 2(a) and 2(b), the periods of the two reproduced clocks change in proportion to the tracking deviation. That is, Fig. 2(a)
As shown in the figure, the multi-magnetic head 1. has opposite azimuths on the track in the direction of the arrows (the anomalous angle is θ in the figure). 2 is traced, the actually reproduced period tA is shorter than the reference period T in the trajectory of the multi-magnetic helad 1 (tA<T). Furthermore, in the trajectory of the multi-magnetic head 2, the actually reproduced period tB is longer than the reference period T (tB>T).
. Therefore, the reproduced clocks A and B become as shown in FIG. 2(b), and their periods change in opposite directions in proportion to the tracking deviation.

Next, returning to FIG. 1, the reproduced clock A output from the PLL circuit 9 is subjected to frequency division by the frequency dividing circuit 11 in order to widen the dynamic range of tracking error detection.

Next, the period measuring circuit 12 converts the output of the frequency dividing circuit 11 into PL
Period measurement is performed using the reproduced clock B output from the L circuit 10. As described above, the periods of the reproduced clocks A and B change in opposite directions in proportion to the tracking error. Therefore, the output signal from the period measurement circuit 12 changes in proportion to the tracking deviation.

However, the output signal from the period measurement circuit 12 described above is
Only the amount of change (differential amount) in tracking deviation can be detected,
The tracking center position cannot be detected. Therefore, with the configuration of the synchronization detection circuit 17, error detection circuit 18, and minimum value detection circuit 19, the timing at which the multi-magnetic heads 1 and 2 are located at the center of the track is detected and output. Here, the recording format has the configuration shown in FIG. 4. That is, error correction parity is applied to image data using a product encoding method, and outer code parity and inner code parity are added as shown in FIG. 4(a). Next, the recording signal is read horizontally from FIG. 4(a), and a synchronization pattern and an ID address indicating the data position are added to form one synchronization block shown in FIG. 4(b), and error detection is performed. The minimum unit of

Next, returning to FIG. 1, the synchronization detection circuit 17 detects a synchronization pattern using the reproduced signal output from the integrating circuit 8 and the reproduced clock output from the PLL circuit 10, and converts the data bytes into normal order. Output for each synchronous block. Next, the error detection circuit 18 detects the number of errors for each synchronous block and outputs it to the minimum value detection circuit 19. Next, the minimum value detection circuit 19 compares the number of errors for each synchronous block, detects and outputs the timing of the minimum number. Here, as shown in FIG. 3, the number of errors increases as the amount of tracking error increases. Therefore, the timing signal output from the minimum value detection circuit 19 indicates the timing when the multi-magnetic heads 1 and 2 are positioned at the center of the track. On the other hand, returning to FIG. 1, the accumulator 13 is connected to the subtraction circuit 14. It is composed of a reference period setting circuit 15 and an accumulation circuit 16. Here, the subtracting circuit 14 and the reference period setting circuit 15 extract and output only the change proportional to the tracking deviation of the period measuring circuit 12. That is, the reference period setting circuit 15 records and holds the output of the period measuring circuit 12, which is the reference period when the multi-magnetic head 1.2 is located at the center of the track, according to the timing output of the minimum value detection circuit 19. do.

Next, the subtraction circuit 14 subtracts the data value held in the reference period setting circuit 15 from the output of the period measurement circuit 12, and outputs only the amount of change proportional to the tracking deviation.

Next, the accumulation circuit 1θ accumulates the output of the subtraction circuit 14 to detect the amount of tracking error. However, cumulative circuit 1
At step 6, a reset is performed in accordance with the timing output of the minimum value detection circuit 19, and the amount of tracking error from the location where the multi-magnetic head 1.2 is located at the center of the track is determined and output.

Effects of the Invention As described above, according to the embodiments of the present invention, tracking errors including track linearity can be detected by measuring the period of the reproduced clock, so the tracking error detection accuracy is improved compared to the conventional method. be able to.

Furthermore, since pilots and the like are not frequency-multiplexed on low frequencies, tracking errors can be detected without interfering with digital signals, which is extremely useful.

In addition, if one synchronization block is the minimum unit for error detection, one
Since the timing at which the multi-magnetic head is positioned at the center of the track is detected from the number of errors in the synchronization block, the timing at which the multi-magnetic head is positioned at the center of the track can be accurately detected. No need to insert.

In addition, in the embodiment of the present invention, since the tracking error is detected from the period change of two reproduced clocks reproduced by two multi-magnetic heads having mutually opposite azimuths, the influence of jitter is canceled out, and the influence of jitter is tracking error can be detected with higher accuracy.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main configuration of a tracking error detection device according to an embodiment of the present invention, FIG. 2(a) is a tracking state diagram showing the direction of tracking deviation, and FIG. 2(b) is a diagram showing the tracking error due to tracking deviation. Figure 3 is a waveform diagram showing changes in the period of the recovered clock, Figure 3 is a correlation diagram showing the number of errors with respect to the amount of tracking deviation, Figure 4 (a) is a configuration diagram of a correction block in the product coding method, Figure 4 (b) is It is a block diagram of one synchronous block in a recording format. 1.2... Multi-magnetic head, 3... Magnetic tape, 4... Azimuth phase difference detector, 5, 6... Equalizer circuit, 7, 8... Integrating circuit, 9.10...
・PLL circuit, 11... Branch circuit, 12...
・Period measurement circuit, 13...accumulator, 14...
・Subtraction circuit, 15...Reference period setting circuit, 16.
...Accumulation circuit, 17...Synchronization detection circuit, 18...
-Error detection circuit 19... Minimum value detection circuit. Name of agent: Patent attorney Akira Okaji et al. 28th 2nd
Figure Figure 3 Tracking Fl +

Claims (3)

[Claims] (1) A digital magnetic recording device that converts a video signal into a digital signal, adds a synchronization signal, an ID address signal, and an error correction code to the digital signal, and records and reproduces the signal, the device having a multi-configuration having mutually opposite azimuths. an azimuth phase difference detector for detecting a tracking error from two channels of digital signals recorded and reproduced from the two multi-magnetic heads; and an azimuth phase difference detector for determining an offset value of the azimuth phase difference detector. , a synchronization detection circuit that detects synchronization timing from the reproduced one-channel digital signal and converts it into a digital signal having a normal data string; and from the digital signal output from the synchronization detection circuit,
A tracking error detection device comprising: an error detection circuit that detects the number of errors; and a minimum value detection circuit that detects a minimum value of the number of errors of the error detection circuit. (2) The azimuth phase difference detector includes two equalizer circuits that generate two reproduced clocks from the two-channel A and B digital signals recorded and played back from the two multi-magnetic heads, and integrates the outputs of the equalizer circuits, respectively. two PLL circuits each locking to the output of the integrating circuit to obtain the reproduced clocks of the A and B channels; a frequency dividing circuit that divides the frequency of the reproduced clock of the A channel; A period measuring circuit that measures the period of the output signal from the cycle circuit using the reproduced clock of the B channel, and an accumulator that corrects an offset value from the output from the period measuring circuit and accumulates a tracking error, The tracking error detection device according to claim 1, configured to detect a tracking error. (3) The error correction code added is a correction code in units of one synchronization block, and the error detection circuit
3. The tracking error detection device according to claim 1, wherein the tracking error detection device is configured to detect the number of errors for each synchronization block.