JPH04153741A - Adverse debugging execution system for debugged program - Google Patents

Adverse debugging execution system for debugged program

Info

Publication number
JPH04153741A
JPH04153741A JP2277830A JP27783090A JPH04153741A JP H04153741 A JPH04153741 A JP H04153741A JP 2277830 A JP2277830 A JP 2277830A JP 27783090 A JP27783090 A JP 27783090A JP H04153741 A JPH04153741 A JP H04153741A
Authority
JP
Japan
Prior art keywords
instruction
execution
program
adverse
backward execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2277830A
Other languages
Japanese (ja)
Inventor
Makoto Osumi
大隅 信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2277830A priority Critical patent/JPH04153741A/en
Publication of JPH04153741A publication Critical patent/JPH04153741A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To acquire the necessary information and to eliminate the overhead by providing an instruction converter means and an adverse execution means which replaces an instruction obtained by the instruction converter means with another instruction preceding the instruction to be carried out next and performs a processing procedure for the adverse execution. CONSTITUTION:When a user tries to perform the adverse execution, an instruction converter means 12 converts the instruction 'br' which is processed precedently by a step into an instruction 'br 0x20' based on a conversion rule table 7 and by reference to an adverse execution information store file 2. An adverse execution means 13 stores the next instruction 'add' and replaces the 'br 0x20' produced the means 12 with an address including the 'add' if a debugged program is carried out halfway and the user tries to perform the adverse execution. Thus it is possible to omit such a troublesome case where the debugged program is carried out again from its head if the necessary information could not be obtained due to an operating mistake, etc.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、f■ダラムのデバッグ時における被デバツグ
ブーグラムの逆方向実行方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for backward execution of a debugged boogram when debugging an fDram.

[従来の技術] 従来、この種のデバッグ方式は、被デバッグプログラム
をデバッグする際に、被f′/4ッダデ田ダラムは順方
向に実行されるのみでToシ、逆方向に実行させること
ができない。
[Prior Art] Conventionally, in this type of debugging method, when debugging a program to be debugged, the program to be debugged is executed only in the forward direction, but cannot be executed in the reverse direction. Can not.

[発明が解決しようとするm1ll] 上述し九従来の技術では、オペレート建ス等によ〕、被
デバッグプログラムが実行され、必要な情報が一つ前の
命令で得られる場合でも、前−行り九処瑠と同じ処理を
稙デバッグプロダラムの先頭から実行しなければいけな
い為、必I!な情報が得られるまでのオーバーヘッドが
かかるという欠点がある。
[M1ll to be Solved by the Invention] In the above-mentioned nine conventional techniques, even when the program to be debugged is executed and the necessary information can be obtained from the previous instruction, the previous line is It is necessary to execute the same process from the beginning of the debugging program as in RIKUDORU! The disadvantage is that it requires overhead to obtain the appropriate information.

[課題を解決するための手段] 本発明は、前記課題を解決するための手段として、マン
マシンインタフェースを有するデバッグ処理において、
被デバッグプログラム実行時に、マシン語の一命令が処
理された時点で、退避要求テーブルに基づき、前記被デ
バッグプログラムのメモリ内のデータ領域、およびテキ
スト領域、およびレジスタから命令変換に必要な情報、
を逆方向実行情報格納ファイルに格納する変換情報退避
手段と、利用者よシ逆方向実行の要求がされた時点で、
前記逆方向実行情報格納ファイルを参照して、変換ルー
ルテーブルに基づき、一つ前に実行され九命令を変換す
る命令変換手段と、該命令変換手段によりて生成された
命令を1次に実行する命令の一つ前の命令に置き換え、
逆方向実行の処瑠手続きを行う逆方向実行手段と、を育
している。
[Means for solving the problem] As a means for solving the problem, the present invention provides a debugging process having a man-machine interface.
When a machine language instruction is processed during execution of the debugged program, information necessary for instruction conversion is obtained from the data area, text area, and register in the memory of the debugged program based on the save request table;
A conversion information saving means that stores the conversion information in a backward execution information storage file, and a conversion information saving means that stores the conversion information in a backward execution information storage file.
An instruction converter that refers to the backward execution information storage file and converts the nine instructions executed previously based on the conversion rule table, and executes the instruction generated by the instruction converter in the first order. Replace the command with the one before the command,
We are developing a backward execution means for performing a backward execution procedure.

[作用] 本発明の上述の手段によれば、前の命令を、容易に、再
実行させることができる。
[Operation] According to the above-described means of the present invention, a previous instruction can be easily re-executed.

[実施例コ 次に、本発明について図面を参照して詳細に説明する。[Example code] Next, the present invention will be explained in detail with reference to the drawings.

第1図は1本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

実施例の被デバッグプログラムのデバッグ逆方向実行方
式は、変換情報退避手段11と、命令変換手段12と、
逆方向実行手段13を含むデバッグ処理1と、逆方向実
行情報格納ファイル2と。
The backward debugging execution method for the program to be debugged according to the embodiment includes a conversion information saving means 11, an instruction conversion means 12,
A debug process 1 including a backward execution means 13 and a backward execution information storage file 2.

メモリ3と、レジスタ4と、プログラムカウンタ5と、
退避要求テーブル6と、変換ルールテーブル7とから構
成される。
memory 3, register 4, program counter 5,
It consists of a save request table 6 and a conversion rule table 7.

また、第2図は、被デバッグプログラムがメモリ3に割
シ当てられたイメージを示した概要図である。
Further, FIG. 2 is a schematic diagram showing an image in which a program to be debugged is allocated to the memory 3.

次に本発明の動作について図面を参照して説明する。Next, the operation of the present invention will be explained with reference to the drawings.

変換情報退避手段11は、被デバッグプログラムが、第
2図のOに示すbr命令(ブランチ命令)を実行する時
点で、退避要求テーブル6に基づき。
The conversion information saving means 11 converts information based on the saving request table 6 at the time when the program to be debugged executes the br instruction (branch instruction) shown at O in FIG.

メモリ3から、br命令があるアドレスと飛び先アドレ
スを、逆方向実行情報格納ファイル2に格納する。又、
第2図の■に示すadd命令を実行する時点で、退避要
求テーブル6に基づき、レジスタ4から図示の(114
6)の値を逆方向実行情報格納ファイル2に格納する。
The address where the br instruction is located and the jump destination address are stored from the memory 3 into the backward execution information storage file 2. or,
At the time of executing the add instruction shown in ■ in FIG.
6) is stored in the backward execution information storage file 2.

被デバッグプログラムの処理が第2図の■まで行われた
時に、利用者が逆方向実行を行おうとした場合、命令変
換手段12は、逆方向実行情報格納ファイル2を参照し
て、一つ前に処理された命令であるbr命令(第2図の
■)を変換ルールテーブル7に基づき、′″br  O
!20” と変換する。
If the user attempts to perform backward execution when the debugged program has been processed up to ■ in FIG. Based on the conversion rule table 7, the br instruction (■ in Figure 2), which is an instruction processed in
! Convert to 20”.

逆方向実行手段13は、被デバッグプログラムが第2図
の■までも埋が行われておシ、利用者が逆方向実行を行
おうとした場合、次の命令であるaid命令を記憶し、
命令変換手段12で生成された” l>r 0x20 
”をadd命令がおるアドレスに置き換える。そして、
被デバッグプログラムをシングルステップ実行させた後
に、記憶し九add命令を鴬のアドレスに置き換え、プ
ログラムカウンタ5を0x20時点のカウンタに戻す。
When the program to be debugged has been filled up to ■ in FIG. 2 and the user attempts to execute it in the backward direction, the backward execution means 13 stores the next instruction, the aid instruction, and
"l>r 0x20 generated by the instruction conversion means 12
” with the address where the add instruction is located. Then,
After executing the program to be debugged in a single step, the program counter 5 is stored and the 9 add instruction is replaced with the address of the user, and the program counter 5 is returned to the counter at the time of 0x20.

[発明の効果] 以上説明したように、本発明の被デバッグプログラムの
デバッグ時における逆方向実行方式によれば、デバッグ
時に、必要な情報をオペレートミス等で、得られなかっ
た場合、被デバッグプログラムを再度、先頭から実行す
るといった手間が不要となシ、それKよるオーバーヘッ
ドが省けるという効果がある。
[Effects of the Invention] As explained above, according to the backward execution method when debugging a debugged program of the present invention, if necessary information cannot be obtained due to an operator error or the like during debugging, the debugged program There is no need to re-execute the process from the beginning, and the overhead caused by this can be eliminated.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明のデパックにおける逆方向実行方式の
実施例を示す構成図であシ、 第2図は、被デバッグプログラムがメモリに割シ当てら
れたイメージを示す概要図である。 第1図において、 l・−・デバッグ処理、2・・・逆方向実行情報格納フ
ァイル%3・・・メモリ、4・−レジスタ、5・・・プ
ログ2ムカウンタ、6−・・退避要求テーブル、7・・
・変換ルールテーブル、11−・・変換情報待避手段、
12・・・命令変換手段、13−・逆方向実行手段であ
る。
FIG. 1 is a block diagram showing an embodiment of the backward execution method in depacking according to the present invention, and FIG. 2 is a schematic diagram showing an image in which a program to be debugged is allocated to memory. In FIG. 1, l...Debug processing, 2...Reverse execution information storage file %3...Memory, 4...Register, 5...Program 2 counter, 6-...Evacuation request table. 7...
- Conversion rule table, 11-... Conversion information saving means,
12--Instruction conversion means, 13--Reverse direction execution means.

Claims (1)

【特許請求の範囲】 マンマシンインタフェースを有するデバッグ処理におい
て、 被デバッグプログラム実行時に、マシン語の一命令が処
理された時点で、退避要求テーブルに基づき、前記被デ
バッグプログラムのメモリ内のデータ領域、およびテキ
スト領域、およびレジスタから命令変換に必要な情報、
を逆方向実行情報格納ファイルに格納する変換情報退避
手段と、利用者より逆方向実行の要求がされた時点で、
前記逆方向実行情報格納ファイルを参照して、変換ルー
ルテーブルに基づき、一つ前に実行された命令を変換す
る命令変換手段と、 該命令変換手段によって生成された命令を、次に実行す
る命令の一つ前の命令に置き換え、逆方向実行の処理手
続きを行う逆方向実行手段と、 を有することを特徴とする被デバッグプログラムのデバ
ッグにおける逆方向実行方式。
[Scope of Claims] In debug processing having a man-machine interface, when a debug target program is executed, at the time when one machine language instruction is processed, based on a save request table, a data area in the memory of the debug target program, and text area, and the information necessary for converting instructions from registers,
A conversion information saving means that stores the information in a backward execution information storage file, and when a user requests backward execution,
an instruction converter that refers to the backward execution information storage file and converts the previously executed instruction based on the conversion rule table; and an instruction that executes the next instruction generated by the instruction converter. 1. A backward execution method for debugging a program to be debugged, comprising: a backward execution means for replacing the previous instruction with a backward execution procedure.
JP2277830A 1990-10-18 1990-10-18 Adverse debugging execution system for debugged program Pending JPH04153741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2277830A JPH04153741A (en) 1990-10-18 1990-10-18 Adverse debugging execution system for debugged program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2277830A JPH04153741A (en) 1990-10-18 1990-10-18 Adverse debugging execution system for debugged program

Publications (1)

Publication Number Publication Date
JPH04153741A true JPH04153741A (en) 1992-05-27

Family

ID=17588862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2277830A Pending JPH04153741A (en) 1990-10-18 1990-10-18 Adverse debugging execution system for debugged program

Country Status (1)

Country Link
JP (1) JPH04153741A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08320813A (en) * 1995-05-26 1996-12-03 Nec Corp Program simulator device and program debugging method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08320813A (en) * 1995-05-26 1996-12-03 Nec Corp Program simulator device and program debugging method

Similar Documents

Publication Publication Date Title
JP2692609B2 (en) Multitask program debugging method and apparatus
JPH04153741A (en) Adverse debugging execution system for debugged program
JPS6378231A (en) Partial program combining system
US5765148A (en) Database processing apparatus and database processing method for variable length objects, and computer-readable memory medium for storing database processing program
JPH01273136A (en) System for converting operating system to firmware
JPS6020275A (en) Simple programming system of multiprocessor
JPS6027029A (en) Data processor
JPS5829051A (en) Operation processing device
JP2927102B2 (en) Instruction string switching method and arithmetic processor using the same
JPH08320813A (en) Program simulator device and program debugging method
JPH03266140A (en) Program debugging system
CN116009836A (en) RPA programming method, device, equipment and storage medium based on script language
JPS58166455A (en) Relational type data base system
JPH05127945A (en) Program execution situation analysis system
JPS63106807A (en) Industrial robot
JPH10283193A (en) Fast interpreter system
JPS59180755A (en) Tracing system
JPH04209029A (en) Parallel process program translation processor
JPH083792B2 (en) Function call processing method
JPH0212525A (en) Program editing and coupling device
JPH03260830A (en) Program debug processing system
JPH01295337A (en) Monitor routine control shift system
JPS63228341A (en) Program syntax checking system
JPH04128936A (en) Program execution environment changeover system
JPS645332B2 (en)