JPH04137891A - Color signal generating circuit - Google Patents
Color signal generating circuitInfo
- Publication number
- JPH04137891A JPH04137891A JP2257015A JP25701590A JPH04137891A JP H04137891 A JPH04137891 A JP H04137891A JP 2257015 A JP2257015 A JP 2257015A JP 25701590 A JP25701590 A JP 25701590A JP H04137891 A JPH04137891 A JP H04137891A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- arithmetic mean
- color
- color difference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims abstract description 10
- 230000001360 synchronised effect Effects 0.000 claims description 9
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 5
- 230000003111 delayed effect Effects 0.000 claims description 4
- 238000012935 Averaging Methods 0.000 description 7
- 239000003086 colorant Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000001444 catalytic combustion detection Methods 0.000 description 2
- 230000001934 delay Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
Landscapes
- Processing Of Color Television Signals (AREA)
Abstract
Description
【発明の詳細な説明】
発明の背景
技術分野
この発明は、輝度信号Yおよび線順次色差信号B−Y、
R−Yを入力して色信号R,G、Bを生成する色信号生
成回路に関する。BACKGROUND OF THE INVENTION Technical Field The present invention relates to a luminance signal Y and a line sequential color difference signal B-Y,
The present invention relates to a color signal generation circuit that generates color signals R, G, and B by inputting R-Y.
従来技術とその問題点
輝度信号Yと線順次色差信号B−Y、R−YとからR,
G、Bの3原色信号を生成する従来の回路の一例が第2
図に示されている。第2図に示す従来の回路は、同時化
回路10.相加平均回路BOA BOBおよびマトリ
クス回路50を含んでいる。Prior art and its problems From the luminance signal Y and the line sequential color difference signals B-Y, R-Y, R,
An example of a conventional circuit that generates three primary color signals of G and B is the second
As shown in the figure. The conventional circuit shown in FIG. 2 includes a synchronization circuit 10. It includes an arithmetic mean circuit BOA BOB and a matrix circuit 50.
線順次色差信号B−YおよびR−Yは同時化回路10に
与えられ同時化される。同時化回路lOはIH遅延回路
11(IHは水平走査期間)および2つの切換スイッチ
12.13から構成されている。切換スイッチ12.1
3は連動してIHごとに切換えられる。切換スイッチ1
2からは同時化された色差信号B−Yが、切換スイッチ
13からは同時化された色差信号R−Yがそれぞれ出力
される。第3図は同時化回路10の入力信号(符号eで
示す)とIH遅延された信号(符号fで示す)とを示す
ものである。このタイム−チャートにおいて輝度信号Y
には水平走査線の順番を示す下撚数字が付与されている
。同時化された色差信号B−YとR−Yにおいて、輝度
信号Yの下撚数字が同じもの(たとえばB−Y とR
−Y やB Y2とR−Y2)は同一画面から生じ
たものであるからこれらの間では色が合うが、輝度信号
Yの下撚数字が異なるもの(たとえばR−Y とB−
YoやR−Y2とB−Yl)を用いてR,G、Bの3原
色信号を生成すると偽色が生じやすい。The line sequential color difference signals B-Y and R-Y are applied to a synchronization circuit 10 and are synchronized. The synchronization circuit IO is composed of an IH delay circuit 11 (IH is a horizontal scanning period) and two changeover switches 12 and 13. Changeover switch 12.1
3 is linked and switched for each IH. Changeover switch 1
2 outputs a synchronized color difference signal B-Y, and a changeover switch 13 outputs a synchronized color difference signal RY. FIG. 3 shows an input signal to the synchronization circuit 10 (denoted by symbol e) and an IH-delayed signal (denoted by symbol f). In this time chart, the luminance signal Y
is given a pre-twist number indicating the order of horizontal scanning lines. In the synchronized color difference signals B-Y and R-Y, the first twist numbers of the luminance signal Y are the same (for example, B-Y and R
-Y and B Y2 and R-Y2) are generated from the same screen, so the colors match between them, but the luminance signals Y with different twist numbers (for example, R-Y and B-
If the three primary color signals of R, G, and B are generated using the three primary color signals of R, G, and B, false colors are likely to occur.
このために従来は相加平均回路60AおよびBOBを設
け、隣接する線間で色差信号の相加平均をとることによ
り対処している。Conventionally, this problem has been dealt with by providing arithmetic averaging circuits 60A and BOB and taking the arithmetic mean of color difference signals between adjacent lines.
相加平均回路8DAはIH遅延回路61Aと、 IH
遅延信号と遅延されていない信号とを加算する加算回路
62Aとから構成され、相加平均回路60Bも同じよう
にIH遅延回路61Bと加算回路62Bとから構成され
ている。これらの相加平均回路60A。The arithmetic averaging circuit 8DA is connected to the IH delay circuit 61A and the IH
It is composed of an adder circuit 62A that adds a delayed signal and a non-delayed signal, and the arithmetic mean circuit 60B is similarly composed of an IH delay circuit 61B and an adder circuit 62B. These arithmetic mean circuits 60A.
BOBから出力される色差信号B−Y、R−Yと輝度信
号Yとからマトリクス回路50において色信号R,G、
Bか作成される。The matrix circuit 50 generates color signals R, G,
B is created.
このような従来の加算平均回路BOAおよびSOBにお
いて、IH遅延回路EilAおよび6]、BはCCD(
Charge Coupled Device )を用
いて実現されている。しかしながらCCDは電流駆動で
あり、その駆動′電流か多くなるという問題点をもって
いる。In such conventional averaging circuits BOA and SOB, IH delay circuits EilA and EilA and B are CCD (
This is realized using a Charge Coupled Device. However, CCDs are current-driven and have the problem that the driving current is large.
発明の概要
発明の目的
この発明は、電力消費を押さえかつ偽色の発生を防ぎな
がら色信号R,G、Bを作成する回路を提供することを
目的とする。SUMMARY OF THE INVENTION OBJECTS OF THE INVENTION An object of the present invention is to provide a circuit that generates color signals R, G, and B while reducing power consumption and preventing the occurrence of false colors.
発明の構成1作用および効果
この発明は、線順次色差信号を同時化する同時化回路、
同時化された色差信号を所定周波数のキャリアを用いて
変調する変調回路、上記変調回路によって変調された信
号を1水平走査期間遅延するくし形フィルタを含み、入
力した変調信号の1水平走査期間前後の信号の相加平均
を演算する相加平均回路、上記相加平均回路の出力信号
を復調する復調回路、および輝度信号と上記復調回路か
ら得られる色差信号とを用いて色信号を作成する上記マ
トリクス回路を備えていることを特徴とする。Structure 1 of the Invention Functions and Effects This invention provides a synchronization circuit for synchronizing line-sequential color difference signals;
It includes a modulation circuit that modulates the synchronized color difference signal using a carrier of a predetermined frequency, and a comb filter that delays the signal modulated by the modulation circuit by one horizontal scanning period. an arithmetic mean circuit that calculates the arithmetic mean of the signals; a demodulation circuit that demodulates the output signal of the arithmetic mean circuit; and a demodulation circuit that creates a color signal using the luminance signal and a color difference signal obtained from the demodulation circuit. It is characterized by having a matrix circuit.
この発明によると線順次色差信号は同時化回路によって
同時化される。同時化された色差信号は、<シ形フィル
タ回路を通ることができる周波数のキャリアを用いて変
調される。この変調された信号は、IH遅延回路として
用いられるくし形フィルタを含む相加平均回路によって
相加平均され、さらに復調回路によって復調される。復
調後の色差信号と輝度信号を用いてマトリクス回路によ
ってR,G、B色信号が作成される。According to this invention, line sequential color difference signals are synchronized by a synchronization circuit. The synchronized color difference signal is modulated using a carrier at a frequency that can pass through the C-shaped filter circuit. This modulated signal is arithmetic averaged by an arithmetic averaging circuit including a comb filter used as an IH delay circuit, and further demodulated by a demodulation circuit. R, G, and B color signals are created by a matrix circuit using the demodulated color difference signal and luminance signal.
この発明によると、駆動電流の必要なCODを用いた相
加平均回路に代えて駆動電流の不要なくし形フィルタを
IH遅延回路として用いた相加平均回路が備えられてい
るので、消費電力の削減を図りかつ偽色の発生を防止す
ることができる。According to this invention, an arithmetic mean circuit using a comb-shaped filter that does not require a drive current as an IH delay circuit is provided instead of an arithmetic mean circuit using a COD that requires a drive current, thereby reducing power consumption. It is possible to achieve this and prevent the occurrence of false colors.
実施例の説明
第1図はこの発明の実施例を示すもので色信号生成回路
のブロック図である。第1図において第2図に示すもの
と同一物には同一符号が付されている。DESCRIPTION OF THE EMBODIMENTS FIG. 1 shows an embodiment of the present invention and is a block diagram of a color signal generation circuit. Components in FIG. 1 that are the same as those shown in FIG. 2 are given the same reference numerals.
輝度信号Yはマトリクス回路50に入力している。The luminance signal Y is input to the matrix circuit 50.
線順次色差信号B−Y、R−Yは同時化回路10に入力
し、IH遅延回路11ならびに切換スイッチ13のa端
子および切換スイッチ12のb端子にそれぞれ与えられ
る。IH遅延回路11の遅延出力信号は切換スイッチ1
2のa端子および切換スイッチ13のb端子にそれぞれ
与えられる。切換スイッチ12および13は切換制御信
号においてIHごとに連動して切換えられる。これによ
り同時化された色差信号B−Y、R−Yが同時化回路1
0から出力される。The line sequential color difference signals B-Y and R-Y are input to the synchronization circuit 10 and applied to the IH delay circuit 11, the a terminal of the changeover switch 13, and the b terminal of the changeover switch 12, respectively. The delayed output signal of the IH delay circuit 11 is transferred to the selector switch 1.
2 and the b terminal of the selector switch 13, respectively. The changeover switches 12 and 13 are switched in conjunction with each IH using a changeover control signal. As a result, the synchronized color difference signals B-Y and R-Y are sent to the synchronization circuit 1.
Output from 0.
同時化回路10から出力された色差信号B−Y。Color difference signal B-Y output from the synchronization circuit 10.
R−Yは平衡変調回路20に与えられる。色差信号を変
調するのは後述する相加平均回路30のガラス遅延線を
含むくし形フィルタ3〕を通る周波数に変えるためであ
る。平衡変調回路20のサブ・キャリアの周波数f は
、水平走査周波数をfHとしC
て f −f (2N+1)/2(Nは正のSC
H
整数)に設定される。汎用的にはfSC”fHX455
/ 2 = 3.58MHzがよい。もっとも”5c=
N−fHとすることもできる。この場合には後述する相
加平均回路30に含まれる減算回路32を加算回路に置
きかえる必要がある。RY is applied to a balanced modulation circuit 20. The purpose of modulating the color difference signal is to change the frequency to a frequency that passes through a comb filter 3 including a glass delay line of an arithmetic averaging circuit 30, which will be described later. The subcarrier frequency f of the balanced modulation circuit 20 is f − f (2N+1)/2 (N is a positive SC
H integer). Generally speaking, fSC”fHX455
/ 2 = 3.58MHz is good. However, “5c=
It can also be N-fH. In this case, it is necessary to replace the subtraction circuit 32 included in the arithmetic averaging circuit 30, which will be described later, with an addition circuit.
変調された色差信号R−Y、B−Yは加算回路21でミ
クスされた後相加平均回路30に与えられる。The modulated color difference signals R-Y and B-Y are mixed in an adder circuit 21 and then fed to an arithmetic averaging circuit 30.
相加平均回路30はIH遅延用のくし形フィルタ3】お
よび減算回路32を含んでいる。平衡変調回路20から
出力される信号はIHごとに互いに反転しているので減
算回路32によって実質的に加算処理が行なわれる。こ
の回路30において1H前後の信号の相加平均がとられ
偽色の発生が未然に防止される。The arithmetic mean circuit 30 includes a comb filter 3 for IH delay and a subtraction circuit 32. Since the signals output from the balanced modulation circuit 20 are mutually inverted for each IH, the subtraction circuit 32 substantially performs addition processing. In this circuit 30, the arithmetic mean of the signals around 1H is taken to prevent the occurrence of false colors.
相加平均回路30から出力された信号は復調回路40で
復調され1色差信号B−YおよびR−Yとして出力され
る。これらの色差信号B−YおよびR−Yはマトリクス
回路50に入力する。そして。The signal output from the arithmetic mean circuit 30 is demodulated by the demodulation circuit 40 and output as one color difference signal B-Y and R-Y. These color difference signals B-Y and R-Y are input to the matrix circuit 50. and.
マトリクス回路50によって色信号R,G、Bが作成さ
れる。Color signals R, G, and B are created by the matrix circuit 50.
第1図はこの発明の実施例を示すもので1色信号生成回
路のブロック図である。
第2図は従来の色信号生成回路の一例を示すブロック図
である。
第3図は色差信号のタイム・チャートである。
10・・・同時化回路。
20・・・平衡変調回路。
30・・・相加平均回路。
31・・・くし形フィルタ。
40・・・復調回路。
50・・・マトリクス回路。
以
上FIG. 1 shows an embodiment of the present invention, and is a block diagram of a one-color signal generation circuit. FIG. 2 is a block diagram showing an example of a conventional color signal generation circuit. FIG. 3 is a time chart of color difference signals. 10...Synchronization circuit. 20...Balanced modulation circuit. 30...Arithmetic average circuit. 31...Comb filter. 40... Demodulation circuit. 50...Matrix circuit. that's all
Claims (1)
変調する変調回路、 上記変調回路によって変調された信号を1水平走査期間
遅延するくし形フィルタを含み、入力した変調信号の1
水平走査期間前後の信号の相加平均を演算する相加平均
回路、 上記相加平均回路の出力信号を復調する復調回路、およ
び 輝度信号と上記復調回路から得られる色差信号とを用い
て色信号を作成するマトリクス回路、を備えた色信号生
成回路。[Claims] A synchronization circuit that synchronizes line-sequential color difference signals, a modulation circuit that modulates the synchronized color difference signals using a carrier of a predetermined frequency, and a signal modulated by the modulation circuit for one horizontal scanning period. 1 of the input modulated signal, including a delayed comb filter.
A color signal is generated using an arithmetic mean circuit that calculates the arithmetic mean of signals before and after the horizontal scanning period, a demodulation circuit that demodulates the output signal of the arithmetic mean circuit, and a luminance signal and a color difference signal obtained from the demodulation circuit. A color signal generation circuit with a matrix circuit that creates a color signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2257015A JPH04137891A (en) | 1990-09-28 | 1990-09-28 | Color signal generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2257015A JPH04137891A (en) | 1990-09-28 | 1990-09-28 | Color signal generating circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04137891A true JPH04137891A (en) | 1992-05-12 |
Family
ID=17300550
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2257015A Pending JPH04137891A (en) | 1990-09-28 | 1990-09-28 | Color signal generating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04137891A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7126634B2 (en) * | 2001-07-26 | 2006-10-24 | Matsushita Electric Industrial Co., Ltd. | Image processing system, image pickup apparatus and image processing apparatus |
-
1990
- 1990-09-28 JP JP2257015A patent/JPH04137891A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7126634B2 (en) * | 2001-07-26 | 2006-10-24 | Matsushita Electric Industrial Co., Ltd. | Image processing system, image pickup apparatus and image processing apparatus |
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