JPH04135245A - Compiling processing system - Google Patents

Abstract

PURPOSE:To obtain an object with which the number of instructions can be decreased by converting an operation described in a source program into an assembler instruction of a small operand. CONSTITUTION:An arithmetic pattern recognizing part 11 detects an arithmetic formula out of a source program 2 received by a program input part 10. This arithmetic formula contains a common arithmetic subject element that secures the connection of operations. then an arithmetic pattern changing part 12 updates the description forms of these arithmetic formulas based on a cnnection rule. An object generating part 13 compiles the program 2 containing the arithmetic formula changed by the part 12 into a corresponding object 3 that has a reduced number of instructions.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a compilation processing method for compiling a source program into a corresponding object, and in particular to a compilation method that can generate objects that can reduce the number of instructions. This is related to the processing method.

The execution time of a program is determined by the number of object instructions generated by the compiler. From now on, it is desired to reduce the number of object instructions and shorten program execution time.

[Prior Art] Conventionally, when compiling a source program into a corresponding object, a configuration has been adopted in which the object is generated by compiling the source program in its written format. For example, when a user writes the following arithmetic expression in a source program, A = B X M + CX M + D Next, (1) Generate an addition instruction to add these three multiplication results.

According to this procedure, the corresponding objects were generated.

[Problem to be solved by the invention]

However, in such conventional technology, objects are generated according to the user's description, so even if an arithmetic expression that can reduce the number of instructions is included, it is necessary to continue compiling it as is. There was a problem that an object with a large number of instructions would be generated. To explain using the above example, if we continue to compile as A = BXM + CXM + DXM, an object with a large number of instructions with a total number of instructions of 5'' will be generated.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a new compilation processing method that can generate objects that can reduce the number of instructions.

[Means to solve the problem] FIG. 1 is a diagram showing the basic configuration of the present invention.

In the figure, 1 is a data processing device equipped with the present invention,
2 is a source program compiled by the data processing device 1, and 3 is an object generated by the data processing device 1.

The data processing device 1 includes a program input section 10 that receives and receives input of a source program 2;
an operation pattern recognition unit 11 that detects whether or not the source program 2 accepted by the source program 2 includes an operation expression that allows operations to be combined by including a common operation target element; When the calculation pattern recognition unit 11 detects the existence of a combinationable calculation formula, a calculation pattern changing unit 1 changes the description format of the calculation formula according to the associative rule.
2, and an object generation section 13 that generates an object corresponding to the source program 2 accepted by the program input section 1o.

[Effect]

In the present invention, the calculation pattern recognition unit 1 performs calculations by including a common calculation target element such as A=BXM+CXM-I-DXM in the source program 2 accepted by the program input unit 10. When it is detected that arithmetic expressions that can be combined are included, the arithmetic pattern changing unit 12 changes the description format of these arithmetic expressions according to the associative rule. That is, to explain using the above example, by transforming A=Mx(B+C+D), first, ■ generate an addition instruction to add three B, C, and D, and then: ■ Generate a multiplication instruction to multiply the three addition results by M.

We will change this procedure.

Then, the object generating unit 13 compiles the source program 2 having the arithmetic expression changed by the arithmetic pattern changing unit 12 into a corresponding object.
Object 3 with a reduced number of instructions is generated. As a result of this object generation process, using the example above, the total number of instructions was "5" before the change, but now
After the change, an object 3 with a size of 3'' can be generated.

In this way, in the present invention, instead of mechanically compiling the source program 2 to generate the object 3, when converting the operations written in the source program 2 into assembler instructions, By converting to one with fewer instructions, the number of instructions has been reduced.
It is configured to generate .

〔Example〕

Hereinafter, the present invention will be explained in detail according to examples.

FIG. 2 illustrates an embodiment of a data processing apparatus equipped with the present invention. In the figure, the same components as those explained in FIG. F are indicated by the same symbols.

14 is a vectorization processing section, and a program input section 1
1 vectorizes the source program 2 accepted by 0, and 15 is an instruction changeability determining unit, which determines whether the arithmetic expression recognized by the arithmetic pattern recognition unit 11 is to be processed by the arithmetic pattern changing unit 12. 16 is an arithmetic pattern processing unit which is composed of an arithmetic pattern recognition unit 11, an instruction changeability determination unit 15, and an arithmetic pattern change unit 12. 17 is an instruction scheduling unit that schedules the generation process of vector instructions.

As explained in FIG. 1, in the present invention, if arithmetic expressions that include a common operation target element and thereby allow operations to be combined are included, the description format of those arithmetic expressions is The configuration is such that objects 3 with a small number of instructions are generated by changing them according to the associative rule. For example, by changing the formula A=BXM+C×M+DXM to the format A=MX(B+C+D), and by changing the formula MM to the format Object 3 is generated.

Next, the processing contents of the present invention will be described in detail according to the flowchart shown in FIG. 3 executed by the calculation pattern processing section 16.

When the iX pattern processing unit 16 receives the vectorized operation description from the vectorization processing unit 14, it first performs the following steps.
In step 1, a search process is performed for an operation pattern based on data dependencies in the program, and then in step 2, according to this search process, it is determined whether the operation description to be processed follows an operation expression that can be changed according to the associative rule. Decide whether or not. In other words, if the operation description to be processed includes A(i) By searching for whether or not there is, the calculation description to be processed can be found in the calculation pattern A(i)XB(i)±A(i)XC(i) or A(i)XB(i)SatC (i) Detect whether the calculation pattern is xB(i), and if the calculation description to be processed includes B(,i)/A(i), By searching whether there is a part where A(i) is an operation element in the operation description, the enka description to be processed becomes B(i)/A(i)±C It is detected whether the calculation pattern is (i)/A(i).

In this way, when it is determined that the calculation formula that can be changed according to the connection line is followed according to the processing in steps 1 and 2, the calculation pattern processing unit 16
Proceeding to step 3, by interacting with the user, it is determined whether or not the process of changing the calculation description can be executed. By executing this determination process, it is possible to avoid executing a calculation pattern change process for a program that is sensitive to accuracy, thereby guaranteeing its accuracy.

Then, in the following step 4, when it is determined that there is a request to change the calculation pattern according to the determination process in step 3, the process proceeds to step 5, and the process to change the calculation pattern is executed according to the connection line.

According to the processing in step 5, the calculation pattern A(i) The calculation pattern is changed to A(i
)xB(i)±C(t)XB(i) is changed to the calculation pattern with fewer operations (A(i)±C(i))XB(i), and B(i )/A(i)SatC(i)/A(i) is changed to the calculation pattern with fewer operations as follows: [B(i)±C(i>:l/A(i)) become.

In this way, if the present invention is not used, the source program 2 written in Fortran as shown in FIG. 4 will have AB, C, and D as shown in FIG. v t2. v t3. After loading into the calculation area of v t4, ■ vtl and vt2 are vector-multiplied and the multiplication value is stored in calculation area vt5, ■ vtl and vt3 are vector-multiplied and the multiplication value is stored in calculation area vt5. ■Vjl and vt4 are vector-multiplied and the multiplied value is stored in the calculation area vt7.■vt5 and vt6 are vector-added and the added value is stored in the calculation area vt8.■vt7 and vt8 are vector-added, and the added value is stored in the calculation area vt9. (2) The value stored in this calculation area vt9 is stored in hectors.

While the assembler description is compiled into an object, if this invention is used,
As shown in Figure (b), A B and CD are v t
l, v t2. v t3. After loading vt4 into the calculation area, ■ Add vectors t2 and vt3 and store the added value in calculation area vt5. ■ Add vectors vt4 and vt5 and store the added value in calculation area. vt6, (2) vector multiplies vt5 and vt6, stores the multiplied value in calculation area vt3, and (2) vector stores the stored value in calculation area vt8.

By compiling the assembler description, it becomes an object. Therefore, by using the present invention, it becomes possible to generate the object 3 with a small number of instructions.

Although the disclosed embodiments have been described, the present invention is not limited thereto. For example, although the embodiments have been disclosed as being applied to vector instructions, the present invention can also be applied to scalar instructions as is.

〔Effect of the invention〕

As described above, according to the present invention, when compiling a source program into a corresponding object, it is possible to generate an object with a small number of instructions. This makes it possible to shorten program execution time.

[Brief explanation of drawings]

Fig. 1 is a diagram of the principle configuration of the present invention, Fig. 2 is an embodiment of the present invention, Fig. 3 is a flowchart of the execution of the present invention, Fig. 4 is an explanatory diagram of an example of a source program, and Fig. 5 is an illustration of an example of the present invention. FIG. 3 is an explanatory diagram of change processing according to the invention. In the figure, 1 is a data processing device, 2 is a source program, and 3 is a data processing device.
10 is an object, 10 is a program input section, 11 is an operation pattern recognition section, 12 is an operation pattern change section, 13 is an object generation section, 14 is a hectorization processing section, 15 is an instruction changeability determination section, and 16 is an operation pattern processing section. , 17 is an instruction scheduling section.

Claims (1)

[Claims] In a compilation processing method that compiles a source program into a corresponding object, does the source program include an operation expression that allows operations to be combined by including a common operation target element? an arithmetic pattern recognition unit (11) that detects whether or not the arithmetic expression is combinable; and an arithmetic pattern that changes the description format of the arithmetic expression according to the associative rule when the arithmetic pattern recognition unit (11) detects the existence of a combinable arithmetic expression. A compiling processing method comprising: a changing unit (12), and processing to compile a source program into a corresponding object according to an arithmetic expression changed by the arithmetic pattern changing unit (12).