JPH04120517A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH04120517A
JPH04120517A JP2242122A JP24212290A JPH04120517A JP H04120517 A JPH04120517 A JP H04120517A JP 2242122 A JP2242122 A JP 2242122A JP 24212290 A JP24212290 A JP 24212290A JP H04120517 A JPH04120517 A JP H04120517A
Authority
JP
Japan
Prior art keywords
packaging
signal
flexible pcb
liquid crystal
driver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2242122A
Other languages
Japanese (ja)
Inventor
Yasushi Narushige
泰 鳴重
Yasuto Sekado
瀬角 康人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2242122A priority Critical patent/JPH04120517A/en
Publication of JPH04120517A publication Critical patent/JPH04120517A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Landscapes

  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To easily measure the packaging resistance of a flexible PCB and to simplify the control of a production process by providing a bus line which electrically short-circuits at least two packaging terminals at the end of a signal supply wiring. CONSTITUTION:The packaging terminal 8 on a TFT array substrate 1 is constituted of the flexible PCB 4 in order to supply a signal to a driver IC 3 for driving. The signal is supplied from the outside by packaging and connecting one terminal per one kind of signal line through the packaging terminal. The signal supplied from the outside is transmitted to the respective drivers IC 3 for driving through the bus line 6 on the TFT array substrate 1. Furthermore, the bus line 10 for electrically short-circuiting between the packaging terminals at the end of the bus line 6 is provided on the TFT substrate 1. Therefore, the packaging and connecting resistance of the flexible PCB 4 is measured just by connecting an ohmmeter to the connector of the flexible PCB 4 immediately after the flexible PCB 4 is packaged. Thus, the accurate control of the process is easily accomplished.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は非線形素子を用いて液晶を駆動する、いわゆる
アクティブマトリクス方式の液晶表示装置のTPTアレ
ー基板の構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to the structure of a TPT array substrate of a so-called active matrix type liquid crystal display device that drives a liquid crystal using a nonlinear element.

従来の技術 従来、液晶表示装置(LCD)は時計、電卓を中心とし
て利用されてきたが、近年の新規用途分野としてはテレ
ビ、ビデオモニター、ビデオプロジェクションシステム
、ビューファインダーといった映像表示分野や、コンピ
ュータ用の端末、ラップトツブパソコンの表示デバイス
といったグラフィック表示分野で、大画面化、高密度化
といった大容量表示の要求が高まってきている。これら
の要求に対し液晶駆動方式として非線形素子を画素毎に
設けたいわゆるアクティブマトリクス方式によりフルカ
ラーで高精細度、高画質の液晶表示パネルを実現してい
る。
Conventional technology Liquid crystal display devices (LCDs) have traditionally been used mainly in watches and calculators, but in recent years new application fields include video display fields such as televisions, video monitors, video projection systems, and viewfinders, as well as for computers. In the graphic display field, such as display devices for computer terminals and laptop computers, there is an increasing demand for large-capacity displays such as larger screens and higher density. In response to these demands, full-color, high-definition, high-quality liquid crystal display panels have been realized using a so-called active matrix method in which a nonlinear element is provided for each pixel as a liquid crystal driving method.

このような動向の中でアクティブマトリクス方式の非線
形素子は半導体微細加工技術を用いて形成されるが、よ
り高精細度の画像表示を達成するためと、よりコンパク
トな商品:達成するために高密度の液晶パネルが開発さ
れ、実用化されてしる。特に液晶ビューファインダー、
高精細度液Iビデオブロジェクシジン用液晶パネルなど
にお(ではコンパクト、軽量という液晶の特徴を活か(
ため徹底した小型化追求を図っており、現在方tは太き
(2つの方法に分けられる。
In this trend, active matrix type nonlinear elements are formed using semiconductor microfabrication technology, but in order to achieve higher-definition image display and more compact products: LCD panels were developed and put into practical use. Especially the LCD viewfinder.
For LCD panels for high-definition liquid video projects, etc.
Therefore, we are pursuing thorough miniaturization, and currently the method t is thick (there are two methods).

−]はスイッチング素子としてポリソリコンを用いる方
式である。
-] is a method using polysilicons as switching elements.

ポリシリコン方式は高温プロセスで形成するため、電子
の移動度が太きくTPT駆動用ドライバーが内蔵できる
特徴を有し液晶パネルの小型化に有利である。また半導
体LSI技術、設備を共用できることから微細化に対し
ても容易である。
Since the polysilicon method is formed using a high-temperature process, the electron mobility is high and a driver for driving the TPT can be built in, which is advantageous for downsizing the liquid crystal panel. Further, since semiconductor LSI technology and equipment can be shared, miniaturization is also easy.

もう一つはスイッチング素子としてアモーファスシリコ
ンを用いた方式であり電子の移動度はポリシリコンに対
して約−桁小さいため駆動用ドライバーの内蔵は困難で
ある。そこで小型化実現のためには駆動用ドライバーI
Cを直接液晶パネルに実装するCOG (チップオング
ラス)工法が開発され実用化されている。
The other method uses amorphous silicon as a switching element, and since the electron mobility is about an order of magnitude lower than that of polysilicon, it is difficult to incorporate a driving driver. Therefore, in order to achieve miniaturization, the drive driver I
The COG (chip-on-glass) method, which directly mounts C on liquid crystal panels, has been developed and put into practical use.

以下図面を参照しながら上述した従来の液晶表示装置の
アモーファスシリコン方弐のアクティツマトリクス基板
の構造の一例にって説明する。
An example of the structure of the amorphous silicon active matrix substrate of the above-mentioned conventional liquid crystal display device will be explained below with reference to the drawings.

第2図は従来の液晶表示装置の構成を示すものである。FIG. 2 shows the structure of a conventional liquid crystal display device.

第2図においてIはTPTアレー基板、2は対向基板、
3は駆動用ドライバー1cチツプ、4は外部から駆動用
ドライバーICに信号供給するためのフレキシブルPC
Bである。5は画像表示部を示し、6はフレキシブルP
CB4から駆動用ドライバーIC4に信号を供給して成
る信号供給配線(以下パスラインと呼ぶ)である。
In FIG. 2, I is a TPT array substrate, 2 is a counter substrate,
3 is a driving driver 1c chip, and 4 is a flexible PC for supplying signals from the outside to the driving driver IC.
It is B. 5 indicates an image display section, and 6 indicates a flexible P.
This is a signal supply wiring (hereinafter referred to as a pass line) that supplies a signal from the CB 4 to the driving driver IC 4.

第3図は従来の液晶表示装置の電気配線図を概略的に示
したものである。
FIG. 3 schematically shows an electrical wiring diagram of a conventional liquid crystal display device.

画像表示部5にはTFTアレーがマドリスク状に形成さ
れている。
A TFT array is formed in the image display section 5 in a Madrisk shape.

TPTアレーへの信号供給は駆動用ドライバーIC3に
よってなされる。
Signals are supplied to the TPT array by a driving driver IC3.

この駆動用ドライバーIC3はCOG (チップオング
ラス)工法によって直接TFTアレー基Fi1にTPT
アレー蟇板上の実装端子7によって電気的に接続され実
装されている。この駆動用ドライバー T C3への信
号供給はフレキシブルPCB4によってTFTアレー基
板1上の実装端子群8を構成するa、b、c、d、e、
f、g、hの実装端子を介し、信号線一種類につき一端
子実装接続されて外部から供給される。この外部から供
給された信号はTFTアレー基板1上のパスライン6に
よって各駆動用ドライバーIc3に伝達される。
This driving driver IC3 is directly attached to the TFT array base Fi1 using the COG (chip-on-glass) method.
They are electrically connected and mounted by mounting terminals 7 on the array toe board. Signals are supplied to this drive driver T C3 by the flexible PCB 4 from a, b, c, d, e, which constitutes the mounting terminal group 8 on the TFT array board 1.
One terminal per type of signal line is connected via mounting terminals f, g, and h, and is supplied from the outside. This externally supplied signal is transmitted to each driving driver Ic3 by a pass line 6 on the TFT array substrate 1.

9はフレキシブルPCB4の末端に配置され、外部電源
、制御部へ接続するためのコネクタ接続用端子群で一般
にハンダメツキで表面が処理されている。
Reference numeral 9 is arranged at the end of the flexible PCB 4, and is a group of connector connection terminals for connecting to an external power source and a control section, and the surface is generally treated with solder plating.

この駆動用ドライバーICへの入力インピーダンスは極
めて小さいことが要求され特に実装の抵抗成分は数オー
ムから十数オームで管理しなければ信顛性における問題
が発注するレベルである。
The input impedance to this driving driver IC is required to be extremely small, and in particular, the resistance component of the mounting must be controlled to between several ohms and tens of ohms, otherwise reliability problems will occur.

発明が解決しようとする課題 しかしながら上記の様な構成では実装端子部接続抵抗の
工程管理を実施するにはブローバ等の解析用機器を用い
て生産品以外のパネルで管理せざるを得ないこと、また
生産しているパネルにおいては接続状況を顕微鏡等の目
視で確認するなど生産工数、付帯作業が大きいという問
題点を有していた。
Problems to be Solved by the Invention However, in the above configuration, in order to carry out process control of the connection resistance of the mounted terminal part, it is necessary to use analysis equipment such as a blower and control it on a panel other than the manufactured product. In addition, there is a problem in that the panels that are produced require a large number of production man-hours and incidental work, such as visually checking the connection status using a microscope or the like.

本発明は上記問題点を解決するもので、アクティブマト
リクス方式の液晶表示装置を提供することを目的してい
る。
The present invention solves the above-mentioned problems and aims to provide an active matrix type liquid crystal display device.

課題を解決するための手段 本発明は上記目的を達成するために、実装端子群のうち
少なくとも2つの端子を信号供給線の端で電気的に短絡
するパスラインをTPTアレー基板上に形成してなるも
のである。
Means for Solving the Problems In order to achieve the above object, the present invention forms a pass line on a TPT array substrate that electrically shorts at least two terminals of a group of mounting terminals at the end of a signal supply line. It is what it is.

作用 本発明は上記した構成により、フレキシブルPCBの実
装接続抵抗をフレキシブルPCBが実装された直後にフ
レキシブルPCBのコネクタに抵抗計を接続するだけで
測定できその値によって的確な工程管理が容易に実現で
きるようにしたものである。
According to the present invention, with the above-described configuration, the mounting connection resistance of a flexible PCB can be measured by simply connecting a resistance meter to the connector of the flexible PCB immediately after the flexible PCB is mounted, and accurate process control can be easily realized based on the measured value. This is how it was done.

実施例 以下、本発明の一実施例について、図面を参照しながら
説明する。第1図は本発明の液晶表示装置の電気配線図
を概略的に示したものである。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 schematically shows an electrical wiring diagram of a liquid crystal display device of the present invention.

第1図において1はTPTアレー基板、2は対1iil
基板、3は駆動用ドライバーICをしめす。画像表示部
5にはTFTアレーがマトリクス状に形成されている。
In Fig. 1, 1 is the TPT array substrate, 2 is the pair 1iil
Board 3 shows the driver IC for driving. The image display section 5 has a TFT array formed in a matrix.

このTPTアレーへの信号供給は駆動用ドライバーIC
3によってなされる。この駆動用ドライバーIC3はC
OG (チップオングラス)工法によって直接TPTア
レー基板に1にTPTアレー基板上の実装端子7によっ
て電気的に接続され実装されている。この駆動用ドライ
バーTC3への信号供給はフレキシブルPCB4によっ
てTFTアレー基板l上の実装端子8を構成するa、 
 bc、d、e、f、g、hの実装端子を介し、信号線
一種類につき一端子実装接続されて外部から供給される
。この外部から供給された信号はTFTアレー基板1上
のハスライン6によって各駆動用ドライバーIC3に伝
達される。さらにTPT基板l上に実装端子eとfの間
をパスライン6の末端で電気的短絡をさせるハスライン
がlOである。
The signal is supplied to this TPT array by a driving driver IC.
It is done by 3. This driving driver IC3 is C
It is electrically connected to and mounted directly on the TPT array substrate 1 through mounting terminals 7 on the TPT array substrate by the OG (chip-on-glass) method. Signals are supplied to this driving driver TC3 by means of a flexible PCB 4, which constitutes a mounting terminal 8 on the TFT array board l.
One terminal per type of signal line is connected via mounting terminals bc, d, e, f, g, and h, and is supplied from the outside. This signal supplied from the outside is transmitted to each driving driver IC 3 by a lotus line 6 on the TFT array substrate 1. Furthermore, a loop line 10 is used to electrically short-circuit between the mounting terminals e and f on the TPT substrate 1 at the end of the pass line 6.

この場合実装端子eとfには同一の信号を供給する。9
はフレキシブルPCB4の末端に配置され、外部電源、
制御部へ接続するためのコネクタ接続用端子群で一般に
ハンダメツキで表面が処理されている。このフレキシブ
ルPCB4が実装された直後フレキシブルPCB4の末
端にあるコネクタ接続用端子群9のうち端子eとf間に
抵抗計を接続することによって容易に実装抵抗が測定で
きる。
In this case, the same signal is supplied to mounting terminals e and f. 9
is placed at the end of the flexible PCB 4, and is connected to an external power source,
A group of connector connection terminals for connecting to a control unit, whose surface is generally treated with solder plating. Immediately after this flexible PCB 4 is mounted, mounting resistance can be easily measured by connecting a resistance meter between terminals e and f of the connector connection terminal group 9 at the end of the flexible PCB 4.

以上のように、TPT基板上に少なくとも2つの実装端
子間を電気的に短絡するバフラインを設けることにより
フレキシブルPCB実装置後に生産途中の液晶表示装置
を直接コネクタに接続し容易に実装抵抗が測定できる。
As described above, by providing a buff line that electrically shorts between at least two mounting terminals on the TPT board, the mounting resistance can be easily measured by directly connecting the liquid crystal display device that is currently in production to the connector after the actual flexible PCB device is installed. .

発明の効果 以上のように本発明によれば、、TPTアレー基板と前
記基板の一方に実装されて成るドライバICと前記ドラ
イバーICに信号を供給して成る前記基板上の信号供給
配線と前記信号供給配線の端に外部と接続してな成る複
数の実装端子を有する液晶表示装置において前記実装端
子の少なくとも2つは前記信号供給配線の端において電
気的に短絡するパスラインを設けることによりフレキシ
ブルPCBの実装抵抗が容易に測定でき生産工程の管理
がきわめて簡便に運営することかできる。
Effects of the Invention As described above, according to the present invention, there are provided a TPT array substrate, a driver IC mounted on one of the substrates, a signal supply wiring on the substrate for supplying a signal to the driver IC, and the signal. In a liquid crystal display device having a plurality of mounting terminals connected to the outside at an end of a supply wiring, at least two of the mounting terminals can be made into a flexible PCB by providing a path line that is electrically short-circuited at the end of the signal supply wiring. The mounted resistance can be easily measured, and the production process can be managed extremely easily.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例における液晶表示装置の電気配
線図の概略図、第2図は概観斜視図、第3図は従来例に
おける電気配線図の概略図である。 1・・・・・・TFTアレー基板、2・・・・・・対向
基板、3・・・・・・駆動用ドライバーIC14・・・
・・・フレキシブルPCB、5・・・・・・TFTアレ
ーマトリクス部、6・・・・・・パスライン、7・・・
・・・駆動用ドライバーIC実装端子、8・・・・・・
フルキシプルPCB実装端子群、9・・・・・・フレキ
シブルPCBコネクタ接続端子群、10・・・・・・実
装端子短絡用ハスライン。 代理人の氏名 弁理士 小鍜治 明 ほか22第 l[
FIG. 1 is a schematic diagram of an electrical wiring diagram of a liquid crystal display device according to an embodiment of the present invention, FIG. 2 is a schematic perspective view, and FIG. 3 is a schematic diagram of an electrical wiring diagram of a conventional example. 1...TFT array substrate, 2...Counter substrate, 3...Driver IC14...
...Flexible PCB, 5...TFT array matrix section, 6...Pass line, 7...
...Driver IC mounting terminal, 8...
Fluxipru PCB mounting terminal group, 9...Flexible PCB connector connection terminal group, 10...Mount terminal short-circuiting lot line. Name of agent: Patent attorney Akira Okaji et al. 22nd l[
j

Claims (1)

【特許請求の範囲】[Claims] 一対の基板間に液晶が封入された前記基板の一方の基板
上にマトリクス状に配列された薄膜トランジスタ、前記
薄膜トランジスタのソース電極に接続されてなる信号配
線、前記薄膜取トランジスタのゲート電極に接続されて
成るゲート配線、前記薄膜トランジスタのドレイン電極
に接続されてなる画素電極から成る薄膜トランジスタア
レーと前記基板の一方に実装されて成るドライバーIC
と前記ドライバーICに信号を供給して成る前記基板上
の信号供給配線と前記信号供給配線の端に外部と接続し
て成る複数の実装端子を有する液晶表示装置において前
記実装端子の少なくとも2つは前記信号供給配線の端に
おいて電気的に短絡されていることを特徴とする液晶表
示装置。
Thin film transistors arranged in a matrix on one of the substrates in which a liquid crystal is sealed between a pair of substrates, a signal wiring connected to the source electrode of the thin film transistor, and a gate electrode of the thin film transistor. a driver IC mounted on one of the substrates; a thin film transistor array including a gate wiring, a pixel electrode connected to the drain electrode of the thin film transistor; and a driver IC mounted on one of the substrates.
and a plurality of mounting terminals connected to the outside at an end of the signal supply wiring, wherein at least two of the mounting terminals are connected to the outside. A liquid crystal display device characterized in that an end of the signal supply wiring is electrically short-circuited.
JP2242122A 1990-09-11 1990-09-11 Liquid crystal display device Pending JPH04120517A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2242122A JPH04120517A (en) 1990-09-11 1990-09-11 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2242122A JPH04120517A (en) 1990-09-11 1990-09-11 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH04120517A true JPH04120517A (en) 1992-04-21

Family

ID=17084628

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2242122A Pending JPH04120517A (en) 1990-09-11 1990-09-11 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH04120517A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100394290C (en) * 2004-03-31 2008-06-11 日本电气株式会社 Semiconductor device having a low-resistance bus interconnect, method of manufacturing same, and display apparatus employing same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62130364A (en) * 1985-12-02 1987-06-12 Hitachi Chem Co Ltd Inspecting method for printed wiring board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62130364A (en) * 1985-12-02 1987-06-12 Hitachi Chem Co Ltd Inspecting method for printed wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100394290C (en) * 2004-03-31 2008-06-11 日本电气株式会社 Semiconductor device having a low-resistance bus interconnect, method of manufacturing same, and display apparatus employing same

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