JPH04119669A - Semiconductor device provided with improved electrode structure and manufacture thereof - Google Patents

Abstract

PURPOSE:To enhance a semiconductor device in reliability by a method wherein a buried electrode structure is formed so as to satisfy a formula, A>=C, when a wiring of width C is connected to the electrode of size A. CONSTITUTION:Provided that the length of the side of the upside of an electrode is A, and the width of a wiring connected to the electrode is represented by C, the electrode and the wiring are so formed as to satisfy a formula, A=C, or preferably A>C. Concretely, A and C are so set as to satisfy formulas, 0.5mum<A<1.0mum, 0.4mum<C<1.0mum, and A>C concurrently. A silicon oxide film 1207 is formed on the primary surface of a semiconductor substrate to serve as an insulating film, and a contact hole 1208 is provided to the film 1207 through a reactive ion etching method. Then, Al is selectively deposited on the contact hole 1208 through a hot Al-CVD method using DMAH as material gas and hydrogen as reactive gas respectively and keeping the surface of the semiconductor substrate at a temperature of 270 deg.C or so to form a single-crystal electrode 1209 of Al. Furthermore, an TiN film 1210 is formed through a sputtering method, and a non-selective Al film 1211 is deposited. The Al film 1211 is etched with chlorine gas. The TiN film 1210 is etched with CF4 gas using the patterned Al film 1211 as a mask.

Description

[Detailed description of the invention]

[Industrial Field of Application] The present invention is applicable to copying machines, facsimile machines, printers, silver halide cameras, video tape recorders, image display devices, etc.
! The present invention relates to semiconductor integrated circuit devices such as semiconductor memories, photoelectric conversion devices, signal processing devices, etc., which are mounted on electronic devices and, although small in size, greatly influence the specifications of the devices, and in particular, relates to the electrode structures thereof.

[Conventional technology]

2. Description of the Related Art As semiconductor circuit devices have become more highly integrated in recent years, semiconductor elements have become smaller. However, with miniaturization, there are many problems such as increased resistance and decreased reliability.
It has not yet been possible to obtain sufficient characteristics due to miniaturization. For example, FIG. 7 shows an example of a wiring section in a conventional semiconductor device. In FIG. 7, 701 is a semiconductor substrate, 702 is a functional region (impurity diffusion region), 703 is an insulating film, and 704 is a substantially square contact hole (size is AXA).
, 705 are electrode and wiring areas. X and Y are the vertical and horizontal sizes of the occupied area, X=3A+6B+2C, Y=2
It is expressed as A+4B. Here, A is the hole size, B is the overlapping margin between the hole and the wiring, and C is the separation width of the wiring. In such a configuration, miniaturization of the hole size A tends to cause problems such as an increase in contact resistance and a decrease in reliability due to deterioration in wiring coverage (step coverage). Regarding the miniaturization of the margin B, problems such as a decrease in reliability and a decrease in yield are likely to occur. When the separation width C is made smaller, problems such as an increase in wiring resistance and short circuits between wirings tend to occur. Therefore, research into new materials, devices, structures, etc. is being actively conducted in order to miniaturize interconnects. In particular, many reports have been made regarding the miniaturization of A. For example, with a semiconductor substrate by selective deposition! TiN between the poles
, a barrier metal such as TiW is provided, and a buried electrode structure is used in which the inside of the hole is filled with an electrode material. At present, it has not been possible to obtain a sufficiently flat film with excellent film quality using conventional selective deposition methods. As described above, there are still technical issues to be solved in terms of film quality, stability, reliability due to increased process steps, cost, etc. [Purpose] The present invention has been made to solve the above-mentioned technical problems, and provides a semiconductor device having an improved electrode structure that is miniaturized and highly reliable, and a method for manufacturing the same. . Another object of the present invention is to increase the degree of freedom in design to the extent that it is possible to remove the above-mentioned B (contact/wiring overlap margin) as much as possible, and to enable microfabrication of semiconductor elements, enabling high-speed drive and large-scale operation. An object of the present invention is to provide a semiconductor device having an electrode structure for a semiconductor element suitable for current drive, and a method for manufacturing the same. A configuration for achieving the object of the present invention is a semiconductor device having an electrode provided on the main surface side of a semiconductor substrate and connected to a semiconductor element, and a wiring connected to the electrode, in which the electrode and the wiring are connected to each other. When the upper surface of the electrode at the connection part is substantially flat, the length of one side thereof is A, and the width of the wiring at the connection part is C, then A and C satisfy the relationship A≧C. This is a semiconductor device characterized by: Another configuration for achieving the object of the present invention is to deposit a conductive film in an insulating film having openings provided on a semiconductor substrate by a selective deposition method in manufacturing the above-mentioned semiconductor device. After that, a conductive film is deposited on the insulating film and the conductive film and patterned. That is, an object of the present invention is to connect a wiring width C to a t-pole of size A in a buried electrode structure.
This is achieved by an electrode structure that satisfies the relationship ≧C. Furthermore, another object of the present invention is to further provide (+
') A barrier metal is provided between it& and the wiring, (2) the wiring material is single crystal only on the electrode and polycrystalline on the insulating film, (3) the electrode material and the wiring material are different materials. (4) This can be achieved by thickening the electrodes and wiring by selective CVD after the wiring is formed. [Operations] The first factor that made the present invention possible is the stable embedded electrode structure. Many reports have been made regarding buried electrodes, but there are many problems with reliability, such as the gap between the oxide film and the electrode, impurities contained in the film, and damage caused by etchback. was there. In the present invention, the above-mentioned problems have been solved by the improved CVD method described later, and it has become possible to form a highly reliable fine electrode structure. Furthermore, whereas in the past the wiring width was set to be sufficiently larger than the contact hole in order to obtain sufficient margin, the present invention is based on the opposite concept, which was completely unthinkable in the past. The width should be the same as the contact hole, more preferably smaller. In this way, it becomes possible to form a fine and highly reliable wiring portion while securing a sufficient margin even if it is small. [Example] Preferred embodiments of the present invention are as follows. In other words, the conductor portion connected to the semiconductor element, i.e.
& (Here, we will call the inside of the hole an electrode) and the wire that connects them! ! ! (Here, we mainly refer to the wiring provided on the insulating film and the electrode.) The length of one side of the upper surface of the electrode is A, and the width of the wiring connected to the electrode is C. Sometimes A=C, more preferably A
The structure is such that the relationship >c holds true. Specifically, A is 0.5 pm to 1.0 μm, and C is 0.4 μm.
~1.0 μm, is selected so as to satisfy the above relationship. More preferably, the value of C is 50% of the hole size A.
% to 70%, optimally 40% to 60% of the size. For example, if A is 1.0 μm, C is 04 μm to 1
, 0 μm, more preferably 0.4 μm h 0.8 μm considering alignment accuracy, and optimally 0.5 μm to 0.7 μm considering step coverage. FIG. 1 is a schematic diagram for explaining an electrode structure as a preferred embodiment of the present invention, and (A) is a plan view;
B) corresponds to a cross-sectional view. In FIG. 1, 101 is a P-type or N-type semiconductor substrate;
02 is a functional region (impurity diffusion region) for source, drain, base, emitter, collector or ohmic contact, 103 is an insulating film such as silicon oxide, silicon nitride, or organic resin film, and 104 is a contact as an opening. hole (size is AXA; A=1.0 μm), 105 is an electrode region embedded in the contact hole 104, 10
6 is a barrier metal such as TiN, W, etc., 107 is Al1, C
u, etc. (wiring width C, C=0.6 Jm). Here, the electrode 105 has a rectangular parallelepiped shape, and is arranged to be directly connected to a semiconductor region provided on the main surface of the semiconductor substrate, and wiring 106, 107 is provided on a part of the upper surface of the electrode.
is connected. This electrode structure is used for source and insulated gate FETs.
If the above structure is applied to the drain electrode, or in the case of a bipolar transistor, the base, emitter electrode, etc., further miniaturization can be expected and the performance will be improved. In other words, in the case of a FET, the resistance and capacitance of the main electrode are small, and the distance between the main electrode and the control electrode is shortened, allowing for miniaturization and higher speeds, while in the case of a bipolar transistor, the base resistance and Since the capacitance between the base and emitter is small, the emitter crowding effect is small, making it suitable for miniaturization and high speed. Also distributed #J! Also when connecting the wires 1 and 2, a high-density and highly reliable pole structure is possible. When comparing the conventional example shown in FIG. 7 with respect to X and Y, it can be seen that the length of X is reduced by 6×B, and the length of Y is also reduced by 4×B. Furthermore, according to the present invention, the overlapping margin between the contact hole and the electrode can be significantly reduced. (Film Forming Method) A film forming method suitable for forming the buried electrode according to the present invention will be described below. A film forming method suitable for the present invention is one in which a deposited film is formed on an electron-donating substrate by a surface reaction using alkyl aluminum hydride gas and hydrogen gas. In particular, an alkyl aluminum hydride containing a methyl group such as monomethyl aluminum hydride (MMAH) or dimethyl aluminum hydride (DMAH) is used as the raw material gas, H2 gas is used as the reaction gas, and the substrate surface is heated under a mixed gas of these. A good quality A1 film can be deposited. Here, during β-selective deposition, it is preferable to maintain the surface temperature of the substrate at a temperature above the decomposition temperature of the alkyl aluminum hydride and below 450°C by direct heating or indirect heating, and more preferably between 260°C and above and below 440°C. Methods for heating a good substrate to the above temperature range include direct heating and indirect heating, and in particular, if the substrate is maintained at the above temperature by direct heating, a high quality Al1 film can be formed at a high deposition rate. For example, the surface temperature of the Aug formation substrate is set to a more preferable temperature range of 260°C to 440°C.
℃, a high quality film can be obtained at a deposition rate higher than that in the case of resistance heating, which is 3000 to 5000 people/min. Examples of such a direct heating method (energy from a heating means is directly transmitted to the substrate to heat the substrate itself) include lamp heating using a halogen lamp, a xenon lamp, or the like. In addition, there is resistance heating as a method of indirect heating, which is carried out using a heating element etc. provided on a substrate support member disposed in a space for forming a deposited film to support a substrate on which a deposited film is to be formed. I can do it. By applying the CVD method to a substrate in which electron-donating and non-electron-donating surface areas coexist, Al
A single crystal of 2 is formed. This /IIl is excellent in all the properties desired as an electric wiring material. That is, a reduction in the probability of hillock occurrence and a reduction in the probability of alloy spike occurrence are achieved. This is because high-quality 8β can be selectively formed on a surface made of a semiconductor or conductor as an electron-donating surface, and because the A4 has excellent crystallinity, it forms a eutectic form with the underlying silicon, etc. It is considered that the formation of alloy spikes due to the reaction is hardly observed or extremely small. When used as an electrode in a semiconductor device, effects that go beyond the concept of the Aρ electrode that has been conventionally considered can be obtained that could not be expected using conventional techniques. As mentioned above, it has been explained that Al2 deposited on an electron-donating surface, for example, in an opening formed in an insulating film and exposing the surface of a semiconductor substrate, has a single crystal structure.
According to this method, it is possible to selectively deposit the following metal films containing Al as a main component, and the film exhibits excellent properties. For example, in addition to alkyl aluminum hydride gas and hydrogen, SiH4,5i2Ha, Si, H,, Si (CH3)
,,5iCIL4. SiH2CJ12.5iHCIL5
Gas containing Si atoms such as TiCJ24. TiBrn, Ti(CH3),
Gases containing Ti atoms such as bisacetylacetonatocopper Cu (C6Ht 02)2
, bisdipivaloyl methanite copper Cu (C,, H19
02)2. bishexafluoroacetylacetonatocopper C
A gas containing Cu atoms such as u (Cs HFe 02 ) 2 is introduced in appropriate combination to create a mixed gas atmosphere, for example, Af2-Si, Af2-Ti, Af2-Cu%.
Electrodes may be formed by selectively depositing conductive materials such as Aj2-5i-Ti and AJZ-5i-Cu. Furthermore, since the ρ-CVD method described above is a film forming method with excellent selectivity and the surface properties of the deposited film are good, a non-selective film forming method can be used in the next deposition process. By forming a metal film containing Ai or A1 as a main component also on the selectively deposited Ai layer and S i 02 as an insulating film, a suitable metal film with high versatility as wiring for semiconductor devices can be obtained. can be obtained. Specifically, such a metal film is a selectively deposited Af2. AfL-Si%AJ2-T i
, Al2-Cu, Al1-5 i -T i, A
ft-5i-Cu and non-selectively deposited A1, Af-
3i, AJl-Ti, Al2-Cu, Al1-5i
-Ti%AJ2-Si-Cu, etc. As a film forming method for non-selective deposition, the above-mentioned Al1-
There are methods other than CVD such as CVD and sputtering. (Film Forming Apparatus) Next, a film forming apparatus suitable for forming the electrode according to the present invention will be described. FIGS. 2 to 4 schematically show a continuous metal film forming apparatus suitable for the above-described film forming method. As shown in FIG. 2, this continuous metal film forming apparatus includes a load lock chamber 311 connected to each other by gate valves 310a to 310f so as to be able to communicate with each other while shutting off outside air, and a CVD reaction chamber as a first film forming chamber. 312, Rf etching chamber 313, sputtering chamber 314 as a second film forming chamber,
Each chamber is configured to be evacuated and depressurized by exhaust systems 316a to 316e, respectively. Here, the load lock chamber 31
Reference numeral 1 denotes a chamber for replacing the substrate atmosphere before the deposition process with an H2 atmosphere after exhausting in order to improve throughput performance. The next CVD reaction chamber 312 is a chamber in which selective deposition is performed on the substrate by the above-mentioned Al2-CVD method under normal pressure or reduced pressure, and the substrate surface to be deposited is heated to at least 200° C.
A substrate holder 318 having a heating resistor 317 that can be heated in the range of 450° C. is provided inside, and a CVD
A bubbler 3 is installed indoors through the raw material gas introduction line 319.
In step 19-1, raw material gas such as alkyl aluminum hydride, which has been bubbled with hydrogen and vaporized, is introduced.
Further, hydrogen gas as a reaction gas is introduced from the gas line 319'. The next Rf etching chamber 313 is a chamber for cleaning (etching) the surface of the substrate after selective deposition in an Ar atmosphere. and an electrode line 321 for Rf etching, and an Ar gas supply line 3.
22 are connected. The next sputtering chamber 314 is a chamber in which a metal film is non-selectively deposited on the substrate surface by sputtering in an Ar atmosphere, and the temperature inside the sputtering chamber 314 is at least 200°C.
A substrate holder 323 heated in a range of 250°C and a target electrode 3 to which a sputter target material 324a is attached.
24, and an Ar gas supply line 32
5 is connected. The final load rotor chamber 315 is an adjustment chamber before the substrate is exposed to the outside air after the completion of metal film deposition, and is configured to replace the atmosphere with N2. This figure shows another example of the configuration of a metal film continuous forming apparatus suitable for the above-mentioned process, and the same parts as in FIG. 2 described above are given the same reference numerals. The device shown in FIG. 3 differs from the device shown in FIG. 2 in that it is equipped with a halogen lamp 330 as a direct heating means and can directly heat the surface of the substrate. A claw 331 is provided to hold it in the correct position. With this configuration, by directly heating the substrate surface, it is possible to further improve the deposition rate as described above. In the metal film continuous forming apparatus having the above configuration, in practice, as shown in FIG.
313, a sputtering chamber 314, and a load lock chamber 315 are substantially connected to each other. In this configuration, the load lock chamber 311 is replaced by the load lock chamber 315.
It also serves as As shown in the figure, the transfer chamber 326 is provided with an arm 327 as a transfer means that can rotate forward and backward in the AA force direction and extend and retract in the BB direction. As indicated by the arrows inside, the substrate is sequentially transferred from the load lock chamber 311 to the CVD process according to the process.
chamber 312, Rf etching chamber 313, sputtering chamber 314
, to the load lock chamber 315 without being exposed to outside air. (Method for Forming a Buried Electrode) A film forming procedure for forming a buried electrode according to the present invention will be described. First, prepare the base. As the substrate, for example, single crystal S
A wafer in which an absolute MU with apertures of various diameters is formed is prepared. FIG. 6(A) is a schematic diagram showing a part of this base. Here, 40 is a single crystal silicon substrate as a conductive substrate, and 402 is a thermally oxidized silicon film as an insulating film (layer). 403 and 404 are openings (exposed portions), each having a different diameter. Referring to FIG. 3, the procedure for forming the Aj2 film, which will become the electrode as the first wiring layer, on the substrate is as follows. The base body described above is placed in the load lock chamber 311. Hydrogen is introduced into this load lock chamber 311 as described above to create a hydrogen atmosphere. Then, the inside of the reaction chamber 312 is evacuated to approximately 1×10 −′ Torr by the exhaust system 316b. However, the degree of vacuum inside the reaction chamber 312 is lXl0-'To
A1 can be formed even if it is worse than rr. Then, the DMA bubbled from the gas line 319
Supply H gas. H2 is used as the carrier gas for the DMAH line. The second gas line 319' is for H2 as a reaction gas, and H2 flows from this second gas line 319'.
The reaction chamber 3 is opened by adjusting the opening degree of a slow leak valve (not shown).
12 to a predetermined value. A typical pressure in this case is approximately 1.5 Torr. DM from DMAH line
AH is introduced into the reaction tube. The total pressure is approximately 1.5 Torr
, the DMAH partial pressure is approximately 5.0xlO-'Torr. Thereafter, the halogen lamp 330 is energized to directly heat the cube. In this way, Ai is selectively deposited. After a predetermined deposition time has elapsed, the supply of DMAH is temporarily stopped. The predetermined deposition time of the Al1 film deposited in this process is the time required for the thickness of the AA film on Si (single crystal silicon substrate 1) to become equal to the film thickness of 5in2 (thermal oxidation silicon film 2). , which can be determined in advance by experiment. At this time, the temperature of the substrate surface due to direct heating is approximately 270°C. According to the steps up to this point, Aj2M405 is selectively deposited inside the openings as shown in FIG. 6(B). (First Embodiment) As shown in Fig. 1, the first embodiment has a combination structure of an electrode in a contact hole, a barrier metal on top of the electrode, and a main wiring on top of the electrode. . Single-crystal An (A=0.8 μm) is formed as a buried electrode using the aforementioned selective AA-CVD method, and then TiN is formed non-selectively using a sputtering method or the like. A barrier metal layer such as TiW and A1@ are formed on the entire surface. A pattern is applied using a wiring mask having a dimension of C=0.6 μm as shown in the present invention, and etching is performed. First, only AjZ is etched with a gas such as BC423, taking into consideration the selectivity of resist/A It/T i N. Subsequently, by etching only TiN with a gas such as CF4 while considering the selection ratio of A J2 /T i N, the above-mentioned electrode structure shown in FIG. 1 can be obtained. (Second Embodiment) As shown in FIG. 8, in this second embodiment, only the electrode in the contact hole and above it are made of single crystal AIl, and the insulating film is made of polycrystalline Aj2 as a non-single crystal. This is a certain wiring structure. In FIG. 8, 801 is a semiconductor substrate, 802 is a functional region (impurity diffusion region), 803 is an insulating film, 804 is a contact hole, 805 is single crystal aluminum formed on the semiconductor substrate, and 806 is an insulating layer. This is a wiring portion made of polycrystalline aluminum. In the same manner as in the first embodiment, a buried electrode (A=0.8 μm) is formed using a selective An-CVD method, and then Al is deposited as a wiring using a non-selective CVD method. Next, the wiring mask (C=0.7 μm) shown in the present invention
Apply the pattern and etch it. Polycrystalline A
The electrode structure described above can be formed satisfactorily by etching using a chlorine-based gas while taking into consideration the heselectivity ratio of ll/car crystal 8ρ. (Third Embodiment) As shown in FIG. 9, the third embodiment has a wiring structure in which the electrode in the contact hole and the wiring above it and on the insulating film are made of different materials. Even in such a case, a similarly good electrode structure can be formed. In FIG. 9, 901 is a semiconductor substrate, 902 is a functional region (impurity diffusion region), 903 is an insulating film, 904 is a contact hole, 905 is an electrode buried in the contact hole, and 906 is a wiring different from the electrode material. It is. Similarly to the first embodiment, selection Aj2. -Embedded electrode (A=0.8μm) made of single crystal AI using CVD method
form. Subsequently, W or the like, which is a wiring material, is formed by sputtering. Next, a pattern is formed using the wiring mask according to the present invention and etched. The above electrode structure (C=O, S μm) can be achieved by etching using a CF4-based gas while taking into account the All/W selectivity. (Fourth Embodiment) The fourth embodiment is an electrode structure in which the wiring is thickened as shown in FIG. 10. In FIG. 10, 1001 is a semiconductor substrate, 1002 is a functional region (impurity diffusion region), 1003 is an insulating film, 1
004 is a contact hole, 1005 is an electrode and wiring,
Reference numeral 1006 denotes electrodes and wiring made thick by selective CVD after patterning. In the electrode structure of the fourth embodiment, regardless of the crystal structure of the material such as polycrystal or single crystal, the buried electrode and wiring are
etc., if etching is performed using a wiring mask to obtain wiring according to the present invention, there is a risk that reliability will be lowered due to over-etching. Therefore, in the fourth embodiment, after etching, selective CVD is performed again to thicken the wiring portion, thereby significantly increasing reliability. In particular, by employing the above-mentioned Al2-CVD method, it is possible to obtain interconnections with excellent flatness, low resistance, and resistance to migration. (Application to semiconductor device) Below, as a semiconductor device having an electrode structure according to the present invention,
A specific explanation will be given using a bipolar transistor and comparing it with a conventional example. FIG. 11 is a plan view and a cross-sectional view for explaining a conventional bipolar transistor, and FIG. 12 is a plan view and a cross-sectional view for explaining the above-mentioned bipolar transistor. As is clear from the figure, in bipolar transistors, by adopting the above electrode configuration, it is possible to reduce the distance between electrodes and the distance between wires, and accordingly, it is possible to reduce the diffusion area. becomes. Therefore, it is possible to reduce the capacitance and resistance value, and it is possible to obtain a bipolar transistor that can operate at high speed. In FIGS. 11 and 12, the semiconductor substrate 1101.1
Collector regions 1102 and 120 are located on the upper part of the main surface of 201.
2. Low impurity concentration regions 1103 and 1203 are provided. A base region 1105.1205 and an n9 type emitter region 1106.1206 are formed thereon. On the main surface of the semiconductor substrate on which the bipolar transistor is formed in this manner, electrodes 108, 1209, and electrodes 109, 1210, 1211 are formed. Further, numerals 1107 and 1207 are interlayer insulating films, and 110
4.1204 is a trench isolation region. Although the insulating film on the wiring is not shown here, when forming the insulating film, it is clear from the shape of the underlying electrode and wiring that this example has a structure with better step coverage. . (Description of Manufacturing Method) Hereinafter, a method of manufacturing the bipolar transistor according to the above-described embodiment will be described. First, As is implanted into a single-crystal P-type silicon substrate 1201 to form a buried region 12 for reducing collector resistance.
Form 02. Next, by epitaxial growth, n-
A mold collector region [1203 is formed. Then, a portion where an element isolation region 1204 is to be formed is etched. By depositing and burying an oxide film or polycrystalline silicon into the trench formed by etching, the element isolation region 1 is formed.
204 is formed. Thereafter, a P-type base region 1205 is formed at a desired position by implanting B ions. Further, P is diffused therein to form an N1 type emitter region] 206. In this way, silicon oxide [1207] is formed as an insulating film by CVD on the main surface of the semiconductor substrate on which each semiconductor region is formed, and a contact hole 1208 with a diameter of 0.8 x 0.8 μm is formed by reactive ion etching. Form. Here, the insulating film is Si made by thermal oxidation method.
Silicon oxide film (BPSG) containing O2, boron, and phosphorus
) may be an insulating film in which a plurality of insulating films are laminated, such as a combination of the above. Next, An is selectively deposited in the contact hole by the aforementioned Al2-CVD method, especially by thermal CVD method using DMAH as a raw material gas and hydrogen as a reaction gas to maintain the substrate surface at about 270°C. An electrode 1209 made of 1 is formed on the single crystal. Furthermore, a TiN film 1210 with a thickness of 100
After that, 5,000 to 10,000 layers of unselected All@1211 are deposited by sputtering. Then, using a mask with a wiring design according to the present invention, first, AIt is etched with a chlorine-based gas. Next, patterned A using CF4-based gas
TiN is etched using l2 as a mask. In this way, a bipolar transistor having the configuration shown in FIG. 12 with a wiring width of 0.5 μm can be obtained. A ring oscillator using several hundred transistors formed by the manufacturing method described above was manufactured, and its characteristics and durability tests were conducted. As a result, characteristics such as signal delay and damage caused by long-term continuous operation have been improved compared to conventional examples, and the degree of integration has been improved without reducing yield. [Effects] According to the present invention, it is possible to provide a semiconductor device that is miniaturized and highly reliable, and the degree of freedom in design is increased because the margin can be appropriately selected. Can be provided at a reasonable price.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram for explaining an electrode structure for a semiconductor device according to an embodiment of the present invention, and FIGS. 2 to 5 illustrate a manufacturing apparatus suitable for manufacturing a semiconductor device according to the present invention. Figure 6 shows the CVD method suitable for manufacturing the semiconductor device of the present invention.
7 is a schematic diagram for explaining the structure of an electrode for a semiconductor device according to the prior art, and FIGS. 8, 9, and 10 are diagrams for explaining the structure of an electrode for a semiconductor device according to the present invention. FIG. 11 is a schematic diagram illustrating another embodiment of the electrode, FIG. 11 is a schematic diagram illustrating a conventional bipolar transistor, and FIG. 12 is a schematic diagram illustrating a bipolar transistor according to the present invention. nt, full moon beak? , Tree distribution base, Koshikai CA) Plan / ρ / CB) Cross-sectional view of L-L' Me 3 na j / Do 4 evening must be punished 7 illustrations of rice Mio Hansei l line Kozo - ( A) Plan view ρ no CB) L-L' surface diagram 2. Date and month 1: Yoru Kashishi lower second line Otoboku structure. ri θ/ /θθl 躬//Fig. -Side view //ρ/ (B) Town view of L-L'

Claims (10)

[Claims] (1) In a semiconductor device having an electrode provided on the main surface side of a semiconductor substrate and connected to a semiconductor element, and a wiring connected to the electrode, the upper surface of the electrode at the connection portion between the electrode and the wiring is substantially is flat, and the length of one side is A
. A semiconductor device, wherein A and C satisfy the relationship A≧C, where C is the width of the wiring in the connection portion. (2) The semiconductor device according to claim (1), further comprising a barrier metal between the electrode and the wiring. (3) The semiconductor device according to claim (1), wherein the electrode is made of single crystal aluminum and the wiring is made of polycrystalline aluminum. (4) The semiconductor device according to claim (1), wherein the electrode and the wiring are made of different materials. (5) The semiconductor device according to claim (1), wherein the electrode and the wiring are made of the same material. (6) In the method for manufacturing a semiconductor device according to claim (1), after depositing a conductive film in an insulating film having openings provided on a semiconductor substrate by a selective deposition method, the insulating film is and a method of manufacturing a semiconductor device, comprising depositing a conductive film on the conductive film and patterning the same. (7) The method for manufacturing a semiconductor device according to claim (6), wherein the selective deposition method is a chemical vapor deposition method using an alkyl aluminum hydride and hydrogen. (8) The method for manufacturing a semiconductor device according to claim (7), wherein the alkyl aluminum hydride contains a methyl group. (9) The method for manufacturing a semiconductor device according to claim (8), wherein the alkyl aluminum hydride is dimethylaluminum hydride. (10) An electronic device using the semiconductor device according to claim (1).