JPH04117504A - Target value follow-up quick responsive 2-freedom degree adjuster - Google Patents

Target value follow-up quick responsive 2-freedom degree adjuster

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Publication number
JPH04117504A
JPH04117504A JP2237642A JP23764290A JPH04117504A JP H04117504 A JPH04117504 A JP H04117504A JP 2237642 A JP2237642 A JP 2237642A JP 23764290 A JP23764290 A JP 23764290A JP H04117504 A JPH04117504 A JP H04117504A
Authority
JP
Japan
Prior art keywords
target value
calculation
difference
adjustment
freedom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2237642A
Other languages
Japanese (ja)
Other versions
JP2752240B2 (en
Inventor
Kazuo Hiroi
広井 和男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23764290A priority Critical patent/JP2752240B2/en
Priority to EP91308139A priority patent/EP0474492B1/en
Priority to DE69114623T priority patent/DE69114623T2/en
Priority to AU83656/91A priority patent/AU625714B2/en
Priority to CN91109572A priority patent/CN1045669C/en
Priority to KR1019910015624A priority patent/KR950009526B1/en
Priority to US07/757,011 priority patent/US5245529A/en
Publication of JPH04117504A publication Critical patent/JPH04117504A/en
Application granted granted Critical
Publication of JP2752240B2 publication Critical patent/JP2752240B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To shorten the response time by fetching directly the control target value with a signal switching means when the arithmetic target value is approximate to the control target value for PI (proportion/integration) adjustment. CONSTITUTION:A switching command is received when a comparison/judgement means 11 decide a difference larger than a prescribed level. Then the arithmetic target value SV0 is selected. Meanwhile the control target value SV is selected at the reception of a switching command with the difference higher than the prescribed level. Then the value SV is sent to a deviation computing means 3. That is, a switching command is produced when the difference is larger than a prescribed level delta. Therefore a signal switching means 12 selects the value SV after the reception of the switching command. Thus the target value for PI adjustment is defined as SVa = SV. Consequently, the response speed is set at the value SV in a short time.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、目標値フィルタ手段を用いた2自由度PIま
たはPID(P:比例、l:積分。
Detailed Description of the Invention [Objective of the Invention] (Industrial Application Field) The present invention provides a two-degree-of-freedom PI or PID (P: proportional, l: integral) using a target value filter means.

D:微分)調節装置に係わり、特に制御対象への外乱に
対する抑制特性および目標値変化に対する追従特性を同
時に最適化する一方、目標値の変化に対し連応性を有す
る目標値追従遠心形2自由度調節装置に関する。
D: Differential) related to the adjustment device, in particular the target value tracking centrifugal 2-degree-of-freedom type that simultaneously optimizes the suppression characteristics against disturbances to the controlled object and the tracking characteristics against changes in the target value, while also being responsive to changes in the target value. Relating to an adjustment device.

(従来の技術) 従来の目標値フィルタ形2自由度P!調節装置は第5図
に示すように構成されている。つまり、この調節装置は
、目標値Svを目標値フィルタ手段1に導入し、比例ゲ
インを2自由度化する演算処理を行って演算目標値Sv
oを得た後、この演算目標値Svoと制御対象2からの
制御量Pvとを偏差演算手段3に導いて(SVo−PV
)なる演算により偏差Eを求める。さらに、偏差演算手
段3で求めた偏差Eを、KP  (1−1/ (TIS
))なる伝達関数をもつPI調節手段4に導き、ここで
PI調節演算を行って操作信号MYを求める。そして、
この操作信号MVと外乱りとを加算手段5で加算合成し
た後、制御対象2に印加することにより演算目標値5v
o−制御量Pvとなるように制御する構成である。なお
、上式においてKPは比例ゲイン、TIは積分時間、S
はラプラス演算子である。
(Prior art) Conventional target value filter type with 2 degrees of freedom P! The adjustment device is constructed as shown in FIG. That is, this adjustment device introduces the target value Sv into the target value filter means 1, performs calculation processing to make the proportional gain two degrees of freedom, and calculates the calculated target value Sv.
After obtaining o, this calculation target value Svo and the control amount Pv from the controlled object 2 are guided to the deviation calculation means 3 (SVo-PV
) is used to find the deviation E. Furthermore, the deviation E obtained by the deviation calculation means 3 is expressed as KP (1-1/(TIS
)) to the PI adjustment means 4 having a transfer function, and performs PI adjustment calculation here to obtain the operation signal MY. and,
After the operation signal MV and the disturbance are added and combined by the adding means 5, the calculation target value 5v is applied to the controlled object 2.
This is a configuration in which control is performed so that the amount of control becomes o-control amount Pv. In addition, in the above equation, KP is proportional gain, TI is integral time, and S
is the Laplace operator.

一方、前記目標値フィルタ手段1は、外部から導入する
目標値Svに対して比例ゲインの2自由度化係数aを乗
算する乗算手段12、前記目標値Svから係数手段11
の出力を減算する減算手段1□、この減算手段12の出
力について積分時間を時定数とする1次遅れ演算を行っ
て出力する1次遅れ要素13、この1次遅れ要素1.の
出力と前記係数手段IIの出力とを加算合成して演算目
標値SVOを得る加算手段14等によって構成されてい
る。
On the other hand, the target value filter means 1 includes a multiplication means 12 for multiplying a target value Sv introduced from the outside by a two-degree-of-freedom coefficient a of a proportional gain, and a coefficient means 11 for calculating the target value Sv from the target value Sv.
, a subtracting means 1□ for subtracting the output of the subtracting means 12, a first-order lag element 13 that performs a first-order lag calculation using the integration time as a time constant on the output of the subtracting means 12, and outputs the result, a first-order lag element 13 for outputting the resultant result. and the output of the coefficient means II to obtain a calculation target value SVO.

従って、以上のような構成の場合、Pv→MV間の伝達
関数CPM(S) 、S V→MV間の伝達関数CSM
(S)はそれぞれ、 CPM(S) −−MV/PV=Kp(1+1/T+ 
−8)    = (1)C8M(S)−MV/SV=
にバcr+1/T+◆S)    ”・(2)となる。
Therefore, in the case of the above configuration, the transfer function CPM(S) between Pv→MV and the transfer function CSM between S V→MV
(S) is CPM(S) --MV/PV=Kp(1+1/T+
-8) = (1)C8M(S)-MV/SV=
niBacr+1/T+◆S) ”・(2).

αは比例ゲインの2自由度化係数(O〜1の間で設定可
能な定数)である。ゆえに、外乱抑制特性が最適となる
ようにに、ST、を決定した後、目標値追従特性が最適
となるように比例ゲインの2自由度化係数αを決定すれ
ば、2自由度化を達成できる。
α is a two-degree-of-freedom coefficient for the proportional gain (a constant that can be set between O and 1). Therefore, if ST is determined so that the disturbance suppression characteristics are optimized, and then the proportional gain coefficient α for 2 degrees of freedom is determined so that the target value tracking characteristics are optimized, 2 degrees of freedom can be achieved. can.

(発明が解決しようとする課題) ところで、以上のような目標値フィルタ形2自由度調整
装置は外乱抑制特性と目標値追従特性とを同時に最適化
できる優れた特長をもっているが、目標値Svに整定す
るまでに長い時間を要する問題がある。
(Problem to be Solved by the Invention) By the way, the target value filter type two-degree-of-freedom adjustment device as described above has an excellent feature of being able to simultaneously optimize the disturbance suppression characteristic and the target value tracking characteristic. There is a problem that takes a long time to settle down.

そこで、この原因について検討すると、目標値フィルタ
手段1の中に少なくとも1段または2段以上の1次遅れ
要素を持っており、目標値Svをステップ状に変化させ
たとき、そのステップ変化の目標値S■がその1次遅れ
要素の影響を受けて最終値に達するまでに時間がかかる
ためである。
Therefore, when considering the cause of this, it is found that the target value filter means 1 has at least one stage or two or more first-order delay elements, and when the target value Sv is changed in a stepwise manner, the target value of the step change is This is because it takes time for the value S■ to reach the final value due to the influence of the first-order lag element.

さらに、1次遅れの影響について第6図の応答特性から
説明する。つまり、第6図は、第5図に示す装置におい
て目標値Svをステップ状に変化させたとき、係数手段
1.の出力である(Sv・α)だけがステップ状に変化
するが、減算手段12の出力である(SV・(1−α)
)は1次遅れ要素13の影響を受けて徐々に上昇して目
標値SVに近づくことになる。
Furthermore, the influence of the first-order delay will be explained from the response characteristics shown in FIG. That is, FIG. 6 shows that when the target value Sv is changed stepwise in the apparatus shown in FIG. 5, the coefficient means 1. Only the output (Sv・α) changes stepwise, but the output of the subtraction means 12 (SV・(1−α)
) gradually increases under the influence of the first-order lag element 13 and approaches the target value SV.

ソコテ、S V −X 、 S V o −Yとし、第
5図に示す目標値フィルタ手段1についてディジタル演
算式で表すと、 となり、この(3)式を微分方程式で表すと、となる。
When the target value filter means 1 shown in FIG. 5 is expressed as a digital arithmetic expression, the equation (3) is expressed as a differential equation.

ここで、 この 式に対して、 なる関係式を代入すると、 を得ることができる。here, this For the expression, Substituting the relational expression, we get can be obtained.

さらに、 この式を変形する と、 を得ることができる。moreover, Transform this formula and, can be obtained.

1の時点において目標値Svがステッ プ状に変化したときは、 n≧2ではX。At time point 1, the target value Sv steps. When it changes to a dip shape, X if n≧2.

X 請−1 となるので、 第6図の応答特性は前記 式か り 、 のようになる。この(7)式においてΔtはT1に比べ
て非常に小さく、また、cxm−yゎ−l)も小さいの
で、開式の後段の値は非常に小さくなる。しかも、出力
y0−1が入力X、に接近すればする程Δy、の変化は
小さくなる。その結果、出力y、は入力X、に一致する
までに相当長い時間を要することになる。当然、この出
力y6はPI調節手段4の目標値となっているので、整
定時間が非常に長くかかってしまう。
Since, In this equation (7), Δt is very small compared to T1, and cxm-yゎ-l) is also small, so the value in the latter stage of the opening equation becomes very small. Furthermore, the closer the output y0-1 is to the input X, the smaller the change in Δy. As a result, it will take a considerable amount of time for the output,y,to match the input,X,. Naturally, since this output y6 is the target value of the PI adjustment means 4, it takes a very long settling time.

本発明は上記実情にかんがみてなされたもので、目標値
の変化に対し本来の2自由度化の機能を阻害しない範囲
で従来に較べて応答時間を大幅に短縮しうる目標値追従
連込形2自由度調節装置を提供することを目的とする。
The present invention has been made in view of the above-mentioned circumstances, and is a target value tracking linked type that can significantly shorten the response time compared to the conventional method without interfering with the original two-degree-of-freedom function for changes in target values. The object is to provide a two-degree-of-freedom adjustment device.

[発明の構成] (課題を解決するための手段) 先ず、請求項1に対応する発明は上記課題を解決するた
めに、目標値フィルタ手段が設けられ、この目標値フィ
ルタ手段側から得られる目標値と制御対象からの制御量
との偏差を用いて少なくともPI(P:比例、I:積分
)調節演算を実行し、得られた操作信号を前記制御対象
に印加する2自由度調節装置において、前記目標値フィ
ルタ手段に与える制御目標値とこの目標値フィルタ手段
の演算処理によって得られる演算目標値との差を取り出
し、この差が所定値以下となったときに切換え指令を出
力する比較判断手段と、この比較判断手段から切換え指
令を受けたとき前記制御目標値を選択出力する信号切換
手段とを備えた目標値追従連込形2自由度調節装置であ
る。
[Structure of the invention] (Means for solving the problem) First, in order to solve the above problem, the invention corresponding to claim 1 is provided with a target value filter means, and a target value obtained from the target value filter means side. A two-degree-of-freedom adjustment device that executes at least a PI (P: proportional, I: integral) adjustment calculation using a deviation between a value and a controlled amount from a controlled object, and applies the obtained operation signal to the controlled object, Comparing and determining means extracts the difference between the control target value given to the target value filter means and the calculated target value obtained by the calculation process of the target value filter means, and outputs a switching command when this difference becomes less than or equal to a predetermined value. and signal switching means for selectively outputting the control target value when receiving a switching command from the comparison and judgment means.

次に、請求項2に対応する発明は、前記比較判断手段の
ほか、前記制御目標値から前記演算目標値を減算する減
算手段と、常時は演算目標値を前記PI調節演算のため
の目標値のベースとし、前記比較判断手段から切換え指
令を受けたとき前記減算手段の出力を取り込んで前記制
御目標値に加算合成して前記PI調節演算のための目標
値とする信号切換手段を設けた構成である。
Next, the invention corresponding to claim 2 includes, in addition to the comparison and judgment means, a subtraction means for subtracting the calculation target value from the control target value, and a calculation target value that is normally set as a target value for the PI adjustment calculation. and a signal switching means for taking in the output of the subtracting means and adding and synthesizing it to the control target value to obtain a target value for the PI adjustment calculation when a switching command is received from the comparing and determining means. It is.

さらに、請求項3に対応する発明は、請求項2の発明の
減算手段の出力側に所定の遅れ演算を行って前記制御目
標値に加算合成する1次遅れ要素を付加してなる構成で
ある。
Furthermore, the invention corresponding to claim 3 is a configuration in which a first-order lag element is added to the output side of the subtraction means of the invention of claim 2, which performs a predetermined delay calculation and adds and synthesizes the control target value. .

(作用) 従って、請求項1に対応する発明は以上のような手段を
講じたことにより、比較判断手段で制御目標値と演算目
標値との差を取り出した後、この差と予め定めた所定値
とを比較し、この差が所定値以上であれば信号切換手段
に演算目標値を選択するように切換え指令を与え、前記
差が所定値以下になったとき前記信号切換手段に制御目
標値を選択するように切換え指令を与えることにより、
演算目標値が制御目標値に近づいたとき、信号切換手段
にて直接制御目標値を取り込んでP!調節用の目標値と
するものである。
(Operation) Therefore, the invention corresponding to claim 1 takes the above-mentioned measures, and after extracting the difference between the control target value and the calculation target value by the comparison judgment means, this difference and a predetermined predetermined value are calculated. If the difference is greater than or equal to a predetermined value, a switching command is given to the signal switching means to select the calculated target value, and when the difference is less than or equal to the predetermined value, a switching command is given to the signal switching means to select the control target value. By giving a switching command to select
When the calculated target value approaches the control target value, the signal switching means directly takes in the control target value and P! This is the target value for adjustment.

請求項2に対応する発明では、常時は演算目標値を前記
PI調節演算のための目標値のベースとし、比較判断手
段において制御目標値と演算目標値の差が所定値以下と
なったとき切換え指令を発する。信号切換手段は切換え
指令を受けると導通状態となり、減算手段の出力(制御
目標値−演算目標値)を前記PII節演算のためのベー
スとなる前記演算目標値に加算合成してPII節用の目
標値とするものである。
In the invention corresponding to claim 2, the calculated target value is always used as the base of the target value for the PI adjustment calculation, and the switching is performed when the difference between the control target value and the calculated target value becomes equal to or less than a predetermined value in the comparison judgment means. Issue a command. When the signal switching means receives a switching command, it becomes conductive, and adds and synthesizes the output of the subtraction means (control target value - calculation target value) to the calculation target value, which is the base for the PII clause calculation, to obtain the PII clause target. It is a value.

次に、請求項3に対応する発明では、減算手段の出力(
制御目標値−演算目標値)を1次遅れ要素により平滑化
して前記PII節演算のためのベースとなる前記演算目
標値に加算合成するものである。
Next, in the invention corresponding to claim 3, the output of the subtraction means (
(control target value - calculation target value) is smoothed by a first-order lag element and added to and synthesized with the calculation target value which becomes the base for the PII clause calculation.

(実施例) 以下、請求項1に対応する発明の一実施例について第1
図を参照して説明する。なお、同図において第5図と同
・一部分には同一符号を付してその詳しい説明は省略し
、以下、専ら従来装置と比較して異なる部分について説
明する。すなわち、本装置においては、制御目標値入力
端と加算手段14の出力端との間に制御目標値Svと目
標値フィルタ手段1の出力である演算目標値S V o
との差が予め定めた所定値以下になったか否かを判断す
るための比較判断手段11を設けたこと、この比較判断
手段11において前記差が所定値以上であるときに切換
え指令を受けて演算目標値Sv。
(Example) Hereinafter, the first example of the invention corresponding to claim 1 will be described.
This will be explained with reference to the figures. In this figure, parts that are the same as those in FIG. 5 are given the same reference numerals, and a detailed explanation thereof will be omitted, and hereinafter, only the parts that are different from the conventional apparatus will be explained. That is, in this device, between the control target value input terminal and the output terminal of the adding means 14, the control target value Sv and the calculated target value S V o which is the output of the target value filter means 1 are connected.
A comparison and judgment means 11 is provided to judge whether the difference between the two and the two has become equal to or less than a predetermined value. Calculation target value Sv.

を選択し、また差が所定値以下となったときの切換え指
令を受けて制御目標値S■を選択して前記偏差演算手段
3に導入する信号切換手段12を設けたことにある。
, and receives a switching command when the difference is less than a predetermined value, and selects the control target value S■ and introduces it into the deviation calculation means 3.

従って、以上のような実施例の構成によれば、制御目標
値Svがステップ状に変化したとき、比較判断手段11
では目標値SVと演算目標値S V oとによる差信号
と所定値δとの大小関係を比較するが、ステップ変化直
後でもあるので、l5V−8Vo  I≧δ なる関係にあり、その結果、比較判断手段11の出力を
受けて信号切換手段12では演算目標値S V oを選
択出力する。従って、この場合にはPII節手段4への
目標値SVaはSvoとなり、いわゆる従来の第4図と
同様な応答特性の演算目標値SvoがPII節手段4に
与えられることになる。なお、所定値δとは2自由度に
影響を及ぼさない程度の値であり、実験や過去の経験に
基づいて定められる。
Therefore, according to the configuration of the embodiment as described above, when the control target value Sv changes in a stepwise manner, the comparison judgment means 11
Now, the magnitude relationship between the difference signal from the target value SV and the calculated target value S Vo and the predetermined value δ is compared, but since it is also immediately after a step change, the relationship is 15V-8Vo I≧δ, and as a result, the comparison In response to the output of the determining means 11, the signal switching means 12 selects and outputs the calculated target value S V o. Therefore, in this case, the target value SVa to the PII node means 4 becomes Svo, and the calculated target value Svo having the same response characteristic as that in the conventional FIG. 4 is given to the PII node means 4. Note that the predetermined value δ is a value that does not affect the two degrees of freedom, and is determined based on experiments and past experience.

その後、演算目標値S V oは徐々に上昇していくが
、このとき比較判断手段11では目標値Svと演算目標
値Svoとの差と所定値δとを比較し、5V−SVol
<δ なる関係、つまり差が所定値δ以下となったとき、切換
え指令を発生する。ここで、信号切換手段12はその切
換え指令を受けて制御目標値SVを選択するので、PI
調調節平手目標値しては5Va−SVとなり、第2図(
イ)に示すように短時間に目標値Svに整定させること
ができる。
Thereafter, the calculated target value S V o gradually increases, but at this time, the comparison/judgment means 11 compares the difference between the target value Sv and the calculated target value Svo with the predetermined value δ, and calculates 5V-SVo.
<δ, that is, when the difference is less than or equal to the predetermined value δ, a switching command is generated. Here, the signal switching means 12 receives the switching command and selects the control target value SV, so the PI
The adjustment target value is 5Va-SV, which is shown in Figure 2 (
As shown in b), it is possible to settle to the target value Sv in a short time.

なお、前記比較判断手段11や信号切換手段12は抵抗
、コンデンサや半導体を用いてハードウェアによって実
現してもよいし、或いはコンピュータを用いてソフトウ
ェア的に実現してもよい。
Note that the comparison/judgment means 11 and the signal switching means 12 may be realized by hardware using resistors, capacitors, or semiconductors, or may be realized by software using a computer.

次に、請求項2に対応する発明の一実施例について第3
図を参照して説明する。この場合も第5図と同一部分に
は同一符号を付してその詳しい説明は省略し、以下、専
ら異なる部分だけについて説明する。
Next, we will discuss the third embodiment of the invention corresponding to claim 2.
This will be explained with reference to the figures. In this case as well, the same parts as in FIG. 5 are designated by the same reference numerals, and detailed explanation thereof will be omitted, and only the different parts will be explained below.

この実施例は、第1図と同様な機能を有する比較判断手
段11のほか、目標値SVから演算目標値Svoを減算
する減算手段21と、この減算手段21から信号切換手
段22を介して得られる出力と目標値フィルタ手段1の
出力となる演算目標値S V oとを加算する加算手段
23を設け、この加算手段23の出力をPII節用の目
標値として偏差演算手段3に導入する構成である。
In this embodiment, in addition to the comparison/judgment means 11 having the same function as that shown in FIG. An adding means 23 is provided for adding the output of the target value to the calculated target value S V o which is the output of the target value filter means 1, and the output of the adding means 23 is introduced into the deviation calculating means 3 as a target value for the PII clause. be.

つまり、この実施例は、常時は目標値フィルタ手段1の
演算目標値Svoをベースとする一方、前記比較判断手
段11では目標値SVと演算目標値Svoとの差を前記
演算目標値Sv0に加算合成するか否かを判断する機能
を持たせたものである。
That is, in this embodiment, the calculation target value Svo of the target value filter means 1 is always used as the base, while the comparison judgment means 11 adds the difference between the target value SV and the calculation target value Svo to the calculation target value Sv0. It has a function to determine whether to combine or not.

従って、以上のような実施例の構成によれば、常時は目
標値フィルタ手段1から出力する演算目標値SVoが加
算手段23を経てPI調節用目標値SVaとして偏差演
算手段3に導入されている。
Therefore, according to the configuration of the embodiment as described above, the calculated target value SVo outputted from the target value filter means 1 is normally introduced into the deviation calculating means 3 via the adding means 23 as the PI adjustment target value SVa. .

この状態において目標値Svがステップ状に変化すると
、比較判断手段11では目標値SVと演算目標値S■。
When the target value Sv changes stepwise in this state, the comparison/determination means 11 compares the target value SV with the calculated target value S■.

との差と所定値δとを比較するが、ステップ変化直後で
あることから、 5VSVol≧δ なる関係にあり、比較判断手段11から切換え指令が発
生されないので、信号切換手段22は非導通の状態にあ
る。その結果、PI調節用目標値として5Va−8Vo
が偏差演算手段3に送られる。
and the predetermined value δ, but since it is immediately after the step change, there is a relationship such that 5VSVol≧δ, and since the switching command is not generated from the comparing and determining means 11, the signal switching means 22 is in a non-conducting state. It is in. As a result, the target value for PI adjustment was 5Va-8Vo.
is sent to the deviation calculation means 3.

その後、演算目標値S V oは徐々に上昇していくが
、このとき比較判断手段11では目標値SVと演算目標
値S V oとの差と所定値δとを比較し、5V−8V
ol<δ なる関係、つまり差が所定値δ以下となっとき切換え指
令を発する。その結果、信号切換手段22は導通状態と
なって減算手段21から(SV−8vo)なる減算信号
を加算手段23に導入するので、この加算手段23から
は、 5Va−3Vo + (SV−3VO)−8Vなる信号
、つまり目標値Svが直接偏差演算手段3に導入される
。従って、目標値変化に対する応答特性は第1図と同様
に第2図(イ)のようになる。
Thereafter, the calculated target value SV o gradually increases, but at this time, the comparison/judgment means 11 compares the difference between the target value SV and the calculated target value SV o with the predetermined value δ, and calculates the difference between 5V and 8V.
When the relationship ol<δ, that is, the difference is less than or equal to the predetermined value δ, a switching command is issued. As a result, the signal switching means 22 becomes conductive and introduces the subtraction signal (SV-8vo) from the subtracting means 21 into the adding means 23, so that from this adding means 23, 5Va-3Vo + (SV-3VO) A signal of -8V, that is, a target value Sv, is directly introduced into the deviation calculating means 3. Therefore, the response characteristic to a change in the target value is as shown in FIG. 2(a), similar to FIG. 1.

よって、この実施例によれば、常時演算目標値S V 
oを偏差演算手段3に導入し、目標値S■と演算目標値
S V oとの差が所定値δ以下となったとき、S V
 oに減算信号(SV  5Vo)を合成する構成であ
るので、全く瞬断なく偏差演算手段3にPI調節用目標
値を与えることができる。
Therefore, according to this embodiment, the constantly calculated target value S V
o is introduced into the deviation calculating means 3, and when the difference between the target value S■ and the calculated target value S V o becomes equal to or less than the predetermined value δ, S V
Since the configuration is such that the subtraction signal (SV 5Vo) is synthesized with o, the target value for PI adjustment can be given to the deviation calculation means 3 without any momentary interruption.

さらに、請求項3に対応する発明の一実施例について第
4図を参照して説明する。この場合も第5図と同一部分
には同一符号を付してその詳しい説明は省略し、以下、
専ら異なる部分だけについて説明する。
Furthermore, an embodiment of the invention corresponding to claim 3 will be described with reference to FIG. In this case as well, the same parts as in FIG.
Only the different parts will be explained.

この実施例においては、第3図とほぼ同様な構成を有す
るものであり、特に異なるところは加算手段23の入力
側に新たに1次遅れ要素31を付加したものである。
This embodiment has substantially the same configuration as that shown in FIG. 3, with the main difference being that a first-order lag element 31 is newly added to the input side of the adding means 23.

従って、この装置は、第3図と同様に目標値S■がステ
ップ状に変化したとき、比較判断手段11では目標値S
Vと演算目標値S■0との差と所定値とを比較するが、
ステップ変化直後であることから、 5VSVol≧δ なる関係にあり、このため、信号切換手段22は非導通
の状態にある。その結果、PI調節用目標値として5V
a−SVoが偏差演算手段3に送られる。
Therefore, in this device, when the target value S changes in a stepwise manner as in FIG.
The difference between V and the calculated target value S■0 is compared with a predetermined value,
Since it is immediately after the step change, there is a relationship such that 5VSVol≧δ, and therefore, the signal switching means 22 is in a non-conductive state. As a result, the target value for PI adjustment is 5V.
a-SVo is sent to the deviation calculation means 3.

しかし、演算目標値S V oがある値まで上昇したと
き、 5V−3VOl<δ なる関係、つまり差が所定値δ以下となり、ここで比較
判断手段11から切換え指令を発する。その結果、信号
切換手段22は導通状態となり、減算手段21の出力(
SV−3VO)を1次遅れ要素31に導入し、 5Va−8Vo+(SV  5Vo)”(1/(1+θ
T+”S)1なる遅れ演算によって平滑化して加算手段
23で加算合成するので、第2図の(ロ)に示すような
応答特性をもって制御目標値S■に整定していく。
However, when the calculated target value S Vo rises to a certain value, the relationship 5V-3VOl<δ, that is, the difference becomes less than the predetermined value δ, and the comparison/judgment means 11 issues a switching command. As a result, the signal switching means 22 becomes conductive, and the output (
SV-3VO) is introduced into the first-order lag element 31, and 5Va-8Vo+(SV 5Vo)'' (1/(1+θ
Since smoothing is performed by a delay calculation of T+"S)1 and addition is performed by the adding means 23, the control target value S■ is settled with a response characteristic as shown in FIG. 2 (B).

なお、θは1以下とする。Note that θ is 1 or less.

従って、この実施例の構成によれば、信号切換手段22
の導通時、減算出力(S V −S V o )を平滑
化しながら加算手段23にて加算合成することにより、
PI調節手段4から急変させずに操作信号MVを出力で
き、よって制御対象2にショックを与えることがなく、
プロセスにも影響を与えることがない。
Therefore, according to the configuration of this embodiment, the signal switching means 22
When conductive, the addition means 23 adds and synthesizes the subtracted output (S V −S V o ) while smoothing it.
The operation signal MV can be outputted from the PI adjustment means 4 without sudden changes, and therefore no shock is given to the controlled object 2.
It does not affect the process.

なお、本発明は上記実施例に限定されるものではない。Note that the present invention is not limited to the above embodiments.

第4図では加算手段23の入力側に1次遅れ要素31を
設けたが、例えば第1図に示す信号切換手段12の接点
す側に1次遅れ要素を設けてもよい。また、上記実施例
ではPI調整演算について述べたが、PID(D:微分
)調節演算でも同様に適用できるものである。その他、
本発明はその要旨を逸脱しない範囲で種々変形して実施
できる。
Although the first-order lag element 31 is provided on the input side of the addition means 23 in FIG. 4, the first-order lag element 31 may be provided on the contact side of the signal switching means 12 shown in FIG. 1, for example. Further, in the above embodiment, the PI adjustment calculation was described, but the invention can be similarly applied to the PID (D: differential) adjustment calculation. others,
The present invention can be implemented with various modifications without departing from the gist thereof.

[発明の効果] 以上説明したように本発明によれば次のような種々の効
果を奏する。
[Effects of the Invention] As explained above, the present invention provides the following various effects.

先ず、請求項1の発明においては、目標値の変化に対し
、本来の2自由度化の機能を阻害しない範囲で応答時間
を大幅に短縮して調節用目標値を制御目標値に整定させ
ることができる。
First, in the invention of claim 1, in response to a change in the target value, the response time is significantly shortened to the extent that the original two-degree-of-freedom function is not inhibited, and the adjustment target value is set to the control target value. I can do it.

次に、請求項2では、目標値の変化に対し、調節用目標
値と制御目標値との差が所定値以下になったとき瞬断な
く調節用目標値を制御目標値に移行させることができる
Next, in claim 2, in response to a change in the target value, when the difference between the adjustment target value and the control target value becomes equal to or less than a predetermined value, the adjustment target value can be shifted to the control target value without momentary interruption. can.

さらに、請求項3の発明では、調節用目標値と制御目標
値との差が所定値以下になったとき、調節用目標値の平
滑化を行ってスムーズに制御目標値に移行させることが
できる。
Furthermore, in the invention of claim 3, when the difference between the adjustment target value and the control target value becomes equal to or less than a predetermined value, the adjustment target value can be smoothed to smoothly shift to the control target value. .

従って、上記各発明においては、目標値の変化に対して
目標値追従時間を大幅に短縮でき、目標値フィルタ手段
付き調節装置の性能を大きく向上でき、プラント全体に
ちりばめることによってプラント運転特性の高効率化を
実現できる。
Therefore, in each of the above inventions, it is possible to significantly shorten the target value follow-up time in response to changes in the target value, greatly improve the performance of the adjustment device with target value filter means, and improve the plant operating characteristics by distributing it throughout the plant. Efficiency can be achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は請求項1に係わる発明の一実施例を示す機能ブ
ロック図、第2図は本発明装置における目標値フィルタ
のステップ応答特性を示す図、第3図は請求項2に係わ
る発明の一実施例を示す機能ブロック図、第4図は請求
項3に係わる発明の一実施例を示す機能ブロック図、第
5図は従来装置の機能ブロック図、第6図は従来装置の
目標値フィルタのステップ応答特性を示す図である。 1・・・目標値フィルタ手段、2・・・制御対象、3・
・・偏差演算手段、4・・・PIまたはPID調節手段
、11・・・比較判断手段、12・・・信号切換手段、
21・・・減算手段、22・・・信号切換手段、23・
・・加算手段、31・・・1次遅れ要素。 出願人代理人 弁理士 鈴江武彦
FIG. 1 is a functional block diagram showing an embodiment of the invention according to claim 1, FIG. 2 is a diagram showing the step response characteristic of the target value filter in the device of the present invention, and FIG. FIG. 4 is a functional block diagram showing an embodiment of the invention according to claim 3, FIG. 5 is a functional block diagram of a conventional device, and FIG. 6 is a target value filter of the conventional device. FIG. 2 is a diagram showing step response characteristics of FIG. DESCRIPTION OF SYMBOLS 1...Target value filter means, 2...Controlled object, 3.
... Deviation calculating means, 4... PI or PID adjusting means, 11... Comparing and determining means, 12... Signal switching means,
21... Subtraction means, 22... Signal switching means, 23.
... Addition means, 31... First-order lag element. Applicant's agent Patent attorney Takehiko Suzue

Claims (3)

【特許請求の範囲】[Claims] (1)目標値フィルタ手段が設けられ、この目標値フィ
ルタ手段側から得られる目標値と制御対象からの制御量
との偏差を用いて少なくともPI(P:比例、I:積分
)調節演算を実行し、得られた操作信号を前記制御対象
に印加する2自由度調節装置において、 前記目標値フィルタ手段に与える制御目標値とこの目標
値フィルタ手段の演算処理によって得られる演算目標値
との差を取り出し、この差が所定値以下となったとき前
記制御目標値を直接選択して前記PI調節演算のための
目標値とするように構成したことを特徴とする目標値追
従速応形2自由度調節装置。
(1) Target value filter means is provided, and at least PI (P: proportional, I: integral) adjustment calculation is performed using the deviation between the target value obtained from the target value filter means and the controlled amount from the controlled object. In a two-degree-of-freedom adjustment device that applies the obtained operation signal to the controlled object, the difference between the control target value given to the target value filter means and the calculated target value obtained by the calculation process of the target value filter means is determined. target value follow-up speed response with two degrees of freedom, characterized in that the control target value is directly selected and set as the target value for the PI adjustment calculation when the difference becomes equal to or less than a predetermined value. Regulator.
(2)目標値フィルタ手段が設けられ、この目標値フィ
ルタ手段側から得られる目標値と制御対象からの制御量
との偏差を用いて少なくともPI調節演算を実行し、得
られた操作信号を前記制御対象に印加する2自由度調節
装置において、前記目標値フィルタ手段に与える制御目
標値とこの目標値フィルタ手段の演算処理によって得ら
れる演算目標値との差を取り出し、この差が所定値以下
となったとき切換え指令を出力する比較判断手段と、前
記制御目標値から前記演算目標値を減算する減算手段と
、常時は前記演算目標値を前記PI調節演算のための目
標値とし、前記比較判断手段から切換え指令を受けたと
き前記減算手段の出力を取り込んで前記制御目標値に加
算合成して前記PI調節演算のための目標値とする信号
切換手段とを備えたことを特徴とする目標値追従速応形
2自由度調節装置。
(2) Target value filter means is provided, and the deviation between the target value obtained from the target value filter means and the control amount from the controlled object is used to execute at least a PI adjustment calculation, and the obtained operation signal is In a two-degree-of-freedom adjustment device that applies an electric current to a controlled object, the difference between the control target value applied to the target value filter means and the calculated target value obtained by the calculation process of the target value filter means is extracted, and this difference is determined to be less than or equal to a predetermined value. a comparison judgment means for outputting a switching command when the control target value is reached; a subtraction means for subtracting the calculation target value from the control target value; and a subtraction means for subtracting the calculation target value from the control target value; and a signal switching means for taking in the output of the subtracting means and adding and synthesizing it to the control target value to obtain a target value for the PI adjustment calculation when receiving a switching command from the means. Follow-up speed responsive 2 degrees of freedom adjustment device.
(3)請求項2記載の目標値追従速応形2自由度調節装
置において、前記比較判断手段から切換え指令を受けた
とき前記減算手段の出力に所定の遅れ演算を行って前記
演算目標値に加算合成する1次遅れ要素を付加したこと
を特徴とする目標値追従速応形2自由度調節装置。
(3) In the target value following speed responsive two degrees of freedom adjusting device according to claim 2, when a switching command is received from the comparison/judgment means, a predetermined delay calculation is performed on the output of the subtraction means to obtain the calculated target value. A target value following speed responsive two degree of freedom adjustment device characterized by adding a first-order lag element for additive synthesis.
JP23764290A 1990-09-07 1990-09-07 Target value tracking speed responsive 2-DOF adjustment device Expired - Lifetime JP2752240B2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP23764290A JP2752240B2 (en) 1990-09-07 1990-09-07 Target value tracking speed responsive 2-DOF adjustment device
EP91308139A EP0474492B1 (en) 1990-09-07 1991-09-05 Two degrees of freedom type control system
DE69114623T DE69114623T2 (en) 1990-09-07 1991-09-05 Control system of the type with two degrees of freedom.
AU83656/91A AU625714B2 (en) 1990-09-07 1991-09-06 Two degrees of freedom type control system
CN91109572A CN1045669C (en) 1990-09-07 1991-09-07 Two degrees of freedom type control system
KR1019910015624A KR950009526B1 (en) 1990-09-07 1991-09-07 Two degrees of freedom type control system
US07/757,011 US5245529A (en) 1990-09-07 1991-09-09 Two degrees of freedom type control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23764290A JP2752240B2 (en) 1990-09-07 1990-09-07 Target value tracking speed responsive 2-DOF adjustment device

Publications (2)

Publication Number Publication Date
JPH04117504A true JPH04117504A (en) 1992-04-17
JP2752240B2 JP2752240B2 (en) 1998-05-18

Family

ID=17018353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23764290A Expired - Lifetime JP2752240B2 (en) 1990-09-07 1990-09-07 Target value tracking speed responsive 2-DOF adjustment device

Country Status (1)

Country Link
JP (1) JP2752240B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8777382B2 (en) 2011-02-10 2014-07-15 Ricoh Company, Ltd. Inkjet head and image forming device
US8960866B2 (en) 2012-01-10 2015-02-24 Ricoh Company, Ltd. Electromechanical transducer element, liquid discharge head, liquid discharge device, and image forming apparatus
CN114082789A (en) * 2020-08-24 2022-02-25 株式会社日立制作所 Plant control device and plant control method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8777382B2 (en) 2011-02-10 2014-07-15 Ricoh Company, Ltd. Inkjet head and image forming device
US8960866B2 (en) 2012-01-10 2015-02-24 Ricoh Company, Ltd. Electromechanical transducer element, liquid discharge head, liquid discharge device, and image forming apparatus
CN114082789A (en) * 2020-08-24 2022-02-25 株式会社日立制作所 Plant control device and plant control method
CN114082789B (en) * 2020-08-24 2023-09-19 株式会社日立制作所 Rolling mill control device and rolling mill control method

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