JPH04115240A - Optical logical arithmetic unit - Google Patents

Abstract

PURPOSE:To realize a large-scale arithmetic processor of extremely simple constitution by using basic optical cells in three-layered structure of a light emitting and receiving element and a liquid crystal element provided in their opposition gap. CONSTITUTION:A light emitting diode driving circuit 12 and a light emitting diode 11 are related as shown by (A), and the diode 11 illuminates when an input 13 is '1' and goes off when '0'. A liquid crystal driving circuit 22 and liquid crystal 21 are related as shown by (B) and the liquid crystal 21 is transparent when an input 23 is '1' and reflective when '0'. A phototransistor 31 and a phototransistor output circuit 32 are related as shown by (C) and an output 33 is '0' when the transistor 31 receives light and '1' in other cases. This basic optical cell is used to constitute various basic gates and the large-scale logical arithmetic unit which can realize a lrage-scale logical arithmetic circuit in simple structure is obtained.

Description

TECHNICAL FIELD The present invention relates to an optical logic operation device, and more particularly to an optical logic operation device used in an information processing device such as a digital computer.

Prior Art In conventional digital arithmetic processing devices, execution of pool algebra is realized by replacing binary logic with various physical values. Examples that have been put to practical use to date include the open and closed states in relay circuits, the two directions of magnetization in a magnetic core, the presence or absence of current or voltage in semiconductor circuits, and the presence or absence of light in optical elements. An example is an arithmetic processing device that uses the state as two values.

Among these, silicon semiconductor integrated circuits, in which semiconductors, especially silicon transistors, are used to configure the basic arithmetic processing unit, and many of these arithmetic processing units are incorporated on a single silicon chip, currently achieve low-energy, high-speed arithmetic operations. It has become mainstream as something that can be done.

These silicon semiconductor integrated circuits include TTL (transistor transistor logic) and ECL (emitter coupled transistor) using bipolar transistors.
logic), CMd5 (complementary field effect transistor)
There are circuits using etc. In each of these circuits, the basic logic circuit realized by multiple transistors is 11"L during one calculation process, and by connecting the 11th position with wiring. , realizes various arithmetic processing.

For example, as shown in Figure 10 (B), 7 sekmelet a -
The logic circuit for driving the display of g is shown in Fig. 10 (A).
This is the configuration shown in . For example, a specific example of a two-man powered Nantes-Cate circuit that constitutes this circuit is shown in Figure 10 (C
There is a TTL circuit shown in ). When the circuit of FIG. 10(A) is constructed using this TTL circuit as a basic logic gate,
It can be formed with one recon chip. Therefore, compared to other circuit systems using relay circuits, magnetic cores, etc., the silicon semiconductor circuit system is the most advantageous.

However, even with the use of silicon semiconductors, which are ideal for integration, it is currently difficult to achieve this with a single silicon chip for computers, digital electronic exchanges, and other devices that require large-scale arithmetic processing. It is impossible to do this, and it is necessary to combine the individual arithmetic processes realized in multiple silicon chips and to interconnect these silicon chips with wiring.

To this end, these devices are realized using a wiring card made of a printed wiring board on which a plurality of silicon chips are mounted, and a motherboard also made of a printed wiring board for interconnecting a plurality of wirings.

Therefore, the manufacturing of these devices requires two completely different component manufacturing lines, one for manufacturing silicon chips and the other for manufacturing printed wiring boards, which results in a loss in production efficiency. Since there are at least three mounting levels, ie, the motherboard, and the motherboard, there are many wiring connection points, which tends to reduce reliability.

OBJECT OF THE INVENTION Therefore, the present invention was made to solve the drawbacks of the prior art, and its purpose is to provide an optical logic operation device that can realize a large-scale logic operation circuit with a simple structure. It is about providing.

Composition of the Invention An optical logic operation device according to the present invention includes a light emitting element and a light receiving element arranged facing each other, a liquid crystal element arranged in a gap between them, and controlling the light emitting element. It includes a light emission control means and a light transmission control means for controlling light transmission of the liquid crystal element, each control input of the light emission control means and the light transmission control means is a logic input signal, and the output of the light receiving element is a logic output signal. It is characterized by being used as a.

Another optical logic operation device according to the present invention includes a light source matrix layer composed of a plurality of light emitting elements arranged in a matrix in a plane, and a light source matrix layer arranged in a matrix in parallel with and facing the light source matrix layer. A light-receiving matrix layer composed of a plurality of light-receiving elements, and a plurality of liquid crystal elements arranged in a matrix in a gap between the light source matrix layer and the light-receiving matrix layer in close contact with both layers. a liquid crystal matrix layer;
a plurality of light emission control means provided corresponding to each of the light emitting elements to control the light emitting state of the corresponding light emitting element; and a plurality of light emission control means provided corresponding to each of the liquid crystal elements to control the light transmission of the corresponding liquid crystal element. A light transmission control means W, and a shielding means for preventing optical interference between these basic optical cells when the corresponding light emitting element, liquid crystal element, and light receiving element in the vertical direction of each matrix layer are used as basic optical cells. In each basic optical cell, each control input of the light emission control means and the light transmission control means is used as a logic input signal, and each output of the light receiving element is used as a logic output signal. It is characterized by an optical logic arithmetic unit.

Embodiments Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a perspective view including a cross section showing an embodiment of the present invention. The light emitting element matrix layer 1 is composed of a plurality of light emitting diodes 11 arranged in a matrix in a plane.

The liquid crystal matrix layer 2 is also composed of a plurality of liquid crystals 21 arranged in a planar matrix. Further, the light-receiving element matrix layer 3 is also composed of a plurality of phototransistors 31 arranged in a matrix in a plane.

Light emitting element matrix layer 1 and light receiving element matrix layer 3
A liquid crystal matrix layer 2 is disposed in close contact with each of these layers in the opposing gap.

A light emitting diode 11, a liquid crystal 2], and a phototransistor 31 corresponding to χ1 in the vertical direction of the matrix layer.
are basic optical cells 20, and in order to prevent optical interference between these basic optical cells, shielding partition walls 10 are arranged between adjacent basic optical cells.

A light emitting diode drive circuit 12, a liquid crystal drive circuit 22, and a phototransistor output circuit 32 are provided in correspondence with each of the light emitting diode 11, liquid crystal 21, and phototransistor 31 constituting each basic optical cell 20, respectively.

The relationship between the light emitting diode drive circuit 12 and the light emitting diode 1 is as shown in FIG.
When it is "O", the light is turned off.

The relationship between the liquid crystal drive circuit 22 and the liquid crystal 21 is as shown in FIG.
becomes translucent, and becomes reflective when it is at 0°.

The relationship between the phototransistor 31 and the phototransistor output circuit 32 is as shown in FIG. 2(C), and when the phototransistor 31 receives light, the output 33 becomes "O", and otherwise becomes "1". shall be taken as a thing.

From the above, various basic gates can be constructed using this basic optical cell. First, referring to Figure 3,
If the driving input of the light emitting element 11 is set to A and the driving force of the liquid crystal element 21 is fixedly set to "1", the light receiving element 31
The output from is the negation of A (A), and the inverter lf
- can be obtained.

Referring to FIG. 4, if the human power for driving the light-emitting element 11 and the liquid crystal element 21 is A and B, respectively, the output from the light-receiving element 31 is the negation of AB (A-B), resulting in a Nandgeld.

Referring to FIG. 5, two basic optical cells are used to obtain an AND gate. Light emitting element of one optical cell 1.1
2 and liquid crystal element 2 ], the human power for driving each of a is A and B, respectively.
The output A-B of the light receiving element 31a is used as the drive input for the light emitting element 11b of another optical cell. If the drive input of the liquid crystal element 21b is fixed and always "]', then
Light receiving element 31. A-B is obtained as the output of b, resulting in an AND gate.

FIG. 6 is an example of obtaining an OR gate using three basic optical cells. The driving input of the light emitting element 11a of the first optical cell is A, the driving force of the light emitting element 11b of the second optical cell is B, and the driving inputs of the liquid crystal elements 21a and 21b of both optical cells are fixed to "1". .

The outputs of the light-receiving elements 31a and 31b of both optical cells are used as drive inputs of the light-emitting element 11C1 and the liquid crystal element f-21c of the third optical cell, and A+B is obtained from the output of the light-receiving element 31c. That is, from the relationship A-B-A+B,
The configuration shown in FIG. 6 becomes an OR gate.

As shown in FIG. 5.6, a plurality of optical cells are required to realize the anchor and OR gate. Therefore, in order to simplify the process, a configuration as shown in FIGS. 7(A) and 7(B) can be considered.

To obtain an AND gate, as shown in FIG. An anchor is constructed using one elementary optical cell.

Moreover, in order to obtain the oracle, as shown in FIG. 7(B), a two-man operation A of the basic optical cell according to the present invention is required.

If B (both partial inputs to the light emitting element 11 and liquid crystal element 21) is inverted and supplied, the output of the light receiving element 31 will be A+B.

FIG. 8 is a perspective view including a cross section showing another embodiment of the present invention, and parts equivalent to those in FIG. 1 are designated by the same reference numerals. In this embodiment, two liquid crystal matrix layers 2 and 5 are arranged between the light emitting element 7 tonox layer 1 and the light receiving element 1 fux layer 3, and each liquid crystal element 51 of the liquid crystal matrix layer 5
To each? The structure includes a liquid crystal drive circuit 52 corresponding to the IJ.

In this example, as the light-emitting element matrix layer 1, the semiconductor lasers 41 that are in a constantly lit state are arranged in a matrix, and therefore the drive circuit therefor (on/off drive circuit for lighting control) is omitted. .

The other configurations are the same as the embodiment shown in FIG.
The NAND logic of 2.52 and 23.53 is obtained from the output horn 33 of the output circuit 32 of the light receiving element 31.

It is clear that even if the basic optical cell of this embodiment is used, the basic logic gates shown in FIGS. 3 to 7 can be similarly obtained.

FIG. 9 is a perspective view including a cross section showing another embodiment of the present invention, and parts equivalent to those in FIGS. 1 and 8 are designated by the same reference numerals. In the embodiment shown in FIG. 8, the light emitting element matrix layer 1 is a semiconductor laser that is always on, but in this embodiment, similarly to the one in FIG. As controllable, 3-person power A-C
It is also possible to obtain the Nando logic.

It is clear that the basic cages shown in FIGS. 3 to 7 can also be obtained in this embodiment.

Structure of the Invention According to the present invention, a basic gate can be easily obtained using a basic optical cell consisting of a three-layer structure consisting of a light emitting/receiving element and a liquid crystal element provided in an opposing gap. This has the advantage that a large-scale arithmetic processing device can be realized with an extremely simple configuration.

[Brief explanation of the drawing]

FIG. 1 is a perspective view including a cross section of an embodiment of the present invention, and FIG.
A) to (C) are diagrams showing the relationships between the light emitting element, liquid crystal element, and light receiving element of the basic optical cell and the corresponding drive circuit and output circuit. Figure 3 shows the input and output when obtaining a knot gate using the basic optical cell. Figure 4 is a diagram showing the input/output relationship when obtaining a Nanteskey 1. FIG. 6 is a diagram showing the input/output relationship when obtaining an ornate signal using a basic optical cell, FIG. 7 is a diagram showing an application example of the basic optical cell, and FIGS. 8 and 9 are cross sections of other embodiments of the present invention. 10(A) is a diagram showing an example of a drive circuit for a 7-segment display, FIG. 10(B) is an external view of a 7-segment display, and FIG. 10(C) is a two-person canant gate. It is a circuit diagram when realized by TTL. Explanation of symbols of main parts]...Light emitting element matrix 2.5...Liquid crystal matrix 3...Light receiving element matrix 11...Light emitting element 12...Light emission Element drive circuit 21...Liquid crystal '2' liquid crystal drive circuit '3 1. Light receiving element' output circuit

Claims (2)

[Claims] (1) A light-emitting element and a light-receiving element arranged to face each other, a liquid crystal element arranged in a gap between them, a light-emission control means for controlling light emission of the light-emitting element, and a light-emission control means for controlling light transmission of the liquid crystal element. a light control means, each control input of the light emission control means and the light transmission control means being a logic input signal;
An optical logic operation device characterized in that the output of the light receiving element is used as a logic output signal. (2) A light source matrix layer made up of a plurality of light emitting elements arranged in a matrix on a plane, and a light receiving element made up of a plurality of light receiving elements arranged in a matrix in parallel with and facing the light source matrix layer. a matrix layer; a liquid crystal matrix layer composed of a plurality of liquid crystal elements arranged in a matrix in close contact with both the light source matrix layer and the light receiving matrix layer in the opposing gap between the light source matrix layer and the light receiving matrix layer; and each of the light emitting elements. a plurality of light emission control means provided correspondingly to control the light emission state of the corresponding light emitting element; a plurality of light transmission control means provided correspondingly to each of the liquid crystal elements and controlling light transmission of the corresponding liquid crystal element; When a light emitting element, a liquid crystal element, and a light receiving element corresponding in the vertical direction of the matrix layer are used as basic optical cells, each basic optical cell includes a shielding means for preventing optical interference between these basic optical cells. , each control input of the light emission control means and the light transmission control means is a logic input signal,
An optical logic operation device characterized in that each output of the light receiving element is used as a logic output signal.