JPH04113795A - Wired broadcast telephone exchange - Google Patents

Wired broadcast telephone exchange

Info

Publication number
JPH04113795A
JPH04113795A JP23371390A JP23371390A JPH04113795A JP H04113795 A JPH04113795 A JP H04113795A JP 23371390 A JP23371390 A JP 23371390A JP 23371390 A JP23371390 A JP 23371390A JP H04113795 A JPH04113795 A JP H04113795A
Authority
JP
Japan
Prior art keywords
exchange processing
block
exchange
subscriber terminal
control section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23371390A
Other languages
Japanese (ja)
Inventor
Tadashi Sato
正 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP23371390A priority Critical patent/JPH04113795A/en
Publication of JPH04113795A publication Critical patent/JPH04113795A/en
Pending legal-status Critical Current

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  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To facilitate the increase in the line capacity and to prevent the system-down of the entire exchange even when a fault takes place in a control section of one block by providing plural block exchange processing sections and a main control section implementing exchange processing among the processing sections to the exchange, dividing into blocks and controlling them decentralizingly. CONSTITUTION:A digital exchange 100 consists of plural block exchange processing sections 1021-102n applying exchange processing to subscriber terminal groups 1031-103n in a predetermined block and a main control section MCPU 101 applying exchange processing among the block exchange processing sections, and each of the block exchange processing sections has a control section CPU 104 making internal exchange processing. In the case of talking between subscriber terminals in the subscriber terminal groups 1031, 1032, the CPU 104 in the block exchange processing section 1021 processes mutual talking data, and in the case of talking between one subscriber terminal in the subscriber terminal group 103n and one subscriber terminal in the subscriber terminal group 1031, the MCPU 101 processes the talking data via the CPUs in the block exchange processing sections 1021, 102n.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は有線放送電話交換機に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a wired broadcast telephone exchange.

〔従来の技術〕[Conventional technology]

従来の有線放送電話交換機は、1つのメインマイクロコ
ンピュータで全回線を制御・監理しており、加入者回線
インタフェース部の制御用に複数のマイクロコンピュー
タを使用した場合でも、加入者回線の監理は1つのメイ
ンマイクロコンピュータで行う構成となっていた。
In conventional cable broadcasting telephone exchanges, all lines are controlled and supervised by one main microcomputer, and even when multiple microcomputers are used to control the subscriber line interface section, the subscriber lines can only be supervised by one main microcomputer. It was configured with one main microcomputer.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の有線放送電話交換機では、1つのメイン
マイクロコンピュータで全回線を制御。
In the conventional cable broadcasting telephone exchange mentioned above, one main microcomputer controls all lines.

監理しているので、回線容量が増加するほどレスポンス
が遅くなるという欠点がある。
Since it is supervised, the disadvantage is that the response becomes slower as the line capacity increases.

又、加入者回線制御用に複数のマイクロコンピュータを
用いた場合でも、中央のメインマイクロコンピュータで
回線状態を監理しているため、中央のメインマイクロコ
ンピュータに障害が発生した際、交換機全体がダウンし
てしまうという欠点がある。
Furthermore, even when multiple microcomputers are used to control subscriber lines, the line status is supervised by the central main microcomputer, so if a failure occurs in the central main microcomputer, the entire exchange will go down. It has the disadvantage of being

〔課題を解決するための手段〕[Means to solve the problem]

本発明の有線放送電話交換機は、それぞれが予め決めら
れたブロック内の複数の電話゛機相互の交換処理を行う
複数のブロック交換処理部と、前記複数のブロック交換
処理部相互の交換処理を行う主制御部とを備え、前記複
数のブロック交換処理部はそれぞれ前記予め決められた
ブロック内の複数の電話機に加入者回線を介してインタ
フェースする加入者回線インタフェース部と、前記ブロ
ック交換処理部内部の交換処理を行う前記主制御部によ
って制御される制御部と、前記加入者回線インタフェー
ス部と前記制御部とにインタフェースする交換用インタ
フェース部とを有している。
The wired broadcasting telephone exchange of the present invention includes a plurality of block exchange processing units each performing mutual exchange processing between a plurality of telephones within a predetermined block, and a plurality of block exchange processing units performing mutual exchange processing between the plurality of block exchange processing units. Each of the plurality of block exchange processing units includes a subscriber line interface unit that interfaces with a plurality of telephones in the predetermined block via a subscriber line, and a main control unit inside the block exchange processing unit. It has a control section controlled by the main control section that performs switching processing, and a switching interface section that interfaces with the subscriber line interface section and the control section.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

第1図において、本実施例のデジタル交換機100はそ
れぞれが予め決められたブロック内の複数の加入者端末
群103+ 、1032〜103ゎの交換処理を行う複
数のブロック交換処理部102、〜102ゎと、複数の
ブロック交換処理部1021〜102.相互の交換処理
を行う主制御部(以下MCPUと記す)101とを有し
て楕成し、ブロック交換処理部1021は加入者端末群
1032にインタフェースする加入者回線インタフェー
ス部106aと、加入者端末群1032にインタフェー
スする加入者回線インタフェース部106bと、ブロッ
ク交換処理部102】内部の交換処理を行う制御部(以
下CPUと記す)104と、加入者回線インタフェース
部106aとCPU104とに制御用バス108を介し
てインタフェースする交換用インタフェース部105a
と、加入者回線インタフェース部106bと、CPU1
04とに制御用バス108を介してインタフェースする
交換用インタフェース部105bとを有して構成し、ブ
ロック交換処理部102ゎもブロック交換処理部102
、と同じ構成を有している。
In FIG. 1, a digital exchange 100 according to the present embodiment includes a plurality of block exchange processing units 102, 102, 102, and 102, each of which performs exchange processing on a plurality of subscriber terminal groups 103+, 1032 to 103, within a predetermined block. and a plurality of block exchange processing units 1021-102. The block exchange processing unit 1021 has a main control unit (hereinafter referred to as MCPU) 101 that performs mutual exchange processing, and a subscriber line interface unit 106a that interfaces with the subscriber terminal group 1032, and a subscriber line interface unit 106a that interfaces with the subscriber terminal group 1032. A subscriber line interface unit 106b that interfaces with the group 1032, a block exchange processing unit 102, a control unit (hereinafter referred to as CPU) 104 that performs internal exchange processing, and a control bus 108 between the subscriber line interface unit 106a and the CPU 104. Replacement interface unit 105a that interfaces via
, subscriber line interface section 106b, and CPU1
04 and an exchange interface unit 105b that interfaces with the control bus 108.
, has the same configuration as .

次に、本実施例の動作について説明する。Next, the operation of this embodiment will be explained.

加入者端末群1031および1032内の加入者端末相
互の通話の場合には、ブロック交換処理部1021内の
CPU104にて相互の通話データが処理されるが、例
えば、加入者端末群103ゎ中の1加入者端末と加入者
端末群1031の中の1加入者端末との間の通話は、そ
れぞれのブロック交換処理部102,102.内のcp
uを介してMCPU 101で通話データが処理される
In the case of a call between subscriber terminals in the subscriber terminal groups 1031 and 1032, mutual call data is processed by the CPU 104 in the block exchange processing unit 1021. A call between one subscriber terminal and one subscriber terminal in the subscriber terminal group 1031 is handled by the respective block exchange processing units 102, 102. cp within
Call data is processed by MCPU 101 via u.

即ち、ブロック交換処理部1021〜102.。That is, block exchange processing units 1021 to 102. .

それぞれで分割分散処理を行っている。Divided and distributed processing is performed on each.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、それぞれが予め決められ
たブロック内の複数の電話機相互の交換処理を行う複数
のブロック交換処理部と、複数のブロック交換処理部相
互の交換処理を行う主制御部とを備え、複数のブロック
交換処理部はそれぞれ予め決められたブロック内の電話
機に加入者回線を介してインタフェースする加入者回線
インクフェース部と、ブロック交換処理部内部の交換処
理を行う主制御部によって制御される制御部と、加入者
回線インタフェース部と制御部とにインタフェースする
交換用インタフェース部とを有して、ブロックに分割1
分散して制御することにより、回線容量の拡大が容易で
あり、1つのブロック内の制御部に障害が発生した場合
でも、交換機全体がダウンすることを防止できるという
効果がある。
As described above, the present invention includes a plurality of block exchange processing units each performing mutual exchange processing between a plurality of telephones within a predetermined block, and a main control unit performing mutual exchange processing between the plurality of block exchange processing units. Each of the plurality of block exchange processing units includes a subscriber line ink interface unit that interfaces with a telephone set in a predetermined block via a subscriber line, and a main control unit that performs exchange processing within the block exchange processing unit. a control section controlled by the controller, and a switching interface section that interfaces with the subscriber line interface section and the control section.
Distributed control makes it easy to expand line capacity, and even if a failure occurs in the control unit within one block, it is effective in preventing the entire exchange from going down.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図である。 100・・・デジタル交換機、101・・・主制御部(
MCPU)、1021〜102.−ブロック交換処理部
、100.〜103fi・・・加入者端末群、104 
・・・制御部(CPU)、105a、105b・・・交
換用インタフェース部、106a、106b・・・加入
者回線インタフェース部、107・・・通信用バス、1
08・・・制御用バス。
FIG. 1 is a block diagram showing one embodiment of the present invention. 100...Digital exchange, 101...Main control unit (
MCPU), 1021-102. - block exchange processing unit, 100. ~103fi...Subscriber terminal group, 104
...Control unit (CPU), 105a, 105b...Replacement interface section, 106a, 106b...Subscriber line interface section, 107...Communication bus, 1
08...Control bus.

Claims (1)

【特許請求の範囲】[Claims] それぞれが予め決められたブロック内の複数の電話機相
互の交換処理を行う複数のブロック交換処理部と、前記
複数のブロック交換処理部相互の交換処理を行う主制御
部とを備え、前記複数のブロック交換処理部はそれぞれ
前記予め決められたブロック内の複数の電話機に加入者
回線を介してインタフェースする加入者回線インタフェ
ース部と、前記ブロック交換処理部内部の交換処理を行
う前記主制御部によって制御される制御部と、前記加入
者回線インタフェース部と前記制御部とにインタフェー
スする交換用インタフェース部とを有することを特徴と
する有線放送電話交換機。
a plurality of block exchange processing units each performing mutual exchange processing between a plurality of telephones within a predetermined block; and a main control unit performing mutual exchange processing between the plurality of block exchange processing units; Each switching processing section is controlled by a subscriber line interface section that interfaces with a plurality of telephones in the predetermined block via a subscriber line, and the main control section that performs switching processing within the block switching processing section. 1. A wire broadcasting telephone exchange, comprising: a control section; and an exchange interface section that interfaces with the subscriber line interface section and the control section.
JP23371390A 1990-09-04 1990-09-04 Wired broadcast telephone exchange Pending JPH04113795A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23371390A JPH04113795A (en) 1990-09-04 1990-09-04 Wired broadcast telephone exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23371390A JPH04113795A (en) 1990-09-04 1990-09-04 Wired broadcast telephone exchange

Publications (1)

Publication Number Publication Date
JPH04113795A true JPH04113795A (en) 1992-04-15

Family

ID=16959389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23371390A Pending JPH04113795A (en) 1990-09-04 1990-09-04 Wired broadcast telephone exchange

Country Status (1)

Country Link
JP (1) JPH04113795A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63178770A (en) * 1987-01-14 1988-07-22 Fuji Electric Co Ltd Current limiting system for voltage type pulse width modulation controlling inverter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63178770A (en) * 1987-01-14 1988-07-22 Fuji Electric Co Ltd Current limiting system for voltage type pulse width modulation controlling inverter

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