JPH04113754A - Optional waveform generator - Google Patents

Abstract

PURPOSE:To realize an optional waveform generator with less loss, small size and high performance by using a crystal oscillator so as to supply a digital clock with a stable frequency to a frequency division circuit. CONSTITUTION:The generator consists of a crystal oscillation circuit 1, a frequency divider circuit 2, a digital pulse width modulation signal generating circuit 3, a selection signal generating circuit 4, a selection circuit 5, a switching circuit 6, a transformer 7, an output circuit 8 and an error amplifier circuit 9 outputting error information in a form of digital signal output. A signal with a different pulse width equivalent to a pulse width modulation signal corresponding to an optional waveform is generated and the signal is selectively given to a switch circuit inserted to a primary winding of the transformer thereby varying the on-time of the switch circuit at the primary side of the transformer, resulting in generating a step waveform in response to the optional waveform at the secondary winding. Since the frequency is highly stable, it is not required to match the frequency through the adjustment of circuit constants at the manufacture.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in circuits of arbitrary waveform generators such as ring signal generators and function signal generators of electronic exchanges.

[Prior Art] An example of a conventional circuit is a converter that boosts a DC voltage and converts the DC output of the boosted converter into a sine wave of the frequency of a telephone ringing signal, as described in Japanese Patent Laid-Open No. 178760/1983. It was supposed to have a switch to do so.

[Problems to be Solved by the Invention] The above conventional technology has the following problem because the rectangular wave is shaped into a sine wave by the emitter follower on the secondary side.

1. Since the loss of the emitter follower is large, the cost required for heat generation treatment is large.

2. When outputting a high voltage, a high-power, high-voltage emitter follower transistor is required, which is expensive.

3. The driving amplifier of the emitter follower also requires the same voltage as the output voltage, and a separate power supply is required to generate this voltage, which is difficult to implement in terms of mounting space, efficiency, and cost.

46 Furthermore, especially in cases where frequency accuracy standards are strict, such as in the case of telephone ringing signals, time-consuming measures such as adjusting circuit constants and matching frequencies are required during manufacturing.

The present invention aims to solve the second problem and provide a small, high-performance arbitrary waveform generator with little loss.

[Means for Solving the Problems] An arbitrary waveform generator of the present invention for achieving the above object includes an oscillation element as shown in FIGS. 1(a), (b), and (c), for example. An oscillator circuit, a frequency divider circuit that divides the frequency of the oscillation circuit, and a digital pulse width modulator that generates a plurality of digital signals with different pulse widths corresponding to a pulse width modulation signal corresponding to an arbitrary waveform from the frequency divider circuit. A signal generation circuit, a selection circuit that sends an arbitrary signal from the digital pulse width modulation signal to a switching circuit at each repetition period, a transformer through which current flows intermittently to the primary side by the switching circuit, and the transformer. It is characterized by comprising an output circuit consisting of an output alternating current switch connected to the secondary side of the converter for switching between positive and negative polarity, and a filter.

Alternatively, this arbitrary waveform generator further includes an error amplifier circuit that digitally converts the output signal obtained from the output circuit and outputs the error from the expected value, and feeds the output of the error amplifier circuit to the control circuit of the selection circuit. The invention is characterized by comprising a circuit.

If the above oscillation circuit, frequency dividing circuit, digital pulse width modulation signal generation circuit, selection circuit and its control circuit, and error amplification circuit are integrated into a single chip, the device can be made smaller and have higher performance. It is even more preferable to do so.

Alternatively, it is preferable that the digital pulse width modulation signal generation circuit is provided with a memory element configuration for storing signal waveforms of various pulse widths, since the performance can be further improved.

(Function) The crystal oscillator supplies a digital clock with a stable frequency.This makes it possible to highly stabilize both the operating frequency of the primary side switching circuit of the transformer, as well as the telephone ringing signal frequency and arbitrary waveform frequency. There is no need to adjust constants and match frequencies.

The configuration of the oscillation circuit 1 frequency divider circuit, digital pulse width modulation signal generation circuit, selection circuit and its control circuit of the present invention is as follows:
A signal with different pulse widths corresponding to a pulse width modulation signal corresponding to an arbitrary waveform is generated, and this signal is selectively applied to a switch circuit inserted on the primary side of the transformer. The on-time of the switch circuit is changed, thereby generating a stepped waveform corresponding to an arbitrary waveform on the secondary side. According to this circuit configuration, there is no need to use a switch circuit such as a transistor on the secondary side to convert the DC output into the desired waveform, as is the case with conventional circuits, so the loss in the switch circuit can be significantly reduced. It becomes possible to reduce the

Here, if the switching operation on the primary side of the transformer is performed at high frequency, it is possible to make the output transformer smaller. Further, since the above circuit configuration is digitally controlled, it is easy to integrate this control section, which allows the device to be further miniaturized.

Furthermore, digital control makes it easier to obtain stable output against changes in temperature and input voltage. Further, the feedback circuit that amplifies and feeds back the error described above enables operations such as stabilizing the output and stopping the output in the event of an abnormality.

[Embodiment] FIG. 1(a) shows the basic concept of the embodiment of the present invention in a simple block configuration, which includes a crystal oscillation circuit l, a frequency dividing circuit 2,
It consists of a digital pulse width modulation signal generation circuit 3, a switching circuit 6, a transformer 7, and an output circuit 8.

FIG. 1(b) shows a detailed development of the digital circuit section in FIG. 1(a), including the frequency divider circuit 2-1 and the output control circuit 2.
-2, a timer circuit 2-3, a digital pulse width modulation signal generation circuit 3, a selection signal generation circuit 4, a selection circuit 5, a switching circuit 6 and a monitoring circuit 10.

FIG. 1(c) is a block diagram showing the basic configuration of the embodiment by integrating FIG. 1(a) and FIG. 1(b).

Crystal oscillation circuit 1, frequency dividing circuit 2, digital pulse width modulation signal generation circuit 3, selection signal generation circuit 4, selection circuit 5, switching circuit 6, transformer 7, output circuit 8, and error amplifier circuit that can output error information as a digital signal. 9 or b. Each operation will be explained in detail in the description of the next embodiment.

FIG. 2 is a diagram showing an example in which the present invention is applied to a sine wave generator for telephone ringing signals, and FIG. 3 is a diagram showing operating waveforms of the second library section and their timing.

■ is a crystal oscillation circuit whose oscillation frequency f is 2.6MHz or 5.2MHz, which is the frequency f4 of the telephone ringing signal.
For example, when f4=20Hz, m=18
Then, f becomes -5.2 MHz. 2 is a frequency dividing circuit which generates frequencies f, - and f2-2 necessary for a digital pulse width modulation (DPWM) signal generation circuit, a frequency f5 necessary for a selection circuit, a telephone ringing signal frequency f4, etc. 3-1 is a parallel arrangement of n set-reset (S-R) flip-flops, which are set at each frequency f, - and reset by the output of the shift counter 3-2. The output of this SR flip-flop is a pulse width modulated signal P W M n. Shift counter 3-2
operates in synchronization with the frequency f.

For example, when the telephone ring signal frequency is f4 or 20Hz,
When a 1/4 period is divided into 8 equal parts, each division becomes π/16 when expressed in terms of phase quantity. If the output of the first step of the staircase waveform is set to O1 and the output of the second step is set to 1, then to obtain a sinusoidal staircase waveform, the output of each step is PWMO=O, PWM
1=1, P Vv' M2=2, PWM3=3, PWM
4=4, PWM 5=4, PWM6=5, PWM7
The pulse width may be determined so that =5. f, −, =
If the frequency is 100 kHz, f,1 is 800 kHz, and 3-2 uses an octal shift counter. These 3-
1 and 3-2 correspond to the digital pulse width modulation signal generation circuit in FIG.

4-1 constitutes a selection signal generation circuit together with 4-2;
-1 is an encoder whose inputs are an n-ary up/down counter 4-2 and an A/D converter 9-1. If the output of the A/D converter 9-1 is larger than the expected value, the encoder 4-1 subtracts '1'' from the output of the up-down counter 4-2, and if it is smaller than the expected value, the encoder 4-1 subtracts the output of the up-down counter 42. The operating frequency of the up/down counter 4-2 is, for example, P
When n of W M n is 8, the telephone ringing signal frequency is 2
If it is 0Hz, it becomes 640Hz. The switching frequency f3 of the up-down signal is 40 Hz.

The selection circuit 5-1 selects PW according to the signal from the encoder 4-1.
Operates to select only one arbitrary signal from M1 to n for each signal repetition period, and disables the portion where the output sine wave crosses zero, PWM O = "
0'' is sent. This causes the output AC switch 8-
3 and 8-4 are reliably performed. Reference numeral 5-2 is part of a selection circuit, which is a driver circuit for driving the switching transistor 6 and is provided with an enable terminal EN. When A/D converter 9-2 detects output overvoltage or undervoltage, EN is set to zero level and driver 5-2
is disabled, the switching transistor 6 is turned off, and the output is stopped. Due to the flyback transformer 7, a change in pulse width on the primary side appears as a change in voltage on the secondary side. The voltage on the primary side is V, and the on period of switch 6 is T.
Assuming that the ON and OFF periods are TOFF, the voltage on the secondary side is 1, and the turns ratio of the transformer is n, the relationship between V and V is as follows.

In other words, when V is constant, as the pulse width on the primary side is widened, ■ becomes larger, and a stepped waveform approximating a sine wave can be obtained on the secondary side. 8-1 and 8-2 are output rectifier diodes which block output when the switching transistor 6 is on. 8-3 and 8-4 are alternately switched by an output alternating current switching inverter 8-5 to generate positive and negative alternating current. 8-6 and 8-7 are output voltage dividing resistors, and the small signal divided by these is rectified by a rectifier 8-8, and then converted into a relatively stable DC signal by a smoothing circuit 8-9, and then sent to the A/D. Converter 9-1 and 9-
Serve as input for 2.

FIG. 3 shows signal waveforms at various parts in FIG. 2. (
a) shows the output sine wave and the stepped approximation waveform according to the invention. For example, if the sine wave output is 20Hz, T = 50ms
, f,=20Hz.

(b) shows the switching signal of the m-ary up/down counter, and when the output sine wave is 20Hz, T, = 25ms.
, f3=40Hz. fc) is an output AC switch switching signal. (d) to (k) are P W M O to P
This shows an example of WM7, for example, the repetition frequency is 10.
0k) (using z 5 This makes 1 of the above transformer
By turning on and off the next switch, an output with a stepped approximate waveform as shown in (a) is formed.

FIG. 4 shows an example of the configuration of an arbitrary waveform generation circuit when the digital control circuit section described above is integrated into a single chip. It is possible to select and output signal waveforms with various pulse widths stored in the memory.

[Effects of the Invention] As explained above, the present invention has the following effects.

Since the frequency is highly stable, there is no need to adjust the circuit constants to match the frequency during manufacturing.

In application to a telephone call signal generator, since the output waveform is close to a sine wave, the amount of crosstalk in the subscriber cable is reduced. In addition, when applied to arbitrary waveform generators, the high-frequency switching makes it possible to downsize the output transformer, and since it is digitally controlled, it is easy to integrate the control circuit, making further downsizing possible. be. Finally, because of digital control, it is possible to obtain a stable output against changes in temperature and input voltage.

[Brief explanation of drawings]

FIG. 1(a) is a block diagram showing the basic concept of an embodiment of the present invention, FIG. 1(b) is a detailed expanded view of the digital circuit section of FIG. 1(a), and FIG. 1(C) is a block diagram showing the basic concept of an embodiment of the present invention. FIG. 2 is a block diagram showing the basic configuration of an embodiment. FIG. 2 is a block diagram showing a specific embodiment of the present invention. FIG. 3 shows the operating waveforms and timings of the various parts in FIG. 2. FIG. 4 shows the basic configuration when the control circuit section is integrated into a one-chip circuit. Explanation of symbols 1...Crystal oscillation circuit 2...Frequency divider circuit 3...Digital pulse width modulation signal generation circuit 4...
Selection signal generation circuit 5...Selection circuit 6...Switching circuit 7...Transformer 8...Output circuit 9...Error amplification circuit 10...Monitoring circuit 11...Integrated circuit

Claims (1)

[Claims] 1. An oscillation circuit including an oscillation element, a frequency division circuit that divides the frequency of the oscillation circuit, and a pulse width modulation signal corresponding to an arbitrary waveform from the frequency division circuit. A digital pulse width modulation signal generation circuit that generates a plurality of different digital signals, a selection circuit that sends an arbitrary signal from among the digital pulse width modulation signals to a switching circuit at each repetition period, and a primary side A transformer through which current flows intermittently, and two of the transformers.
An arbitrary waveform generator characterized by comprising an output circuit connected to the next side and consisting of an output AC switch for switching between positive and negative polarities and a filter. 2. The arbitrary waveform generator according to claim 1, further comprising: an error amplification circuit that digitally converts the output signal obtained from the output circuit and outputs an error from an expected value; and an output of the error amplification circuit that is connected to the selection circuit. An arbitrary waveform generator comprising: a circuit that feeds back to a control circuit of the apparatus. 3. The oscillation circuit, the frequency dividing circuit, the digital pulse width modulation signal generation circuit, the selection circuit and its control circuit,
3. The arbitrary waveform generator according to claim 2, wherein the arbitrary waveform generator is integrated into a single chip including an error amplification circuit. 4. The arbitrary waveform generator according to any one of claims 1 to 3, wherein the digital pulse width modulation signal generation circuit includes a storage element configuration for storing signal waveforms of various pulse widths.