JPH04112270A - Bisecting decision graph simplifying method - Google Patents

Abstract

PURPOSE:To further reduce a bisecting decision graph by deciding a temporary variable order for the bisecting decision graph, finding the further improved variable order, and searching the bisecting decision graph according to this variable order. CONSTITUTION:The initial value of the variable order is obtained by a heuristic method, and the bisecting decision is prepared according to this variable order. Next, when the variables adjacent to this bisecting decision graph are successively exchanged, and the exchanged result is more satisfactory than the bisecting decision graph before the variables are exchanged (that is, the bisecting decision graph is reduced), the exchanging operation is repeated until the exchanged result is not improved any more. Thus, the satisfactory variable order can be obtained and the size of the bisecting decision graph can be reduced.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for simplifying a binary decision graph, which is one of the means of expressing logical functions in a computer, and relates to a method for simplifying a binary decision graph. The aim is to further reduce the binary decision graph by obtaining a better ordering of variables. By repeating changes in the variable order while applying the process to the binary decision graph, a binary decision graph with a better variable order is generated.

[Industrial application field]

The present invention relates to a method for simplifying a binary decision graph, which is one means of expressing logical functions in a computer.

Efficiently representing logic functions on a computer is extremely important in the application of various logic design support techniques, such as logic verification, logic verification, logic circuit simplification, and test generation. In addition, logic verification and logic circuit simplification in particular are central to logic design support technology.

(Conventional technology) Truth tables, sum-of-products formulas, binary decision graphs, etc. have been developed as methods for expressing logical functions on computers. Given an order, we can express the largest logical function.

A binary decision graph is a decision tree that shares a subgraph by fixing the order of variables for case classification in all paths (originally it is a tree, but by sharing it becomes a graph)
A method for expressing logical functions that allows logical functions to be expressed compactly and in normal form (that is, if the original logic is the same, the result of converting to a binary decision graph will be isomorphic). It is.

An example of a binary decision graph is shown in FIG. In the following, all variables are expressed as a single lowercase letter followed by a number.
"&" is used as a product symbol, "+" is used as a sum symbol, and "~" is added in front of the term to be negated for negation. Then, the binary decision graph in Fig. 10 is the logical function xl&x
It represents 20 to X3. Note that the ○ nodes in the diagram correspond to each variable, and the variable inside the ○ (for example, xi for ■) is 0.
In the case of , the engine with the symbol 0 is traced, and in the case of 1, the engine with the symbol 1 is traced. In that case, if we arrive at ■, the logical function becomes 1, and if we arrive at times, the logical function becomes 0.
becomes. Since the order of variables for case classification is fixed for each pass, graphs can be shared, and as a result, logical functions can be expressed compactly. For example, in FIG. 10, the node for variable x3 is pointed to by two engines and is shared.

[Problem to be solved by the invention] Binary decision graphs have the advantage of being able to express practical logical functions compactly9, but on the other hand, the size of the graph changes greatly depending on the order of variables used for case classification. There's a problem. For example, as shown in Figure 11, even with the same logic, depending on the order of the variables, it may be possible to express it compactly as shown in Figure 11 (a), but the variables can become extremely large as shown in Figure 11 (b). There is also an order. Therefore, it is important to use a good variable order, but it is known that the problem of determining the optimal variable order belongs to an NP-complete problem. A method has also been developed to determine a relatively good order of variables from the structure of a zero circuit that requires determining There are cases. In particular, when applying binary decision graphs to logic matching and simplification of logic circuits,
The quality of variable order greatly affects performance.

An object of the present invention is to obtain a better variable ordering of the binary decision graph, thereby making it possible to further reduce the size of the binary decision graph.

[Means to solve the problem]

FIG. 1 shows the process flow of the present invention.

In the present invention, a binary decision graph is created with an appropriate order of variables, and the variable order is improved while manipulating the resulting binary decision graph, thereby obtaining a better variable order. We provide a method that allows you to do this. That is, the first
As shown in the figure, first, based on the structure of a given logical function, etc., a temporary variable order for a binary decision graph is determined once using a heuristic method or the like (step Sl). continue,
According to this order of variables, the initial values of the binary decision graph are obtained (
step Sz). Then, from the shape of this binary decision graph, determine how best to change the order of variables,
The variable order is improved accordingly, the shape of the binary decision graph is changed, and a binary decision graph that follows the new variable order is obtained. By repeating this operation a necessary number of times, a further improved variable order is found, and a binary decision graph according to this variable order is obtained, thereby reducing the size of the binary decision graph (step S3).

The method for simplifying binary decision graphs described above can be used to create binary decision graphs when performing logic matching or simplifying logic circuits by using binary decision graphs to express logical functions. is also possible.

[For production]

When determining the order of variables using only heuristic methods as in the past, as shown in Figure 11, there are cases in which a fairly good order of variables is obtained, but conversely, there are cases in which a very poor order of variables is obtained. In some cases, it may be. In that respect, the improvement according to the invention always makes it possible to obtain a better variable order and reduce the size of the binary decision graph.

From this, logic matching, logic circuit simplification, test generation, etc. using a binary decision graph to represent a logical function can be processed faster by the reduction in the size of the Habo graph. Also, as the thickness of the graph decreases, larger circuits can be handled.

(Examples) Examples of the present invention will be described below with reference to the drawings.

First, as an embodiment of the present invention, a case where the order of variables is improved by exchanging adjacent variables will be described below.

First, using the initial values of the variable order obtained by a heuristic method, a binary decision graph is created according to this variable order. Next, by sequentially exchanging adjacent variables in this binary decision graph, if the exchange result is better than before the exchange (that is, if the binary decision graph becomes smaller), then the exchange is actually performed. Repeat this operation until there is no further improvement.

Here, in order to exchange adjacent variables as described above, for example, the following method is used.

If we now exchange the i-th and i+1-th variables in the binary decision graph, the shape of the graph is changed as shown in FIG. 2, depending on the current shape of the binary decision graph. In other words, trace the binary decision graph from the root node (the first node that becomes the root), and when you first arrive at the i-th or i+1-th variable node, follow the way the i-th and i+1-th variable nodes are connected. , the connections are changed in each case, as shown in FIGS. 2(a) to 2(d). For example, Figure 3 (
If we apply the rules in Figure 2 above and exchange the i-th and i+1-th variables to the binary decision graph shown in a), we get the third
The binary decision graph shown in Figure 1) is obtained. By sequentially applying the above-described variable exchange according to the procedure shown in FIG. 4, for example, improvements can be made iteratively.

Therefore, when this embodiment is applied to an actual circuit, the improvement in the order of variables as described above always improves the order of 10% to 50%.
The size of the binary decision graph can be reduced by about %.

In the above embodiment, adjacent i-th and i+1-th variables are exchanged, but in general, variables may be exchanged. However, if adjacent variables are swapped, the second
It has the advantage of being easy to calculate because you only have to look at and operate on one part. On the other hand, when exchanging variables in two locations far from each other, there is a hassle of having to look at and manipulate all the variables that exist between the two variables, but on the other hand, the result is This has the advantage that there is a high possibility of obtaining a good variable order.

Moreover, it is also possible to exchange not only two variables but three or more variables with each other.

Next, we will use the method to simplify the binary decision graph as described above.
Regarding an example of application to logical matching problems, the fifth
This will be explained using FIG. 6 and FIG.

As shown in Fig. 5, the logic comparison problem is to compare the respective outputs OUT,, OUT, of two combinational circuits C+ and Cz with the same input IN, and to solve the logic of two combinational circuits C+ and Cz. This is a problem of checking whether or not the two match, and is the core of logic design support technology.

Logical matching methods using binary decision graphs have been developed in the past, but as shown in Figure 6(a), variables are determined first (step S++) and these variables are changed later. Step 312, Sl: l) Create a binary decision graph for the two circuits C3 and C2 without
, a logical comparison was performed based on these (step 51
4). In this regard, in this embodiment, as shown in FIG. 6(b), after creating a binary decision graph for the circuit c1 in the same way as in the conventional case (Step 7, S21, S2□), The variables are improved by the simplification method (step 523), a binary decision graph of circuit C2 is created using the variables obtained as a result (step 5z-), and logic verification is performed based on these (step 525). ).

Therefore, according to the logic matching method of this embodiment, when creating a binary decision graph for circuit C2, the speed can be increased by the improved variables, and as a result, the overall processing speed can be increased. I can do it.

Next, we will discuss how to apply the above-mentioned binary decision graph simplification method to a logic circuit simplification method that simplifies a circuit by expressing don't cares arising from the circuit structure using a binary decision graph. An example will be described using FIGS. 7 and 8.

For example, in the circuit shown in FIG. 7(a), if the values of the two inputs v1 and F2 are 1.0 and 1.1, the don't care that arises from the circuit structure is In the figure, Fl,
F2, F3, F4 are net v1, F2, F3, respectively.
This is a case in which the logical function F4 of the output v4 does not change no matter how the value of the logical function F3 of the net v3 is determined, as shown in (showing the value of the logical function for F4). In this way, circuit conversion and redundancy removal can be performed by utilizing the property that the output logic does not change even if the logic of the net in the circuit is changed appropriately based on the circuit structure. At this time, the set of logic functions allowed for the net without changing the output logic is called the allowable function of the net 7). For example, in the circuit of FIG. 7(a), the tolerance function PF3 of F3 can be expressed as [00**] (note that *
indicates don't care). By using this tolerance function, logical functions can be efficiently simplified.

A method for simplifying logic circuits that uses binary decision graphs to represent admissible functions has long been known, but in this method,
As shown in FIG. 8(a), the variables of the binary decision graph are first determined (step 531), and the logical function is expressed in the binary decision graph according to these variables (step 5).
32) After that, without changing the variables, a tolerable function is expressed using a binary decision graph from this logic function (step 533), and this tolerable function is used to simplify the circuit (step 534). ). In this regard, in this embodiment, as shown in FIG. 8, etc., the variables used in the binary decision graph are improved during the process. That is,
After expressing the logical function as a binary decision graph as in the past (step Sa+, 542), the variables are improved using the simplification method of the above embodiment (step 543), and a binary decision made from the variables is created. A tolerance function is calculated from the logical function expressed in the graph (step 544), and the circuit is simplified using this tolerance function (step 545).

Therefore, according to the logic circuit simplification method of this embodiment, when calculating the tolerance function and removing redundancy thereafter, it is possible to speed up the process by the improved variables, and as a result, can speed up the overall processing speed.

Note that the variables may be further improved after calculating the tolerance function.

The present invention is applicable not only to ordinary binary decision graphs as shown in FIGS. 9(a) and 9(b), but also to Even for extended binary decision graphs, such as a shared binary decision graph with a structure that shares each graph of The same can be applied.

〔Effect of the invention〕

According to the method for simplifying a binary decision graph of the present invention, the size of a binary decision graph can always be reduced by improving the variables.

Furthermore, by applying this simplification method to logic matching using binary decision graphs and simplification of logic circuits, it is possible to significantly reduce the processing time, and it is also possible to handle larger circuits. It becomes possible.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing the process flow in the method for simplifying binary decision graphs of the present invention, and FIGS. 2(a) to (d)
) is a diagram showing the rules for exchanging adjacent variables in one embodiment of the method for simplifying binary decision graphs of the present invention. Figures 3(a) and (b) are diagrams before applying the rules in Figure 2. Figure 4 is a diagram showing an example of the application order when exchanging adjacent variables, Figure 5 is a diagram showing a logical matching problem, Figure 6 is a diagram showing a binary decision graph after applying a) and (b) are flowcharts showing the respective processing flows in a conventional logical matching method and an embodiment of the logical matching method of the present invention, and FIGS. 7(a) and (b) are for explaining the tolerance function. Figures 8(a) and 8(b) show an example of the circuit and the allowable functions in each net of this circuit. Flowcharts showing the flow of each process, Figures 9(a) to (
d) is a diagram showing various binary decision graphs to which the present invention can be applied, FIG. 10 is a diagram showing an example of a binary decision graph, and FIG.
Figures a) and (b) are diagrams showing binary decision graphs created according to the optimal variable order and the worst variable order, respectively.

Claims (1)

[Claims] 1) A binary decision graph is generated once from a given logical function, and then the order of variables is repeatedly changed while performing necessary operations on the binary decision graph. 2 characterized in that it generates a binary decision graph for the order of variables.
How to simplify minute decision graphs. 2) Logic characterized in that when performing logic matching using a binary decision graph to represent a logical function, the binary decision graph is generated by the method for simplifying a binary decision graph according to claim 1. Matching method. 3) When simplifying a logic circuit by using a binary decision graph to represent a logical function, the binary decision graph is generated by the method for simplifying a binary decision graph according to claim 1. A method for simplifying logic circuits.