JPH0410659B2 - - Google Patents
Info
- Publication number
- JPH0410659B2 JPH0410659B2 JP59272877A JP27287784A JPH0410659B2 JP H0410659 B2 JPH0410659 B2 JP H0410659B2 JP 59272877 A JP59272877 A JP 59272877A JP 27287784 A JP27287784 A JP 27287784A JP H0410659 B2 JPH0410659 B2 JP H0410659B2
- Authority
- JP
- Japan
- Prior art keywords
- channel
- device control
- control
- interface
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000012544 monitoring process Methods 0.000 claims 3
- 230000000694 effects Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、Ｉ／Ｏデバイスを制御する制御装置
に係り、特に、制御装置がBUSY状態の時の交
代アクセス経路を自動的に選択し、上位チヤネル
装置が交代経路を選択する為に必要な時間を削減
するのに好適なＩ／Ｏデバイス制御装置に関す
る。Detailed Description of the Invention [Field of Application of the Invention] The present invention relates to a control device that controls I/O devices, and in particular, the present invention automatically selects an alternate access route when the control device is in a BUSY state, and The present invention relates to an I/O device control device suitable for reducing the time required for a channel device to select an alternate route.
従来の装置は、一箇体内に２台の制御部を設け
二重化しているが、その目的は、Ｉ／Ｏデバイス
に対する交代制御経路の確保にあり、その切り替
えは、上位装置であるチヤネル、またはオペレー
テイングシステムからでなければ実行できなかつ
た。したがつて装置BUSYによる交代経路選択
の為の上位装置のオーバヘツドに対する配慮がな
されていなかつた。なおこの種の装置として関連
するものには特開昭59−79330号公報がある。
Conventional equipment has two control units in one unit for duplication, but the purpose of this is to secure an alternate control path for I/O devices, and switching between them is performed by a channel or a channel in a higher-level device. It could only be executed from the operating system. Therefore, no consideration was given to the overhead of the host device for selecting an alternate route due to device BUSY. A related device of this type is JP-A-59-79330.
本発明の目的は、チヤネル装置が、Ｉ／Ｏデバ
イスをアクセスするとき、Ｉ／Ｏデバイス制御装
置が使用中でアクセス経路が使用できない場合
に、チヤネル装置または、オペレーテイング・シ
ステムが交代アクセス経路を選択する時間を削減
する為の、Ｉ／Ｏデバイス制御装置による交代ア
クセス経路自動選択機能を提供することにある。
An object of the present invention is to enable a channel device or an operating system to use an alternate access path when an I/O device control device is in use and an access path cannot be used when a channel device accesses an I/O device. An object of the present invention is to provide an alternate access route automatic selection function by an I/O device control device in order to reduce selection time.
従来、チヤネル装置が、Ｉ／Ｏデバイスを選択
し、Ｉ／Ｏ動作を行なう場合に、Ｉ／Ｏデバイス
制御装置が使用中のときは、Ｉ／Ｏデバイス制御
装置は、チヤネルに対してBUSY状態であるこ
とを報告し、その結果、オペレーテイングシステ
ム、または、チヤネル装置が交代パスを選択して
いたため、交代パス選択の為のオーバヘツドがあ
つた。一方、デイスク制御装置においては、従来
から一箇体内に２台の制御部が格納されていて、
一方が使用中の場合でも、他方が、動作可能な場
合が考えられる。したがつて、BUSY状態の場
合に、使用中の制御部に対するアクセスを動作可
能な他方の制御部へ切替えれば、Ｉ／Ｏ動作が可
能である。すなわち、上位チヤネル装置とチヤン
ネルタフエース部の間にインターフエース信号を
他Ｉ／Ｏデバイス制御部へ切替えるインタフエー
ス信号切替部を設け、任意のデバイス制御部の動
作状態によつて、当該Ｉ／Ｏ制御部がチヤンネル
インタフエース信号を他の任意のＩ／Ｏデバイス
制御部へ切替え、Ｉ／Ｏ制御を他の任意のＩ／Ｏ
デバイス制御部に代行させる機能を設けたことを
特徴とするものである。
Conventionally, when a channel device selects an I/O device and performs an I/O operation, if the I/O device control device is in use, the I/O device control device sends a BUSY state to the channel. As a result, the operating system or channel device selected an alternate path, so there was overhead for selecting an alternate path. On the other hand, in disk control devices, two control units have traditionally been housed in one unit.
Even if one is in use, the other may be operational. Therefore, in the case of the BUSY state, I/O operations can be performed by switching access to the control unit in use to the other operable control unit. That is, an interface signal switching section for switching the interface signal to another I/O device control section is provided between the upper channel device and the channel toughace section, and depending on the operating state of any device control section, the interface signal switching section switches the interface signal to the other I/O device control section. The control unit switches the channel interface signal to any other I/O device control unit, and transfers the I/O control to any other I/O device.
The device is characterized by having a function that the device control section performs on behalf of the device control section.
以下、本発明の一実施例を第１図により説明す
る。チヤネルインタフエース信号を切替えるセレ
クタ部３とチヤネルインタフエースの接続切離し
を制御するチヤネルスイツチ部４とＩ／Ｏデバイ
スインタフエース部８とＩ／Ｏデバイスを制御す
る転送制御部１３と、Ｉ／Ｏ制御部のBUSY状
態およびマシンチエツクによる動作不能状態を表
示するBUSY表示部７と、それを監視し、Ｉ／
Ｏ動作のルート制御を行なうルート制御部５より
成るＩ／Ｏ制御部が、一つの箇体内に２台（Ｉ／
Ｏ制御部２，６）格納され、それぞれ独立に動作
可能であるＩ／Ｏ制御装置１において、チヤネル
インタフエースルートＡ１０からの起動に対し
て、Ｉ／Ｏ制御部２がBUSY状態で、起動の受
領が不能な場合、Ｉ／Ｏ制御部２のルート制御部
がＩ／Ｏ制御部６のBUSY状態をモニタし、
Ｉ／Ｏ制御部６がBUSYまたは、マシンチエツ
クによる動作不能状態でなければ、ルート制御信
号１４によつてルート切替えをチヤネルスイツチ
部に指示し、チヤネルスイツチ部は、切替信号９
によつて、チヤネルインタフエース、ルートＡ
と、Ｉ／Ｏ制御部６のインタフエース線１１が接
続され、それと同時にチヤネルインタフエース、
ルートＡ１０とＩ／Ｏ制御部２のインタフエース
線１５は切離されてチヤネルインタフエース、ル
ートＣ１６に接続される。以降、チヤネルインタ
フエースルートＡからのアクセスはＩ／Ｏ制御部
６側で処理される。Ｉ／Ｏ制御部２および６の両
側ともBUSY状態のときは、ルートの切替えは
行なわず、そのまま上位チヤネル装置に対し、
BUSY状態を報告する。本実施例によれば、
Ｉ／Ｏ制御装置が、BUSY状態のとき、BUSY
を上位チヤネル装置へ報告し、チヤネル装置、あ
るいは、オペレーレーテイングシステムが、交代
アクセス経路を選択して、再起動をかけるという
一連の動作が不要となるため、再選択および起動
の為のオーバヘツドの削減の効果があり、システ
ムの動作効率を向上させる効果がある。
An embodiment of the present invention will be described below with reference to FIG. A selector unit 3 that switches channel interface signals, a channel switch unit 4 that controls connection and disconnection of channel interfaces, an I/O device interface unit 8, a transfer control unit 13 that controls I/O devices, and I/O control. The BUSY display section 7 displays the BUSY state of the unit and the inoperable state due to machine check, and the BUSY display section 7 displays the BUSY state of the
There are two I/O control units (I/O control units) in one unit, each consisting of a route control unit 5 that performs route control of O operations.
O control units 2 and 6) In the I/O control device 1, which is stored and can operate independently, the I/O control unit 2 is in the BUSY state and the startup is in the BUSY state in response to startup from the channel interface route A10. If reception is not possible, the route control unit of the I/O control unit 2 monitors the BUSY state of the I/O control unit 6,
If the I/O control unit 6 is not in a BUSY or inoperable state due to a machine check, the route control signal 14 instructs the channel switch unit to switch the route, and the channel switch unit receives the switching signal 9.
By Channel Interface, Route A
and the interface line 11 of the I/O control section 6 are connected, and at the same time, the channel interface,
The route A10 and the interface line 15 of the I/O control unit 2 are separated and connected to a channel interface, route C16. Thereafter, accesses from channel interface route A are processed on the I/O control unit 6 side. When both I/O control units 2 and 6 are in the BUSY state, the route is not switched and the data is sent directly to the upper channel device.
Reports BUSY status. According to this embodiment,
When the I/O control device is in the BUSY state, BUSY
This eliminates the need for a series of operations in which the channel device or operating system selects an alternate access route and restarts the access route, reducing overhead for reselection and startup. This has the effect of improving the operating efficiency of the system.
本発明によれば、Ｉ／Ｏデバイスアクセスの際
に、Ｉ／Ｏデバイス制御装置が使用中である場合
のチヤネル装置、またはオペレーテイングシステ
ムによる交代アクセス経路の選択時間と、再起動
に要するインタフエース動作を削減できるので、
システムスループツト向上の効果がある。
According to the present invention, when an I/O device is accessed, the channel device or the operating system selects an alternate access route when the I/O device control device is in use, and the interface required for restarting. Because it can reduce the amount of movement,
This has the effect of improving system throughput.
第１図は本発明の一実施例のＩ／Ｏデバイス制
御装置のブロツク図である。
１…Ｉ／Ｏデバイス制御装置、３…インタフエ
ース信号切替部、４…チヤネルスイツチ、５…ル
ート制御部、９…ルート切替信号、１１，１５…
インタフエース線、１３…Ｉ／Ｏ制御部、１４…
ルート制御信号。
FIG. 1 is a block diagram of an I/O device control apparatus according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...I/O device control device, 3...Interface signal switching unit, 4...Channel switch, 5...Route control unit, 9...Route switching signal, 11, 15...
Interface line, 13... I/O control unit, 14...
Route control signal.
Claims (1)
の入出力を制御するチヤネルインタフエース部
と、Ｉ／Ｏ動作制御部とＩ／Ｏデバイスインタフ
エース部を含み上記チヤネルインタフエース部と
対応して設けられたＩ／Ｏデバイス制御部を、筐
体内に複数台格納し、それぞれのＩ／Ｏデバイス
制御部が独立に動作可能としたＩ／Ｏデバイス制
御装置において、 上記Ｉ／Ｏデバイス制御装置内に、それぞれの
Ｉ／Ｏデバイス制御部の動作状況を監視する監視
手段と、 上記チヤネルインタフエース部と上記Ｉ／Ｏデ
バイス制御部との間に、上記監視手段の出力によ
つて上位チヤネル装置から割り当てられたＩ／Ｏ
デバイス制御部へのインタフエース信号を、他の
Ｉ／Ｏデバイス制御部へ切換えて出力するインタ
フエース信号切換部と、を設けたことを特徴とす
るＩ／Ｏデバイス制御装置。[Scope of Claims] 1. A channel interface section that controls the input/output of interface signals from a higher-level channel device, and includes an I/O operation control section and an I/O device interface section, and corresponds to the above channel interface section. In the I/O device control device, in which a plurality of I/O device control units provided as the above are housed in a housing, and each I/O device control unit can operate independently, the above-mentioned I/O device control A monitoring means for monitoring the operating status of each I/O device control section is provided in the apparatus, and a superordinate channel is provided between the channel interface section and the I/O device control section by the output of the monitoring means. I/O allocated from the device
An I/O device control device comprising: an interface signal switching unit that switches and outputs an interface signal to a device control unit to another I/O device control unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27287784A JPS61151764A (en) | 1984-12-26 | 1984-12-26 | I/o device control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27287784A JPS61151764A (en) | 1984-12-26 | 1984-12-26 | I/o device control device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61151764A JPS61151764A (en) | 1986-07-10 |
| JPH0410659B2 true JPH0410659B2 (en) | 1992-02-26 |
Family
ID=17520005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27287784A Granted JPS61151764A (en) | 1984-12-26 | 1984-12-26 | I/o device control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61151764A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59111516A (en) * | 1982-12-17 | 1984-06-27 | Fujitsu Ltd | Interface switching system |
-
1984
- 1984-12-26 JP JP27287784A patent/JPS61151764A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59111516A (en) * | 1982-12-17 | 1984-06-27 | Fujitsu Ltd | Interface switching system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61151764A (en) | 1986-07-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2567922B2 (en) | Path control method | |
| JPH0410659B2 (en) | ||
| JPH0264845A (en) | Electronic computer multiplexing main control part | |
| JPS6343558Y2 (en) | ||
| JPH056816B2 (en) | ||
| JPH05204873A (en) | Inter-processor communication processing method in distributed processing system | |
| JPH064310A (en) | System for switching plural operating system | |
| JPH03139050A (en) | Communication controller | |
| JPS6232795A (en) | Exchange of multiprocessor system | |
| JPH0563802A (en) | Duplicate equipment for exchange | |
| JPH06149728A (en) | I/o bus extension device and its control method | |
| JPH03201150A (en) | Data communication equipment | |
| JPS59200352A (en) | System switching controller | |
| JPS63141429A (en) | Packet multiplexer | |
| JPH03116350A (en) | Bus structure for data transfer | |
| JPS63187743A (en) | Line switching equipment | |
| JPH057211A (en) | Loop system lan system | |
| JPS63143639A (en) | System monitoring device | |
| JPS60156161A (en) | Console connecting system of system having plural central processing unit | |
| JPH04230568A (en) | Method for operating operating system | |
| JPS61262939A (en) | Switching control system for system supervisory equipment | |
| JPS60114902A (en) | Controller | |
| JPH0420199A (en) | Monitor controller | |
| JPS6043951A (en) | Informing method of changeover to spare set | |
| JPS63146636A (en) | Automatic switching control system for data network |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |