JPH04105557A - Converter - Google Patents

Abstract

PURPOSE:To reduce the ripples in the primary current and the secondary current by controlling switching elements with the phases different from each other, while maintaining specified pause time, in the same primary transformers, and controlling them with the different phases so that they may complement each pause time, between the different primary transformers. CONSTITUTION:First and second transistors 8 and 9, which correspond to each input part 3a and 3b of the first primary transformer 3, are supplied with control signals IB1 and IB2 whose phases are different by approximately 180 deg. while maintaining dead times in front and in rear. Third and fourth transistors 10 and 11, which correspond to each input part 4a and 4b of a second primary transformer 4, are also supplied with the control signals IB3 and IB4 in the same relation. To the control signal IB1, the control signal IB3 is different in phase by about 90 deg. so that it may complement each dead time. Similarly, to the control signal IB2, the control signal IB4 is different in phase by about 90 deg. so as to complement it.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a converter, and more specifically, a DC converter that converts a DC current of a predetermined voltage into a DC current while boosting or stepping down the voltage.
- It is related to a DC converter.

[Prior Art] Conventionally, a converter (DC-DC converter) converts a DC current of a predetermined voltage into a DC current while boosting or stepping down the voltage.
For example, a technique as shown in FIG. 9 is known.

That is, this converter includes a primary side transformer 61, and the transformer 61 has a first input section 61a and a second input section 61.
It is divided into two parts b. A DC power supply 62 and a capacitor 63 are connected in parallel to each input section 61a, 61b. Further, a first switching element 64 and a second switching element 65 whose switching is controlled in mutually different phases are connected to each input section 61a, 61b, respectively. On the other hand, the secondary transformer 66 is set to have a predetermined winding ratio with respect to the primary transformer 61.
It is connected to a bridge type rectifier circuit 67 consisting of a diode. Both output terminals 68a, 68b of this rectifier circuit 67
A filter circuit 71 consisting of a coil 69 and a capacitor 70 is provided between them.

In order to operate the converter configured as described above, each switching element 64 .
65 are alternately switched in different phases to alternately supply currents II and I2 to each input section 61a and 61b. That is, as shown in the time chart in FIG. 10, the current II.

Flow I2 alternately. As a result, a direct current alternately flows through the primary transformer 61, and a secondary current whose voltage is stepped up or down depending on the winding ratio flows through the secondary transformer 66. or,
After the secondary current is rectified by a rectifier circuit 67, it is output as a direct current from output terminals 68a and 68b.

[Problems to be Solved by the Invention] However, in the conventional example, the primary side transformer 61
It was necessary to provide an unavoidable dead time D between the currents 11 and 12 supplied alternately to prevent short-circuit currents. That is, each switching element 64.
When controlling the switching of 65, it was necessary to provide a dead time D. Therefore, due to this dead time D, the current from the DC power supply 62 is interrupted, and the primary side transformer 6
This causes a primary current ripple in the transformer 1 and, by extension, a secondary current ripple in the secondary transformer 66. Further, the ripple component is a problem in terms of noise, and in order to prevent noise, the capacitance of the capacitor 63 must be increased, especially on the primary side, resulting in a problem that the overall size becomes larger. Furthermore, if the capacitor 63 is omitted, there is a risk that a surge voltage will be generated in each switching element 64, 65 due to the inductance in the primary wiring, resulting in destruction. Therefore, the capacitor 63 could not be omitted.

This invention was made in view of the above-mentioned circumstances, and its purpose is to reduce the ripple component in the negative current and the ripple component in the secondary current, and to omit the capacitor on the primary side. It is an object of the present invention to provide a converter whose size can be reduced by reducing the size of the converter.

"Means for Solving the Problems" In order to achieve the above object, the present invention comprises a first input section and a second input section divided into two, and a plurality of input sections provided in parallel with each other. They are provided in the primary transformer and each input part of each primary transformer, and in the same primary transformer, switching is controlled in different phases while maintaining a predetermined rest time in between, and between different primary transformers, A switching element whose switching is controlled in different phases to complement each rest time, a DC power supply connected in parallel to each input section of each primary transformer, and a secondary transformer provided corresponding to each primary transformer. It includes a secondary transformer and a rectifier circuit provided in each secondary transformer.

[Function] According to the above configuration, in the same primary transformer, the switching elements are controlled to switch in different phases while maintaining a predetermined rest time between them, and between different primary transformers, the switching elements are controlled in different phases. By performing switching control in different phases so as to complement each pause time, the current of the DC power supply is supplied to the input section of one of the primary transformers at each time point. As a result, the current supplied to each primary transformer becomes a direct current as a whole, and becomes a primary current without any ripple component. As a result, the boosted or stepped down secondary current appearing in each secondary transformer becomes a DC current without any ripple component as a whole.

Furthermore, since there is no ripple component in the primary current supplied to each primary transformer as a whole, it is possible to omit a surge voltage prevention capacitor on the primary side or to reduce its capacity.

[First Embodiment] Hereinafter, a first embodiment in which the present invention is embodied in a converter to be mounted on a vehicle will be described in detail based on the drawings.

FIG. 1 is an electrical circuit diagram showing a converter 1 and its control circuit 2 in this embodiment.

Converter 1 includes a first primary transformer 3 and a second primary transformer 4. The first primary transformer 3 has a first input section 3a and a second input section 3b divided into two parts.
Similarly, the second primary transformer 4 includes a first input section 4a and a second input section 4b, which are divided into two parts. Each input section 3a, 3b, 4a, 4b is connected in parallel to the DC power supply 5 and coil 6, which are connected in series, and is also connected in parallel to a capacitor 7 for preventing surge voltage. In addition, each input section 3a, 3b of the first primary transformer 3 has a predetermined down time (dead time).
A first transistor 8 as a switching element whose switching is controlled in mutually different phases while maintaining the
and a second transistor 9 are connected in series. Similarly, each input section 4a of the second primary transformer 4
.

4b, a third transistor 10 and a fourth transistor 11 are connected in series, respectively, as switching elements whose switching is controlled in different phases while keeping a predetermined dead time between them.

The first primary transformer 3 includes a first secondary transformer 1 which is set to have a predetermined winding ratio with respect to the transformer 3.
2 is provided. Further, the second primary transformer 4 is provided with a second secondary transformer 13 set to have a predetermined winding ratio with respect to the transformer 4 . In this embodiment, the winding ratios of the primary transformers 3 and 4 are set so that the respective secondary transformers 12 and 13 step up the voltage. Moreover, each secondary side transformer 12.
13 is a bridge rectifier circuit consisting of diodes 14.1
5 are connected to each other. These rectifier circuits 14.
The output side of 15 is connected to both output terminals 16a and 16b, respectively. Further, a filter circuit 19 consisting of a coil 17 and a capacitor 18 is provided between the output terminals 16a and 16b.

Next, a control circuit 2 for controlling switching of each transistor 8 to 11 of the converter 1 configured as described above.
I will explain about it.

The control circuit 2 includes an oscillator 31 that outputs a continuous pulse signal VO, a counter 32 that counts the pulse signal vO from the oscillator 31, and eight output signals Vl, V2 . V3. V4. V5
．． V6. A decoder 33 that sequentially outputs V7°v8, and a total of four OR circuits 34°35.
36 and 37.

Each OR circuit 34-37 is connected to the base of each transistor 8-11 of converter 1, respectively. The first OR circuit 34 receives output signals Vl, V2 . V3, and the second OR circuit 35 receives the output signal V5. V6. V7 is input respectively.

Further, the third OR circuit 36 receives output signals V3°V4. V
5, and the fourth OR circuit 37 receives the output signal V7. V8.
Vl is input respectively. And each output signal Vl-
Based on the input of 7V8, from each OR circuit 34 to 37,
A control signal (base current) IBI to the base of each transistor 8-11.

IB2. IB3. IB4 is supplied. Therefore, the switching of each transistor 8-11 is controlled by supplying the control signals IBI-IB4.

Next, the operation of the converter 1 and its control circuit 2 configured as described above will be explained with reference to the time chart of FIG. 2.

In the control circuit 2, the pulse signal vO from the oscillator 31
are sequentially counted by the counter 32, and output signals V1 to V8 are sequentially outputted from the decoder 33 according to the counting timing. Furthermore, based on the input of these output signals V1 to V8, each OR circuit 34 to 37 outputs a control signal IBI to IB4 to each transistor 8 to 11 of converter l.

Here, each input section 3a, 3b of the first primary side transformer 3
The first and second transistors 8 and 9 corresponding to the control signal IBI have a phase difference of approximately 180 degrees while maintaining the dead time D before and after.

IB2 is supplied. Further, the third and fourth transistors 10 and 11 corresponding to each input section 4a and 4b of the second primary transformer 4 are controlled to have a phase difference of approximately 180 degrees while maintaining the de and sodo times D in the same order. Signal IB3
．． IB4 is supplied.

Furthermore, the control signal B3 to the third transistor 10 is different in phase from the control signal IBI to the first transistor 8 by approximately 90 degrees so as to complement the respective dead times D. Similarly, the control signal IB4 to the fourth transistor 11 has a phase difference of approximately 90 degrees from the control signal IB2 to the second transistor 9 so as to complement each dead time D.

Therefore, each input section 3a, 3b of each primary side transformer 3, 4
, 4a, 4b are always connected to one of the input sections 3a, 3b, 4b so as to mutually complement the dead times D in the control signals IBI-IB4 to the respective transistors 8 to 11.
4a, 4b, the currents II, I2 .
I3. It is supplied from I4 or DC power supply 5.

As a result, the currents 11 to I4 supplied to the primary transformers 3 and 4 at each time point become a direct current as a whole. That is, as shown in FIGS. 2 and 3, each of the currents II to 4 which change in a convex shape flows with a phase difference that is synchronized with each of the control signals IBI to IB4, or when they are taken together, they are always at a constant level. The primary current I s (=11+I2+13+I4) flows with no ripple component. Therefore, in the converter 1, it is possible to achieve low noise on the primary side.

As a result, the secondary currents appearing in each of the secondary transformers 12 and 13 become currents that are boosted according to the winding ratio, and collectively become direct currents without any pull component. and,
Each rectifier circuit 14.15 is connected to both output terminals 16a and 16b.
The rectified DC current is outputted through the filter circuit 19, and the output voltage becomes low noise.

Furthermore, since the ripple component in the secondary current Is is reduced, the primary side coil 6 and surge voltage prevention capacitor 7 can be omitted or their capacities can be reduced. Similarly, since the ripple component in the secondary current has been reduced, the secondary coil 17 and capacitor 1
It is also possible to reduce the capacity of 8. As a result, the size of the converter 1 can be reduced.

In addition, in this embodiment, the first primary transformer 3 and the first secondary transformer 12 are a set of transformers, and the second
Since the primary side transformer 4 and the second secondary side transformer 13 can be divided into another set of transformers, each set of transformers can be distributed, and the converter 1
It also increases the degree of freedom in installation.

In this embodiment, since the current supplied from the DC power source 5 can be appropriately boosted by the converter 1, the output of the converter 1 can be used in accordance with vehicle electrical components that require high voltage.

[Second Embodiment] Next, a second embodiment embodying the present invention will be described with reference to the drawings. , FIG. 4 is an electrical circuit diagram showing the converter 1 and its control circuit 41 in this embodiment. The converter 1 of this embodiment has the same configuration as that of the first embodiment, so the same reference numerals are given to the constituent elements and the explanation thereof will be omitted, and only the configuration of the control circuit 41 will be explained below. do.

The control circuit 41 includes an oscillator 42 that outputs a continuous pulse signal VO, a counter 43 that counts the pulse signals VO from the oscillator 42, and four output signals Vl, V2 . V3. It is composed of a decoder 44 that sequentially outputs V4, and a total of four multi-bye breaks 45, 46, 47, and 48, first to fourth, which operate based on the respective output signals V1 to V4 from the decoder 44.

Each multi-by-break 45 to 48 is of the one-shot type, and their output side is connected to each transistor 8 of the converter l.
~11 bases, respectively. The first multi-by break 45 receives the output signal Vl, the second multi-vibrator 46 receives the output signal V2, the third multi-by break 47 receives the output signal V3, and the fourth multi-by break 48 receives the output signal V4 is input respectively.

Based on the input of each output signal V1 to V4, each multi-bye break 45 to 48 outputs each transistor 8 to
Control signal (base current) IBI toward the base of 11,
IB2. IB3. IB4 is supplied respectively. Therefore, the switching of each transistor 8-11 is controlled by supplying the control signals IBI-IB4.

Next, the operation of the converter 1 and its control circuit 41 configured as described above will be explained with reference to the time chart of FIG. 5.

In the control circuit 41, the pulse signal v from the oscillator 42
When O is sequentially counted by the counter 43, the decoder 44 outputs signals V1 to v4 according to the counting timing.
are output sequentially. Further, based on the input of these output signals v1 to 4, each multivibrator 45 to 48 outputs control signals IBI to IB4 to each transistor 8 to 1, 1 of converter l.

Here, each input section 3a, 3b of the first primary side transformer 3
Each transistor 8, 9 corresponding to
Control signals IBI and IB2 having a phase difference of approximately 180 degrees are supplied while maintaining the same order of magnitude. Further, control signals IB3 and IB4 having a phase difference of approximately 180 degrees are supplied to each transistor 10.11 corresponding to each input section 4a, 4b of the second primary transformer 4 while maintaining the same dead time D. be done. Further, the control signal IBI to the first transistor 8 and the control signal IB3 to the third transistor 10 are different in phase by approximately 90 degrees so as to complement each dead time D. Similarly, the control signal IB2 to the second transistor 9 and the control signal IB4 to the fourth transistor 11 are out of phase by approximately 90 degrees so as to complement each punto time D.

Therefore, each input section 3a, 3b of each primary side transformer 3, 4
, 4a, 4b are always connected to one of the input sections 3a, 3b, 4a, 4b so as to complement the dead time D in the control signals IBI to IB4 to the respective transistors 8 to 11.
The current 11 changes in a convex shape at 4b. I2. I3. I4 will be supplied from the DC power supply 5.

As a result, the currents 11 to I4 supplied to the primary transformers 3 and 4 at each time point become a direct current as a whole. That is, as shown in FIGS. 5 and 6, each of the currents II to 4 that change in a convex shape flows with a phase difference that is synchronized with each of the control signals IBI to IB4, but when they are taken together, they are always at a constant level. The primary current I s (=Il+I2+13+I4) flows with no ripple component. Therefore, in the converter I, it is possible to achieve low noise on the primary side.

As a result, the secondary currents appearing in each of the secondary transformers 12 and 13 become currents that are boosted according to the winding ratio, and collectively become direct currents without any pull component. and,
Each rectifier circuit 14.15 is connected to both output terminals 16a and 16b.
The rectified DC current is outputted through the filter circuit 19, and the output voltage becomes low noise.

Furthermore, since the ripple component in the secondary current Is is reduced, the primary side coil 6 and surge voltage prevention capacitor 7 can be omitted or their capacities can be reduced. Similarly, since the ripple component in the secondary current has been reduced, the secondary coil 17 and capacitor 18
It is also possible to reduce the capacity. As a result, the size of the converter 1 can be reduced.

In addition, in this embodiment, the first primary transformer 3 and the first secondary transformer 12 are a set of transformers, and the second
Since the primary side transformer 4 and the second secondary side transformer 13 can be divided into another set of transformers, each set of transformers can be distributed, and the converter 1
It also increases the degree of freedom in installation.

[Third Embodiment] Next, a third embodiment embodying the present invention will be described with reference to the drawings.

FIG. 7 is an electric circuit diagram showing the converter in this embodiment, and in addition to the structure of the converter 1 in each of the embodiments described above, it includes a third primary transformer 51, a third secondary transformer 52, and a rectifier circuit 53. etc. are provided. That is, in contrast to the converters of the respective embodiments described above, in which two sets of transformers are provided in parallel, in this embodiment, a total of three sets of transformers are provided in parallel.

The third primary side transformer 51 includes a first input section 51a and a second input section 51b which are divided into two parts. Each input section 51a, 51b is connected in parallel to the DC power supply 5 and coil 6, which are connected in series, and is also connected in parallel to the capacitor 7. Further, each input section 51a, 51b of the third primary side transformer 51 is provided with a fifth transistor 54 and a sixth transistor 55 as switching elements whose switching is controlled in mutually different phases while maintaining a dead time D between them. are connected in series.

The third secondary transformer 52 is the third primary transformer 51
The winding ratio is set at a predetermined turn ratio. A bridge type rectifier circuit 53 connected to the third secondary transformer 52 is composed of a diode, and its output side is connected to both output terminals 16a.

16b.

In each of the primary transformers 3, 4.51, the bases of the transistors 8 to 11, 54.55 are controlled by a control circuit (not shown) to have different phases while maintaining the dead time D around them. signal IBI,
IB2. IB3゜IB4. IB5. IB6 is now available. That is, each primary side transformer 3. 4.
51 input sections 3a, 3b, 4a, 4b, 51a, 5
1b, each of those transistors 8 to 11,54°5
Dead time D in control signals IBI to IB6 to 5
As shown in FIG. 8, one of the input sections 3a, 3b, 4a, 4b is always used to complement the input section.

The current It changes in a two-stage convex shape at 51a and 51b.

I2. I3. I4. I5 and 16 are supplied from the DC power supply 5.

As a result, the currents 11 to 6 supplied to the primary transformers 3, 4, and 51 at each time point become a direct current as a whole. That is, as shown in FIG.
6 flows with a phase difference synchronized with each other, but when they are combined, the primary current I S (=II + 12 + I 3 + I 4 + 15
+I6). Therefore, also in this converter,
It is possible to achieve low noise on the primary side.

Also, as a result, each secondary transformer 12°13.5
The secondary current appearing at 2 becomes a current boosted according to the winding ratio, and in total becomes a direct current without a pull component. And both output terminals 16a.

A rectified DC current is output from the rectifier circuit 16b through the rectifier circuits 14, 15.53 and the filter circuit 19, and the output voltage is made low noise.

Furthermore, since the ripple component in the secondary current Is is reduced, it is possible to omit the primary side coil 6 and surge voltage prevention capacitor 7, or to reduce their capacity.
I can do it. Similarly, since the ripple component in the secondary current has been reduced, the secondary coil 17 and capacitor 1
It is also possible to reduce the capacity of 8. As a result, the size of the converter can be reduced.

In addition, in this embodiment, the first primary transformer 3 and the first secondary transformer 12 are a set of transformers, and the second
The primary transformer 4 and the second secondary transformer 13 are divided into another set of transformers, and the third primary transformer 51 and the third secondary transformer 52 are further divided into another set of transformers. Therefore, each set of transformers can be arranged in a distributed manner, and the degree of freedom in installation as a converter can be increased.

The present invention is not limited to the above-mentioned embodiments, and may be implemented as follows by appropriately changing a part of the structure without departing from the spirit of the invention.

(1) In each of the embodiments described above, the converter 1 is of a type that boosts the voltage of the DC power supply 5, but each secondary side transformer 12, 13.
The present invention may be implemented as a type of converter that steps down the voltage of the DC power supply by appropriately setting the winding ratio of 52.

(2) In each of the embodiments described above, the bridge rectifier circuits 14, 15, and 53 made of diodes were provided, but other types of rectifier circuits may be provided.

(3) In each of the above embodiments, the converter is of a type in which two or three sets of transformers are arranged in parallel, but it may be embodied in a converter in which four or more sets of transformers are arranged in parallel.

[Effects of the Invention] As detailed above, according to the present invention, it is possible to reduce the ripple component in the negative current, and also to reduce the ripple component in the secondary current, thereby preventing surge voltage on the primary side. It is possible to omit a secondary capacitor or to reduce its capacity, and the overall size can be reduced, which is an excellent effect.

[Brief explanation of drawings]

1 to 3 show a first embodiment embodying the present invention, FIG. 1 is an electric circuit diagram showing a converter and its control circuit, and FIG. 2 shows each signal in the control circuit and the primary side of the converter. A time chart showing the current supplied to the third
The figure is a time chart illustrating the current supplied to the primary side of the converter. 4 to 6 show a second embodiment embodying the present invention, FIG. 4 is an electric circuit diagram showing a converter and its control circuit, and FIG. 5 shows each signal in the control circuit and the primary side of the converter. FIG. 6 is a time chart illustrating the current supplied to the primary side of the converter. FIG. 7 and FIG. 8 show a third embodiment embodying the present invention.
The figure is an electric circuit diagram showing the converter, and FIG. 8 is a time chart explaining the current supplied to the primary side of the converter. FIG. 9 is an electrical circuit diagram showing a conventional converter;
Fig. 10 is a time chart explaining the current supplied to the primary side of the converter. In Fig. 10, 3 is the first primary transformer, 4 is the second primary transformer, 3a, 4a.
is the first input part, 3b and 4b are the second input parts, 5 is the DC power supply, 8 is the first transistor, 9 is the second transistor, 10 is the third transistor, and 11 is the fourth transistor ( 8 to 11 each constitute a switching element), 12 is a first secondary transformer, 13 is a second secondary transformer, 14.15 is a rectifier circuit, 51 is a third primary transformer, 51a is a first input section, 51b is a second input section, 52 is a third secondary transformer, 53 is a rectifier circuit, 54 is a fifth transistor, 55 is a sixth transistor (54 and 55 are respectively (constitutes a switching element). Patent applicant Toyota Industries Corporation representative
Patent Attorney On 1) Hironobu (and 1 other person) Figure 2 Figure 7

Claims (1)

[Scope of Claims] 1. A plurality of primary side transformers that are arranged in parallel to each other and that are composed of a first input section and a second input section that are divided into two parts, and each of the input sections of each of the primary side transformers. In the same primary transformer, switching is controlled at different phases while maintaining a predetermined rest time in between, and between different primary transformers, switching is controlled at different phases to complement each rest time. a DC power supply connected in parallel to each of the input sections of each of the primary transformers; a secondary transformer provided corresponding to each of the primary transformers; and each of the secondary transformers. A converter equipped with a rectifier circuit provided in the converter.