JPH04104504A - Operational amplifier - Google Patents

Abstract

PURPOSE:To obtain an operational amplifier of low current consumption by controlling a first current source by a first bias circuit so that the mutual conductance of a pair of input transistors TRs in a differential amplifying part is fixed and controlling a second current source by a second bias circuit so that the mutual conductance of an output TR in an output amplifying part is fixed. CONSTITUTION:This amplifier consists of the differential amplifying part consisting of a first current source Q16 and the pair of TRs, the output amplifying part consisting of a second current source Q17 and an output TR Q18 to which the output signal of the differential amplifying part is inputted, and a bias circuit which controls the first current source and the second current source, and this bias circuit consists of a first bias circuit 10 which controls the first current source to fix the mutual conductance of the pair of TRs and a second bias circuit 20 which controls the second, current source to fix the mutual conductance of the output TR. Thus, an unnecessary current more than necessary to realize a required frequency characteristic is eliminated to obtain the operational amplifier of low current consumption.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an operational amplifier, and more particularly to an operational amplifier whose frequency characteristics are not affected by variations in temperature, manufacturing process, etc.

[Prior art 1] Fig. 6 shows a conventional operational amplifier. Transistor Q,i
3 and transistor Q2 are 8MO3 transistors with an inverting input Vin (-1 and a non-inverting input V , , (+), and are connected to the voltage Vaa through pMO3l-transistors Q3 and Q4. and a first current source that controls the current of the transistor Q2.The transistors Q and -Q5 form a differential amplification section.The gate of the transistor Q6 is connected to the drain of the transistor Q2, and the gate of the transistor Q6 is connected to the drain of the transistor Q2.
The train becomes the output of this operational amplifier. Transistor Q is a second current source, and the same voltage that is input to the first current source is input to transistor Q7. Bias circuit 70 supplies voltage to the gates of transistor Q and transistor q7. That is, the bias circuit 70
■ Current flowing through. , - current proportional to the first and second
The current is controlled so that it flows through the current source.

In such an operational amplifier, the GB product (gainwi
dth), the following bias circuit may be used. Namely, Roubik Gregorian, Gerber C.
IAN, Gabor C, TEMES) co-authored “Analogmos Ingrated Circuits for
Signal processing (ANALOG MO3IN
TERGRTED CIRCUITS FOR5IGN
AL PROCESSING) JJOHN WILEY
& 5 ONS, Inc., p. 127 of 1986. is the power supply voltage V. This is a bias circuit that does not depend on I. Such a bias circuit is shown in FIG. Q, ,Q, are 8MO3 transistors,
QIO, QII are PMO3 transistors, Q,.

, QII are connected to the power supply VOO, and their gates are also connected to each other. Further, each gate is connected to the drains of the PMO3 transistor Qll and the NMOS transistor Q9, forming a current mirror circuit. Also, NMOS transistor Q8.
The gates of Qe are connected to each other and further connected to the drains of 8MO3 transistor q and PMO3 transistor QIO. NMOS transistor Q8
The source is power supply V. 8MO3) - The source of the transistor Q9 is connected to the power supply Vsi via a resistor R. Bias voltage V is 8MO3l - transistor Q8
Or it can be taken out from the drain of Q.

In this bias circuit, the MOS transistor is
The product of the current I31 flowing through the MOS transistor (X is the capacitance per unit area of the gate insulating film of the MOS transistor) is inversely proportional to the square of the resistance R, and if the resistance R is constant, 'XIb+a* is constant. It is. In other words, when the bias voltage ■ is connected to the gate of the constant current source transistor in the differential amplifier stage of the operational amplifier, a current proportional to the bias current Iゎ,□ flows through the input transistor pair of the differential amplifier section of the operational amplifier. be able to. If the operational amplifiers are on the same chip, the mutual conductance gm of the transistors in the differential amplifier section is proportional to Ji170,000, so the gm of the transistors in the operational amplifier can be kept constant. In this way, the GB product (Gain・
Since Gm (Bandwidth) is proportional to gm, the GB product of the operational amplifier can be made constant by using this bias circuit.

[Problem to be Solved by the Invention 1] In an operational amplifier, the band of the second ball generally needs to be wider than the GB product. That is, the second ball is determined as follows.

px>g"p+ Here, it is assumed that the frequency of the second ball is pg, the gain is g, and the bandwidth is pl.

However, when bias power is supplied to both the first current source and the second current source from the same bias circuit as in a conventional operational amplifier, even if the GB product is constant, the transconductance of the output amplification section is and the environment, such as temperature, and the position of the second ball of the operational amplifier changes.

Therefore, in order to secure the minimum required ball position and sufficient phase margin, it is necessary to make the frequency of the second ball higher than necessary so that the above equation is satisfied even under the worst conditions. Therefore, current consumption is required to be higher than necessary.

In view of the above points, it is an object of the present invention to provide an operational amplifier with low current consumption while keeping the frequency of the second ball of the operational amplifier constant and ensuring necessary frequency characteristics.

[Means for Solving the Problems 1] The present invention comprises a differential amplification section including a first current source and a pair of input transistors, a second current source and an output transistor that receives an output signal of the differential amplification section as input. and a bias circuit that controls the first current source and the second current source, the bias circuit controls the first current source and controls the input transistor pair. The first method that keeps the mutual conductance constant is
a bias circuit for controlling the second current source and keeping the mutual conductance of the output transistor constant;
It is characterized by consisting of a bias circuit.

[Function 1] In the present invention, the first bias circuit and the second bias circuit maintain constant mutual conductance of the transistors of the differential amplifier section and the output amplifier section, respectively. Therefore, the first
The second bias circuit operates so that the GB product of the operational amplifier does not vary with respect to the process, power supply voltage, environmental temperature, etc., and the second bias circuit operates so that the second ball of the operational amplifier does not vary with respect to the process, power supply voltage, environmental temperature, etc. , operate without fluctuation. Therefore, it is possible to ensure the frequency characteristics necessary for operation and to suppress unnecessary current consumption.

[Example 1 The present invention will be explained below based on Examples.

FIG. 1 is a circuit diagram showing an embodiment of the operational amplifier of the present invention. In FIG. 1, Q12+QIN is a manually powered NMOS transistor, and Q14+QI6 is a PMOS transistor for loading. Q18. Q17 is an NMOS transistor that operates as a current source, and the transistor Ql 2 + Q l 2 + Q l 4
*Q I 8 + Q I 8 constitute a differential amplifier section. Qll+ is an output transistor, and transistors Ql7+Ql8 constitute an output amplification section. A capacitor Ce and a resistor Re are each used for phase compensation. Further, CL is a load capacity. Reference numeral 10 denotes a first bias circuit, the output of which is input to the gate of the transistor QCs to control the current of the differential amplifier section. 20 is a second bias circuit, the output of which is input to the gate of the transistor (1+t) to control the current flowing through the output amplification section.

The circuit shown in FIG. 2 can be used as the first bias circuit IO. Further, FIG. 3 is a circuit diagram of the second bias circuit. FIG. 2 shows a conventional bias circuit that keeps the GB product constant, and has the function of keeping the gm of an NMOS transistor constant. FIG. 3 shows the bias circuit of FIG. It is equivalent to the one placed on the 0 side,
It has the function of keeping the gm of the PMOS transistor constant.

In the operational amplifier shown in FIG. 1, the GB product is determined by gml/Cc, and the second ball is determined by gm3/Ct. here,
gml is the mutual conductance of transistor Q+a, (1+s), and gm3 is the mutual conductance of transistor Q+a. The first bias circuit 10 and the second
The bias circuits 20 respectively control the current sources to generate voltages and
In order to keep the gm of the NMOS and PMOS transistors constant regardless of temperature and process variations, the GB product and the second ball, respectively, can be kept constant. Therefore, it is possible to design an operational amplifier with the necessary frequency characteristics without considering variations due to power supply voltage, temperature, or process, and since the GB product and the position of the second ball are constant, the frequency characteristics do not fluctuate, so it can be used especially as a filter. It becomes possible to operate it.

In this embodiment, an NMOS l-transistor current source is used, but an operational amplifier may be formed by using PMOS transistors for the current source, input transistor pair, and output transistor, and using an NMOS transistor for the load transistor. . In this case, if the input transistor is a PMOS transistor, the bias circuit shown in Fig. 3 that keeps the mutual conductance of the input transistor constant is connected to the current source of the differential amplifier, and the current source of the output amplifier is It is sufficient to connect the bias circuit shown in FIG. 2 to keep the conductance constant.

Next, a second embodiment of the present invention is shown in FIG. This embodiment is a cascode type operational amplifier, and in FIG.
,,Q,. are input transistor pairs, Q, , ,Q,
□ is a cascode transistor, and Q23+024 is a load transistor. Q2 S + Q z s +
Qa? is a current source transistor. C3 is node A.

B is the parasitic capacitance, and Ct is the load capacitance. 30 is a first bias circuit, which includes a current source transistor Q
It is input to z5 and makes the mutual conductance of input transistors Q1o and Q2° constant. , 40 is a second bias circuit, which includes a current source transistor Q2g1Q27.
is input to the gate of cascode transistor Q21.
Keep the mutual conductance of Q22 constant. Bias circuit 50 includes transistor Q2. ．． Any device that outputs a voltage such that Q2□ operates in the saturation region may be used.

The bias circuit 30 may have the same configuration as that in FIG. 2, and the bias circuit 40 is shown in FIG. Block 11 in FIG.
has the same configuration as the bias circuit in Figure 3, and PM
A current ip flows such that the mutual conductance of the OS transistor is constant. In block 12, the input transistor Q by the output voltage of the first bias circuit 30
1□, Q1. The second bias circuit 40 outputs a voltage that is added to a current having the same magnitude as the current and causes the current to flow. That is, the currents flowing through the transistors Qia and Q27 are determined as follows. Cascode transistor Q! +, the current flowing through Q12 is LQ2I Qzz"ap 'ip: 1azs, oz fu -1o + 9.oz.

The output voltage of the bias circuit 40 is set so that .

Here, death is a constant of proportionality. From the above equation, the output voltage of the bias circuit 40 may be determined so that Lza,aiy=ap4pDa+i,Q20.

The bias circuit 50 may be a transistor (h1.) as long as it outputs a voltage such that Q-□ operates in the saturation region, and the circuit may have many forms.For example, it may have the same configuration as the circuit shown in FIG. A circuit can be used.

In this case, the size ratio (W
/L) should be smaller than that of the bias circuit 40.

In this circuit, the value of GB product is determined by Gm19/CL,
The position of the second ball is determined by Gm21/Cs. here,
Gm19 is an input transistor Ql-, Qa. The transconductance of Gm21 is the transistor Q* l, Q
t□ is the mutual conductance, Ct is the load capacitance,
C8 is the parasitic capacitance at nodes A and B. Gm19
and Gm21 are bias circuits 30 and 40, respectively.
Therefore, in this embodiment as well, the value of the GB product and the value of the second ball are constant regardless of process and environmental changes.

According to the conventional circuit, the position of the second ball was widened (varied) due to variations in process, temperature, and power supply voltage, but according to the present invention, it became constant. Therefore, it is possible to achieve the specified performance even under the worst conditions. This makes it possible to create an optimal design without setting a current amount higher than necessary.

[Effects of the Invention] According to the present invention, since the GB product and the position of the second ball are constant regardless of process or environmental changes, the above-mentioned process or environmental changes can be avoided in order to achieve the necessary frequency characteristics. This eliminates the need for wasted current such as supplying more current than necessary, making it possible to supply an operational amplifier with low current consumption.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment of the invention, FIGS. 2 and 3 are circuit diagrams showing a bias circuit used in the invention, and FIG. 4 is a circuit diagram showing a second embodiment of the invention. 5 is a circuit diagram showing the bias circuit used in FIG. 4, and FIG. 6 is a circuit diagram showing a conventional operational amplifier. Ql 2 + Ql 3 + Ql 8 + Q
l? ...NMOS transistor, Q, 4. Q...
, Q, , -PMO3I- transistor, 10.20...
bias circuit.

Claims (1)

[Scope of Claims] 1) Output amplification comprising a differential amplification section including a first current source and a pair of input transistors, and an output transistor that receives the output signal of the second current source and the differential amplification section as input. and a bias circuit that controls the first current source and the second current source, wherein the bias circuit includes a first bias circuit and a second bias circuit, and the bias circuit controls the first current source and the second current source. The bias circuit controls the first current source to keep the mutual conductance of the input transistor pair of the differential amplifier section constant, and the second bias circuit controls the mutual conductance of the output transistor of the output amplifier section to keep the mutual conductance constant. An operational amplifier characterized in that the second current source is controlled so as to.