JPH04102158A - Close coupling multiprocessor - Google Patents

Abstract

PURPOSE:To efficiently execute a function type language by defining one of an (n) [(n)>=2] number of processors as a master processor and remaining processors as slave processors, and controlling the program counters and stack pointers of the slave processors by the master processor. CONSTITUTION:Among the (n) number of processors constituting a parallel computer, one processor is defined as a master processor 10-0 and the (n-1) number of remaining processors are defined as slave processors 10-1, 10-2,.... All the processors share a program code, which is executed by the respective processors, in a program code storage area 21 of a shared memory 15. Since the program code to be executed by the master processor 10-1 and the slave processors 10-1 and 10-2 is shared on the shared memory 15, it is not necessary to individually manage execution logic. When there is a function to be parallelly executed, the master processor 10-0 distributes the processing to the respective slave processors 10-1 and 10-2 so as to parallelly execute it and therefore, the executed result can be obtained in a short time. Thus, the function type language can be efficiently executed.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a tightly coupled multiprocessor that enables parallel execution of functional languages.

The purpose is to enable efficient execution of functional languages with simple control, and one of the n processors is designated as a master processor, the remaining (n-1) processors are slave processors, and each processor executes The program code is configured to execute the functional language in parallel by allowing the master processor to control the program counter and stack pointer of the slave processors while coexisting in all the processors. In addition, by providing a stack area, program counter, and stack pointer on shared memory, data exchange between the master processor and slave processors is realized, and a mask that maintains default values unique to each processor in local memory. A storage unit and a slave flag indicating which processor has a processing request on the shared memory are provided, and the processing is configured to be synchronized by these.

[Industrial application field]

The present invention relates to a tightly coupled multiprocessor that can execute functional languages in parallel. Note that the arithmetic language used here means a computer language such as a procedural language that has a general subprogram calling function.

In recent years, as microprocessors have become available at low prices, ? Tightly-coupled multiprocessor-type parallel computers, in which several processors are coupled to a shared memory, are now being created. This movement is expanding to single-use workstations. therefore,
Such parallel needles lXI! The importance of languages that can run efficiently on computers is increasing.

C. Conventional technology] FIG. 5 shows an example of sequential processing in a conventional functional language.

For example, a functional (procedural) language such as C language.

Consider the case of execution on a conventional sequential computer.

Function a (b (x), c (x), d (X)) as shown in Figure 5 (a)
is executed by expanding it into assembly code as shown in FIG. 5(b).

■ Push argument X onto the stack.

■ Execute the function.

■ Save the result of the function in register r1.

■~■ Process the function C in the same way as ■~■.

■~■ Process the function d in the same way as ■~■.

0 Push the result of interval d onto the stack.

■ Push the result of function C onto the stack.

■ Push the result of the function onto the stack.

■ Execute the interval a.

0~■ Take out the result and restore the stack.

[Problem to be solved by the invention]

The conventional method described above is fast for a sequential computer, but if it takes time to execute functions 1, c, and d, it is recommended to execute them in parallel to shorten the overall execution time. It is desirable to do so.

Furthermore, although various methods for parallel execution have been considered in the past, there has been a problem in that the program code that is executed by each processor is generally not the same, and the development of the program code for this purpose is complicated.

The present invention aims to solve the above-mentioned problems and makes it possible to efficiently execute a functional language with N simple controls.

[Means to solve the problem]

FIG. 1 shows an example of the configuration of the present invention.

In FIG. 1, 10-0 is a master processor.

10-1.10-2. ...is a slave processor.

11 is a CPU that executes instructions; 12 is a local memory;
13 is a processor ID storage unit that stores a processor ID that is an identifier of each processor; 14 is a processor mask storage l that stores a default value specific to each processor, for example, in the form of a focus pattern; 1s is a shared memory in which each processor coexists; 16 is the result storage area where the execution results of each processor are stored.

17 is a slave flag used for processing synchronization.

18 is a program counter indicating the execution value 1 of each processor; 19 is a stack pointer indicating the current storage position of the stack; 20 is a stack area; and 21 is a program code storage area.

In the present invention, one of n processors constituting a parallel computer is designated as master processor 10-0 and the remaining (n-1
) slave processors 101.10-2. ...
Then, the program code executed by each processor is placed in the program code storage area 21 of the shared memory 15 and shared by all processors.

Then, the master processor 10-0 controls each of the slave processors 10-1, 10-2, . . . , and thereby execute the functional language program codes stored in the program code storage area 21 in parallel.

The stack area 20 is divided and provided on the shared memory 15 corresponding to each processor. A program counter 18 and a stack pointer 19 for each processor are also provided on the shared memory 15. As a result, master processor 10-0 and slave processors 1O-1, 1
Data is exchanged with 0-2, . . . .

In addition, the default values specific to each processor can be set to local memory 1.
2 is stored in the processor mask storage section 14 provided on the 2. That is, the master processor's pe-mask 0bO00
001 Thread 1 Brosse/Tsuki11's pe-+5ask
0bOO0010 Slave Brosesoza #2's pe*5a
sk 0b000100, the value with the corresponding bit turned on is set to the processor mask (pe-mask).
), and a slave flag 17 indicating which processor in the shared memory 15 is requested to perform processing is used to synchronize the processing.

[Effect]

Since the program codes executed by master processor 10-0 and each slave processor 10-1, 10-2 are shared on one shared memory 15, there is no need to manage execution logic individually.

If there is a function that can be executed in parallel, master processor 1
0-0, each slave processor 1O-11 (1-2,
Because the processing is distributed to and executed in parallel.

You will be able to get results in a short time.

〔Example〕

FIG. 2 shows an embodiment of the present invention, FIG. 3 shows an example of function execution control according to the embodiment of the invention, and FIG. 4 shows an example of a program according to the embodiment of the invention.

In FIG. 2, the same reference numerals as in FIG. 1 correspond to those shown in FIG.

The processor ID of the master processor 10-0 is 0. The processor ID of the slave processor 10-1 is 1. The processor ID of slave processor 10-2 is 2. . . . Correspondingly, a unique bit pattern is stored in the processor mask storage unit 14 of each processor.

rO, rl, r2 are general-purpose registers of each processor, s
p [i] is the stack pointer of each processor PEi, pc [i] is the program counter of each processor PEi, and rv [+] is the stack pointer of each processor PEi. Result storage area slave flag (slave-
flag) l7 is a flag for synchronizing each processor.

In the system shown in FIG. 2, the execution of functions is controlled by processing logic as shown in FIG. 3, for example. Hereinafter, explanation will be given according to (a) to (i) shown in FIG.

(a) Determine whether or not the master processor is the master processor based on the processor ID. In the case of a slave processor, the process moves to process (2).

(b) In the case of a master processor, the arguments and address of the function to be executed by each processor are bushed in the stack area 20 on the shared memory 15.

(C1 Next, in order to specify the slave processor to execute the function, turn on the corresponding bit of the slave flag 17.

(4 If the master processor itself has rjji numbers to process, execute that function.

(e) When the execution of the function is completed, the completion of execution of all slave processors is monitored depending on whether the focus of the slave flag 17 is turned off.

(f) When the execution of the function in the slave processor is completed, the bit of the slave flag 17 is turned off, so the results of each function are retrieved from the result storage area 16.

Execute the function that requires the result. after that.

Move on to the next execution process.

(The 80 slave processor determines whether its corresponding slave flag 17 bit is on. If it is not on, it waits until it becomes on.

If the corresponding bit of slave flag 17 is on,
Executes the specified function on the stack.

The execution results of the functions are written to the corresponding result storage area 16.

(i) When the execution of the function is finished, turn off the focus corresponding to slave flag 17, and proceed to process (6).
Wait until the slave flag 17 bit turns on.

Figure 4 shows the functions a (b (x), c (X), d (X) shown in Figure 5 (a)
) is developed into assembly code in order to be executed in parallel using the processing logic shown in FIG. 3. Hereinafter, explanation will be made according to ① to ＠ shown in FIG.

■ The value of the processor 1d storage unit 13 shown in FIG. 2 is 0.
Check whether it is.

■ If it is not 0, it is a slave processor and jumps to label LL2. If it is 0.

Since it is the master processor, it executes the following steps in the third order.

■ Push argument X onto the stack for slave processor PEI.

■ Next, the address b of the function is pushed onto the stack for the slave processor PEI.

■ Push argument X onto the stack for slave processor PE2.

■ Next, the address C of the function is pushed onto the stack for the slave processor PE2.

(2) Set the slave flag 17 to a value for the processors that perform parallel execution.

■ Push argument X onto the stack for the master processor.

■ Execute function d.

■ Pop the execution result of function d into register ro.

(2) Determine whether execution of all slave processors has finished using the slave flag 17.

■ If there is a slave processor whose execution has not finished, wait for its completion based on the judgment in ■.

■ Push register ro.

[Phase] Bushes the execution result of slave processor PE2.

■ Bush the execution results of the slave processor PEI.

■ Execute function a.

■ Pop the stack result into register r2.

[Stock] Pop the result of the stack into register r1.

■ Pop the stack result into register rO.

@ Move to the next execution of function a.

(2) Each slave processor checks whether or not its own processor mask bit, which is set in the processor mask storage unit 14 shown in FIG. 2, of the slave flags 17 is on.

@ If not on, the determination of process 0 is repeated until a value is set in the slave flag 17.

@ Specify the address of a function set in your own stack and execute function C or function C by making an indirect subroutine call.

[Phase] Save the execution results of the function in the result storage area 16.

■ Restore the stack pointer.

@ Lock the slave flag 17 for exclusive control.

[Phase] To notify that the execution of the slave processor has ended, turn off the corresponding bit of the slave flag 17.

[Phase] Unlock the slave flag 17 and release exclusive control.

@ Return to processing 0 and wait for the first processing request.

As described above, parallel execution of functions is realized by each program code determining its own requested processing and executing the same program code.

Effects of the Invention C] As explained above, according to the two inventions, it is possible to efficiently execute a functional (procedural) type language in parallel on a tightly coupled multiprocessor.

tJ, 12 is local memory, 13 is processor 1d storage, 14 is processor mask storage, 15 is shared memory, 16 is result storage area, 17 is slave flag, 18 is program counter, 1 is stack pointer, 20 is A stack area 21 represents a program code storage area.

Claims (1)

[Claims] 1) Multiple processors (10-0, 10-1,...)
and a shared memory (15
), one of the n processors (n≧2) is the master processor, the remaining (n-1) are slave processors, and the program code executed by each processor is is a tightly coupled multiprocessor characterized in that a functional language is executed in parallel by the master processor controlling the program counter and stack pointer of the slave processors while they remain shared by all processors. 2) In the tightly coupled multiprocessor according to claim 1, a stack area (20) for function execution of each processor.
, program counter (18), stack pointer (1
9) on the shared memory (15) to realize data exchange between the master processor and slave processors, and a mask storage section (14) that holds default values specific to each processor on the local memory. and a slave flag (17) indicating to which processor the processing request is made on the shared memory, and the processing is synchronized by the value in the mask storage section and the slave flag. Combined multiprocessor.