JPH04100221A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH04100221A
JPH04100221A JP21783390A JP21783390A JPH04100221A JP H04100221 A JPH04100221 A JP H04100221A JP 21783390 A JP21783390 A JP 21783390A JP 21783390 A JP21783390 A JP 21783390A JP H04100221 A JPH04100221 A JP H04100221A
Authority
JP
Japan
Prior art keywords
melting point
metal layer
high melting
point metal
nitrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21783390A
Other languages
Japanese (ja)
Inventor
Nobuhiro Misawa
信裕 三沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21783390A priority Critical patent/JPH04100221A/en
Publication of JPH04100221A publication Critical patent/JPH04100221A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To form the surface of a high melting point metallic layer smooth and excellent in coverage so that the surface cannot become rough by making surface treatment to a high melting point metallic compound layer containing nitrogen in a plasma atmosphere containing either nitrogen or oxygen. CONSTITUTION:A high melting point metallic compound layer containing nitrogen is surface-treated in a plasma atmosphere containing either nitrogen or oxygen. In order to remove a natural oxide film, etc., produced on a barrier metal layer 5, the surface treatment is made on the barrier metal layer 5 with a solvent, such as hydrofluoric acid, etc. Then, after placing a sample on the susceptor 9 in a surface treatment chamber 8, a mixed gas of, for example, NF3 gas (10sccm) and N2 gas (100sccm) is introduced into the chamber 8 and an RF bias is applied across an RF electrode 10 below the susceptor 9 so as to make plasma treatment on the surface of the barrier metal layer 5 composed of TiN.

Description

【発明の詳細な説明】 〔概要〕 半導体装置の製造方法に関し、 バリアメタル層上に高融点金属層を形成する際、高融点
金属層を表面形状の荒れを生じないように滑らかに、か
つカバレッジ良く形成することができる半導体装置の製
造方法を提供することを目的とし、 窒素または酸素を少なくともいずれか1つを含むプラズ
マ雰囲気中で窒素含有高融点金属化合物層を表面処理す
る工程を含むように構成する。
[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a semiconductor device, when forming a high melting point metal layer on a barrier metal layer, the high melting point metal layer is smoothed and covered so as not to cause surface roughness. The purpose of the present invention is to provide a method for manufacturing a semiconductor device that can be formed well, and includes a step of surface treating a nitrogen-containing high melting point metal compound layer in a plasma atmosphere containing at least one of nitrogen or oxygen. Configure.

〔産業上の利用分野〕[Industrial application field]

本発明はTiN等のバリアメタル層及びタングステン等
の高融点金属層及びアルミニウム層等からなる配線層を
形成する工程を有する半導体装置の製造方法に関する。
The present invention relates to a method for manufacturing a semiconductor device that includes a step of forming a wiring layer made of a barrier metal layer such as TiN, a high melting point metal layer such as tungsten, and an aluminum layer.

近時、半導体集積回路の高集積化に伴い、配線スケール
の微細化が進んできている。その結果、従来のアルミニ
ウム等を主とする配線ではエレクトロ・マイグレーシラ
ン等による信鯨性の低下が顕著となってきている。
In recent years, as semiconductor integrated circuits have become more highly integrated, the interconnect scale has become smaller. As a result, in conventional wiring mainly made of aluminum or the like, deterioration in reliability due to electro-migration silane and the like has become noticeable.

このため、アルミニウムに替わり、タングステン等のエ
レクトロ・マイグレーシランに対して強い配線材料を用
いた配線形成技術が必要になってきている。
For this reason, there is a need for a wiring formation technology that uses a wiring material that is resistant to electro-migration silane, such as tungsten, instead of aluminum.

〔従来の技術〕[Conventional technology]

第4図は従来の半導体装置の製造方法を説明する図であ
り、第4図において、31はSi等からなる基板、32
はソース/ドレイン等の拡散層、33は5iOz等から
なる絶縁膜、34は絶縁膜33に形成されたコンタクト
ホール、35はTiN等からなるバリアメタル層、36
はW等からなる高融点金属層、37は3i0z等からな
る絶縁膜である。
FIG. 4 is a diagram illustrating a conventional method for manufacturing a semiconductor device. In FIG. 4, 31 is a substrate made of Si or the like;
33 is an insulating film made of 5iOz or the like; 34 is a contact hole formed in the insulating film 33; 35 is a barrier metal layer made of TiN or the like; 36
3 is a high melting point metal layer made of W or the like, and 37 is an insulating film made of 3i0z or the like.

次に、その製造方法について説明する。Next, the manufacturing method will be explained.

まず、第4図(a)に示すように、例えばイオン注入に
より基板31に拡散層32を形成し、例えばCVD法に
より基板31上にS iOzを堆積して絶縁膜33を形
成し、例えばRIP、により絶縁膜33を選択的にエツ
チングして絶縁1133にコンタクトホール34を形成
するとともに、コンタクトホール34内に拡散層32が
形成された基板31を露出させる。
First, as shown in FIG. 4(a), a diffusion layer 32 is formed on a substrate 31 by, for example, ion implantation, and an insulating film 33 is formed by depositing SiOz on the substrate 31 by, for example, CVD. The insulating film 33 is selectively etched by etching to form a contact hole 34 in the insulator 1133 and to expose the substrate 31 in which the diffusion layer 32 is formed in the contact hole 34.

次に、第4図(b)に示すように、例えばCVD法によ
りコンタクトホール34内の拡散層32とコンタクトを
取るようにTiNを堆積してバリアメタル層5を形成し
た後、バリアメタル層35上に発生した自然酸化膜等を
除去するために、フッ酸(硫酸でもよい)等の溶剤を用
いてバリアメタル層35の表面処理を行う。
Next, as shown in FIG. 4(b), a barrier metal layer 5 is formed by depositing TiN to make contact with the diffusion layer 32 in the contact hole 34 by, for example, the CVD method. In order to remove the natural oxide film etc. generated thereon, the surface of the barrier metal layer 35 is treated using a solvent such as hydrofluoric acid (sulfuric acid may also be used).

そして、バリアメタル層35表面処理後の試料を大気雰
囲気中を介してウェット処理装置から成膜装置に移し替
えて、例えばCVD法によりバリアメタル層35上にW
を堆積して高融点金属層36を形成して、第4図(c)
に示すような拡散層32とコンタクトされるバリアメタ
ル層35、高融点金属層36からなる配線層を得ること
ができる。なお、ここでのバリアメタル層35は基板3
1のStと高融点金属層36のWとの熱拡散による反応
を防止する機能を有する他、基板31と高融点金属層3
6との接着を強固に行うための接着層としての機能を有
している。
Then, the sample after the surface treatment of the barrier metal layer 35 is transferred from the wet processing device to the film forming device through the air atmosphere, and W is deposited on the barrier metal layer 35 by, for example, the CVD method.
is deposited to form a high melting point metal layer 36, as shown in FIG. 4(c).
A wiring layer consisting of a barrier metal layer 35 and a high melting point metal layer 36 in contact with the diffusion layer 32 can be obtained as shown in FIG. Note that the barrier metal layer 35 here is the substrate 3
In addition to having a function of preventing a reaction between St of No. 1 and W of the high melting point metal layer 36 due to thermal diffusion, the substrate 31 and the high melting point metal layer 3
It has a function as an adhesive layer for strongly adhering to 6.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記した従来の半導体装置の製造方法では、バリアメタ
ル層35上に高融点金属層36を形成する場合、バリア
メタル層35表面に生じた自然酸化膜等を除去するため
にフッ酸等の溶剤を用いてバリアメタル層35の表面処
理を行っていた。このため、高融点金属層36となるタ
ングステンの成長初期において、核形成が一様におこら
ず、その結果として結晶粒径が大きくなり、高融点金属
層36の表面形状が滑らかにならず荒れてしまうという
問題があった。このように、高融点金属層36の表面形
状が荒れると、特に微細化されるに伴い、高融点金属層
36がカバレッジよく形成するのが困難になるという問
題があり、多層化、平坦化等の大きな支障となっていた
In the conventional semiconductor device manufacturing method described above, when forming the high melting point metal layer 36 on the barrier metal layer 35, a solvent such as hydrofluoric acid is used to remove a natural oxide film etc. generated on the surface of the barrier metal layer 35. The surface treatment of the barrier metal layer 35 was carried out using the above method. For this reason, in the early stage of growth of tungsten that will become the high melting point metal layer 36, nucleation does not occur uniformly, and as a result, the crystal grain size increases and the surface shape of the high melting point metal layer 36 becomes rough rather than smooth. There was a problem with putting it away. As described above, if the surface shape of the high melting point metal layer 36 becomes rough, there is a problem that it becomes difficult to form the high melting point metal layer 36 with good coverage, especially as the structure becomes finer, and it becomes difficult to form the high melting point metal layer 36 with good coverage. This was a major hindrance.

そこで、本発明は、バリアメタル層上に高融点金属層を
形成する際、高融点金属層を表面形状の荒れを生じない
ように滑らかに、かつカバレッジ良く形成することがで
きる半導体装置の製造方法を提供することを目的として
いる。
Therefore, the present invention provides a method for manufacturing a semiconductor device that can form a high melting point metal layer on a barrier metal layer smoothly and with good coverage without causing roughness in the surface shape. is intended to provide.

〔課題を解決するための手段〕[Means to solve the problem]

本発明による半導体装置の製造方法は上記目的達成のた
め、窒素または酸素を少な(ともいずれか1つを含むプ
ラズマ雰囲気中で窒素含有高融点金属化合物層を表面処
理する工程を含むものである。
In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes a step of surface treating a nitrogen-containing high melting point metal compound layer in a plasma atmosphere containing a small amount of either nitrogen or oxygen.

本発明に係る窒素または酸素を少なくともいずれか1つ
を含むプラズマには、窒素、窒素含有化合物、酸素、酸
素含有化合物のうちいずれか1つを含むプラズマであれ
ばよ(、例えばNt、Nz01Ox 、Nt +Hz 
O+og  (oxはバリア性の点で1%以下が好まし
い)等よりなるプラズマが挙げられる。また、窒素含有
高融点金属化合物層には、TiN、WN、Ti0N、M
oN、ZrN等が挙げられる。
The plasma containing at least one of nitrogen or oxygen according to the present invention may be a plasma containing any one of nitrogen, a nitrogen-containing compound, oxygen, and an oxygen-containing compound (for example, Nt, Nz01Ox, Nt+Hz
Examples include plasma consisting of O+og (ox is preferably 1% or less from the viewpoint of barrier properties) and the like. In addition, the nitrogen-containing high melting point metal compound layer includes TiN, WN, Ti0N, M
Examples include oN, ZrN, and the like.

本発明においては、窒素含有高融点金属化合物層をその
表面に生じた自然酸化膜等を除去するためにウニシト処
理した後、前記プラズマ表面処理する場合であってもよ
い。
In the present invention, the nitrogen-containing high-melting point metal compound layer may be subjected to the plasma surface treatment after being subjected to the Unisito treatment to remove a natural oxide film or the like formed on the surface thereof.

本発明においては、前記プラズマ雰囲気中で表面処理す
る際、窒素含有高融点金属化合物層にイオンを照射する
場合であってもよく、この場合、イオン照射せずにラジ
カルのみでケミカルな表面処理を行う場合よりも更に窒
素含有高融点金属化合物層の表面状態を滑らかにするこ
とができ好ましい。これはイオンによる窒素含有高融点
金属化合物層表面のスパッタエツチングが無選択に行わ
れるためと推定される。
In the present invention, when performing the surface treatment in the plasma atmosphere, the nitrogen-containing high melting point metal compound layer may be irradiated with ions. In this case, the chemical surface treatment is performed using only radicals without ion irradiation. This is preferable because the surface condition of the nitrogen-containing high melting point metal compound layer can be made smoother than in the case where it is carried out. This is presumed to be because sputter etching of the surface of the nitrogen-containing high melting point metal compound layer by ions is performed in a non-selective manner.

本発明においては、前記表面処理後、大気雰囲気中に曝
すことなく連続的に窒素含有高融点金属化合物層上に高
融点金属層を形成する場合であってもよく、この場合、
高融点金属化合物層が酸化されないようにして高融点金
属化合物層上に酸化膜を生じないようにすることができ
、窒素含有高融点金属化合物層と高融点金属層とのコン
タクト抵抗を増加させることなく安定に窒素含有高融点
金属化合物層上に高融点金属層を形成することができる
In the present invention, after the surface treatment, the high melting point metal layer may be continuously formed on the nitrogen-containing high melting point metal compound layer without being exposed to the atmosphere, in which case,
The high melting point metal compound layer can be prevented from being oxidized to prevent an oxide film from forming on the high melting point metal compound layer, and the contact resistance between the nitrogen-containing high melting point metal compound layer and the high melting point metal layer can be increased. The high melting point metal layer can be stably formed on the nitrogen-containing high melting point metal compound layer without any problems.

〔作用] 窒素含有高融点金属化合物層となる例えばTiNは堆積
直後、あるいはアニール後においてNaC!構造を持つ
多結晶体であるが、最表面に部分的に存在するTiのダ
ングリングボンド(あるいは欠陥)には酸素等が吸着し
ていると考えられる。
[Function] For example, TiN, which becomes the nitrogen-containing high melting point metal compound layer, is deposited with NaC! immediately after deposition or after annealing. Although it is a polycrystalline material with a structure, it is thought that oxygen and the like are adsorbed to the Ti dangling bonds (or defects) that partially exist on the outermost surface.

このような欠陥に高融点金属層となるタングステンの成
長初期において核形成が集中するため、従来では高融点
金属層の表面形状が悪くなっていたと考えられる。これ
に対し、本発明のプラズマ処理を行うと、TiN表面は
一様な表面状態をもつこととなり、タングステンの核形
成が一様となり、結晶配向も揃うため、平坦な形状とな
ると考えられる。
Conventionally, it is thought that the surface shape of the high melting point metal layer deteriorates because nucleation concentrates on such defects in the early stage of growth of tungsten, which becomes the high melting point metal layer. On the other hand, when the plasma treatment of the present invention is performed, the TiN surface has a uniform surface condition, tungsten nuclei are uniformly formed, and the crystal orientation is uniform, so it is considered that the TiN surface has a flat shape.

〔実施例〕〔Example〕

第1図〜第3図は本発明に係る半導体装置の製造方法の
一実施例を説明する図であり、第1図は一実施例の製造
方法を説明する図、第2図は一実施例の製造装置を示す
概略図、第3図は一実施例の効果を説明する図である。
1 to 3 are diagrams for explaining one embodiment of the method for manufacturing a semiconductor device according to the present invention, FIG. 1 is a diagram for explaining the method for manufacturing one embodiment, and FIG. 2 is a diagram for explaining one embodiment. FIG. 3 is a diagram illustrating the effects of one embodiment.

これらの図において、1はSi等からなる基板、2はソ
ース/ドレイン等の拡散層、3は5int等からなる絶
縁膜、4は絶縁!I3に形成されたコンタクトホール、
5はTiN等からなるバリアメタル層、6はW等からな
る高融点金属層、7はSin、等からなる絶縁膜、8は
バリアメタル層5をプラズマ表面処理する表面処理室、
9はサセプタ、10はプラズマ発生用のRF電極、11
は試料を搬送室12を介して表面処理室8から成長室1
3、あるいは成長室13から表面処理室8に出し入れさ
せるためのゲートバルブである。
In these figures, 1 is a substrate made of Si or the like, 2 is a diffusion layer such as a source/drain, 3 is an insulating film made of 5int, etc., and 4 is an insulation! A contact hole formed in I3,
5 is a barrier metal layer made of TiN or the like, 6 is a high melting point metal layer made of W or the like, 7 is an insulating film made of Sin, etc., 8 is a surface treatment chamber for plasma surface treatment of the barrier metal layer 5;
9 is a susceptor, 10 is an RF electrode for plasma generation, 11
The sample is transferred from the surface treatment chamber 8 to the growth chamber 1 via the transfer chamber 12.
3, or a gate valve for allowing the growth chamber 13 to enter and exit the surface treatment chamber 8.

次に、その製造方法について説明する。Next, the manufacturing method will be explained.

まず、第1図(a)に示すように、例えばイオン注入に
より基板1にAs等の不純物を導入してn型の拡散層2
を形成し、例えばCVD法により基板1上にSin、を
堆積して膜厚が例えば6000人の絶縁膜3を形成し、
例えばRIEにより絶縁膜3を選択的にエツチングして
絶縁膜3に幅が例えば0.5μmのコンタクトホール4
を形成するとともに、コンタクトホール4内に拡散層2
が形成された基板1を露出させる。
First, as shown in FIG. 1(a), an impurity such as As is introduced into the substrate 1 by, for example, ion implantation, and an n-type diffusion layer 2 is introduced.
An insulating film 3 having a film thickness of, for example, 6000 is formed by depositing Sin on the substrate 1 by, for example, the CVD method.
For example, by selectively etching the insulating film 3 by RIE, a contact hole 4 having a width of, for example, 0.5 μm is formed in the insulating film 3.
At the same time, a diffusion layer 2 is formed in the contact hole 4.
The substrate 1 on which is formed is exposed.

次に、第1図(b)に示すように、例えばCVD法によ
りコンタクトホール4内の拡散層2とコンタクトを取る
ようにTiNを堆積して膜厚が例えば500人のバリア
メタル層5を形成した後、バリアメタル層5上に発生し
た自然酸化膜等を除去するために、フッ酸(硫酸でもよ
い)等の溶剤を用いてバリアメタル層5の表面処理を行
う。次いで、第2図に示す表面処理室8内のサセプタ9
上に試料を配置し、例えばN F sガス(10sec
m)とN、ガス(100scc+++)の混合ガスを導
入し、サセブタ9下のRF電極10にRFバイアスを印
加することによりTiNからなるバリアメタル層5表面
をプラズマ処理する(第1図(C))。
Next, as shown in FIG. 1(b), TiN is deposited by, for example, the CVD method so as to make contact with the diffusion layer 2 in the contact hole 4 to form a barrier metal layer 5 having a film thickness of, for example, 500. After that, the surface of the barrier metal layer 5 is treated using a solvent such as hydrofluoric acid (sulfuric acid may also be used) in order to remove a natural oxide film etc. generated on the barrier metal layer 5. Next, the susceptor 9 in the surface treatment chamber 8 shown in FIG.
A sample is placed on top of the sample, and for example N F s gas (10 sec
The surface of the barrier metal layer 5 made of TiN is plasma-treated by introducing a mixed gas of N, m), N, and gas (100 scc+++) and applying an RF bias to the RF electrode 10 under the susceptor 9 (FIG. 1(C)) ).

次に、バリアメタル層5表面処理後の試料を真空の搬送
室12を介して表面処理室8から成長室13に移送し、
例えばCVD法によりバリアメタル層5上にWを堆積し
て膜厚が例えば300nmの高融点金属層6を形成する
。ここでのWの成膜条件はWF−ガス10105c、S
 I Haガス5 scc■、Hzガス200secm
、圧力200mTorr、成長温度400℃である。
Next, the sample after the surface treatment of the barrier metal layer 5 is transferred from the surface treatment chamber 8 to the growth chamber 13 via the vacuum transfer chamber 12,
For example, W is deposited on the barrier metal layer 5 by a CVD method to form a high melting point metal layer 6 having a film thickness of, for example, 300 nm. The W film forming conditions here are WF-gas 10105c, S
I Ha gas 5 scc■, Hz gas 200sec
, the pressure was 200 mTorr, and the growth temperature was 400°C.

そして、第1図(d)に示すような拡散層2とコンタク
トされるバリアメタル層5、高融点金属層6からなる配
線層を得ることができる。なお、ここでのバリアメタル
層5は基板1のStと高融点金属層6のWとの熱拡散に
よる反応を防止する機能を有する他、基板1と高融点金
属層6との接着を強固に行うための接着層としての機能
を有している。
Then, a wiring layer consisting of a barrier metal layer 5 and a high melting point metal layer 6 which are in contact with the diffusion layer 2 can be obtained as shown in FIG. 1(d). The barrier metal layer 5 here has a function of preventing the reaction between St of the substrate 1 and W of the high melting point metal layer 6 due to thermal diffusion, and also has the function of strongly adhering the substrate 1 and the high melting point metal layer 6. It has a function as an adhesive layer for this purpose.

すなわち、従来のバリアメタル層5を薬品処理のみした
後高融点金属層6を形成する場合では高融点金属層6の
反射率がArに対し43%(可視光線λ= 400n園
)と表面形状が荒れていたのに対し、本発明の上記実施
例では、高融点金属層6の反射率がA2に対し51%と
表面形状が従来例よりも滑らかであることが判った。し
たがって、高融点金属層36を従来よりもカバレッジ良
く形成することができ、配線の多層化、平坦化をより一
層実現することができる。
That is, in the case where the high melting point metal layer 6 is formed after the conventional barrier metal layer 5 is treated only with chemicals, the reflectance of the high melting point metal layer 6 is 43% with respect to Ar (visible light λ = 400 nm) and the surface shape is In contrast, in the above example of the present invention, the reflectance of the high melting point metal layer 6 was 51% of that of A2, and the surface shape was found to be smoother than that of the conventional example. Therefore, it is possible to form the high melting point metal layer 36 with better coverage than in the past, and it is possible to further realize multilayer wiring and planarization.

また、第3図に示すように、表面処理をしない場合(比
較例1)、HF処理した場合(比較例2)及びArスパ
ッタ処理した場合(比較例3)では高融点金属層6の反
射率が全て低く表面形状が荒れていたのに対し、N2処
理した場合(本発明1)、NFs処理した場合(本発明
2)、NF3 +Nt(ラジカルのみ)処理した場合(
本発明3)及びNFs +Nz  (イオン照射)処理
した場合(本発明4)は反射率が比較例よりも全て高く
なっており表面形状が滑らかになっていることが判った
In addition, as shown in FIG. 3, the reflectance of the high melting point metal layer 6 was found to be were all low and the surface shape was rough, but when N2 treatment was applied (invention 1), NFs treatment (invention 2), and NF3 +Nt (radical only) treatment (
It was found that in Invention 3) and in the case of NFs + Nz (ion irradiation) treatment (Invention 4), the reflectance was higher than that of the comparative example, and the surface shape was smooth.

また、本発明4のイオン照射した場合は本発明3のラジ
カル処理した場合よりも高融点金属層6の反射率を高く
することができ、表面形状を滑らかにすることができ好
ましいことが判った。
In addition, it was found that the ion irradiation according to the present invention 4 is preferable because it is possible to increase the reflectance of the high melting point metal layer 6 and make the surface shape smoother than when the radical treatment according to the present invention 3 is applied. .

なお、本発明3、本発明4の表面処理条件は以下の通り
である。
In addition, the surface treatment conditions of the present invention 3 and the present invention 4 are as follows.

(本発明3) (トライオード型):10W、 13.56M七基板基
板バイアスはかか らない、N F 310sccm。
(Invention 3) (Triode type): 10W, 13.56M7 substrate, no substrate bias, N F 310sccm.

r’h 101005c 。r’h 101005c.

圧力40mTorr、処理時間60秒。Pressure: 40 mTorr, processing time: 60 seconds.

(本発明4) (平行平板型):20W、13.56MHz基板バイア
スは約1.3kV。
(Invention 4) (Parallel plate type): 20W, 13.56MHz substrate bias is approximately 1.3kV.

N F 310105c、 NzNz1005c。NF 310105c, NzNz1005c.

圧力40mTorr、処理時間60秒。Pressure: 40 mTorr, processing time: 60 seconds.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、バリアメタル層上に高融点金属層を形
成する際、高融点金属層を表面形状の荒れを生じないよ
うに滑らかに、かつカバレンジ良く形成することができ
るという効果がある。
According to the present invention, when forming a high melting point metal layer on a barrier metal layer, there is an effect that the high melting point metal layer can be formed smoothly without causing roughness in the surface shape and with good coverage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第3図は本発明に係る半導体装置の製造方法の
一実施例を説明する図であり、第1図は一実施例の製造
方法を説明する図、第2図は一実施例の製造装置を示す
概略図、第3図は一実施例の効果を説明する図、第4図
は従来例の製造方法を説明する図である。 5・・・・・・バリアメタル層、 6・・・・・・高融点金属層。 ″V更宅−/ 5:パリアメタル層 一実施例の製造方法を説明する図 第 図 N含有プラズマ 6:高融点金属層 一実施例の製造方法を説明する図 第 図 前処ml HF処理 r N。 NF。 NF3+Nよ NF1+Nl なし 一実施例の効果を説明する図 第 図
1 to 3 are diagrams for explaining one embodiment of the method for manufacturing a semiconductor device according to the present invention, FIG. 1 is a diagram for explaining the method for manufacturing one embodiment, and FIG. 2 is a diagram for explaining one embodiment. FIG. 3 is a diagram illustrating the effects of one embodiment, and FIG. 4 is a diagram illustrating a conventional manufacturing method. 5...Barrier metal layer, 6...High melting point metal layer. 5: Diagram explaining the manufacturing method of the pariah metal layer 1 Figure N-containing plasma 6: Diagram explaining the manufacturing method of the high melting point metal layer 1 Example Pretreatment ml HF treatment r N NF. NF3+N NF1+Nl Diagram explaining the effect of one embodiment

Claims (4)

【特許請求の範囲】[Claims] (1)窒素または酸素を少なくともいずれか1つを含む
プラズマ雰囲気中で窒素含有高融点金属化合物層(5)
を表面処理する工程を含むことを特徴とする半導体装置
の製造方法。
(1) Nitrogen-containing high melting point metal compound layer (5) in a plasma atmosphere containing at least one of nitrogen or oxygen
1. A method for manufacturing a semiconductor device, comprising the step of surface treating.
(2)前記プラズマ雰囲気中で表面処理する際、前記窒
素含有高融点金属化合物層(5)にイオンを照射するこ
とを特徴とする請求項1記載の半導体装置の製造方法。
(2) The method for manufacturing a semiconductor device according to claim 1, wherein the nitrogen-containing high-melting point metal compound layer (5) is irradiated with ions during the surface treatment in the plasma atmosphere.
(3)前記窒素含有高融点金属化合物層(5)をウェッ
ト処理した後、前記プラズマ表面処理することを特徴と
する請求項1記載の半導体装置の製造方法。
(3) The method for manufacturing a semiconductor device according to claim 1, wherein the nitrogen-containing high melting point metal compound layer (5) is wet-treated and then subjected to the plasma surface treatment.
(4)前記プラズマ表面処理後、大気雰囲気中に曝すこ
となく連続的に前記窒素含有高融点金属化合物層(5)
上に高融点金属層(6)を形成することを特徴とする請
求項1記載の半導体装置の製造方法。
(4) After the plasma surface treatment, the nitrogen-containing high melting point metal compound layer (5) is continuously applied without being exposed to the atmosphere.
2. The method of manufacturing a semiconductor device according to claim 1, further comprising forming a high melting point metal layer (6) thereon.
JP21783390A 1990-08-18 1990-08-18 Manufacture of semiconductor device Pending JPH04100221A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21783390A JPH04100221A (en) 1990-08-18 1990-08-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21783390A JPH04100221A (en) 1990-08-18 1990-08-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH04100221A true JPH04100221A (en) 1992-04-02

Family

ID=16710465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21783390A Pending JPH04100221A (en) 1990-08-18 1990-08-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH04100221A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0711846A1 (en) * 1994-11-14 1996-05-15 Applied Materials, Inc. Titanium nitride deposited by chemical vapor deposition
EP0720214A2 (en) * 1994-12-30 1996-07-03 Applied Materials, Inc. Method of treating metal nitride films to reduce silicon migration therein
WO1996039548A1 (en) * 1995-06-05 1996-12-12 Materials Research Corporation Process for plasma enhanced anneal of titanium nitride
US5989652A (en) * 1997-01-31 1999-11-23 Tokyo Electron Limited Method of low temperature plasma enhanced chemical vapor deposition of tin film over titanium for use in via level applications
KR100250730B1 (en) * 1996-12-28 2000-05-01 김영환 Process for fabricating barrier metal layer of semiconductor device
US6251758B1 (en) 1994-11-14 2001-06-26 Applied Materials, Inc. Construction of a film on a semiconductor wafer
US6274058B1 (en) 1997-07-11 2001-08-14 Applied Materials, Inc. Remote plasma cleaning method for processing chambers
US6699530B2 (en) 1995-07-06 2004-03-02 Applied Materials, Inc. Method for constructing a film on a semiconductor wafer

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0711846A1 (en) * 1994-11-14 1996-05-15 Applied Materials, Inc. Titanium nitride deposited by chemical vapor deposition
US6251758B1 (en) 1994-11-14 2001-06-26 Applied Materials, Inc. Construction of a film on a semiconductor wafer
US6500742B1 (en) 1994-11-14 2002-12-31 Applied Materials, Inc. Construction of a film on a semiconductor wafer
EP0720214A2 (en) * 1994-12-30 1996-07-03 Applied Materials, Inc. Method of treating metal nitride films to reduce silicon migration therein
EP0720214A3 (en) * 1994-12-30 1997-10-08 Applied Materials Inc Method of treating metal nitride films to reduce silicon migration therein
WO1996039548A1 (en) * 1995-06-05 1996-12-12 Materials Research Corporation Process for plasma enhanced anneal of titanium nitride
US6699530B2 (en) 1995-07-06 2004-03-02 Applied Materials, Inc. Method for constructing a film on a semiconductor wafer
KR100250730B1 (en) * 1996-12-28 2000-05-01 김영환 Process for fabricating barrier metal layer of semiconductor device
US5989652A (en) * 1997-01-31 1999-11-23 Tokyo Electron Limited Method of low temperature plasma enhanced chemical vapor deposition of tin film over titanium for use in via level applications
US6274058B1 (en) 1997-07-11 2001-08-14 Applied Materials, Inc. Remote plasma cleaning method for processing chambers

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