JPH0396016A - A/d conversion circuit - Google Patents

Abstract

PURPOSE:To suppress noise by using an integration value of multiplex sampling divided by the number of times of samplings or a difference of two integrated values of multiplex sampling in an A/D converter circuit used for the digital recording technology in a compact disk or the like. CONSTITUTION:An analog input signal In is sampled at a sampling circuit by using a pulse generated from a pulse generating circuit 17. The sampling signal is sent to an integration device 12 and added. The integration value of the integration device 12 is gradually increased while plural number of times of sampling are repeated and when the integration value reaches a reference value Ref, a switch 14 is operated and an output of the integration device is fed to a divider 15. The integration value is divided at the divider by using a counted value of a counter 16.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an A-D conversion circuit, and in particular to an A-D conversion circuit used in digital recording technology for compact discs and the like.
It is related to a D conversion circuit.

[Prior Art] Digital recording in audio products is generally performed through the various steps shown in the flowchart of Figure 6. That is, the acoustic signal is sampled at regular intervals (for example, 44,700 times per second), the signal level at that time is measured, this measured value is then divided into stages (quantization), and then this stage division is performed. It is coded as “1” or “0” depending on the value.

As shown in FIG. 7, signal extraction in the prior art involves sampling intervals S1, which are repeated at regular intervals;
This was done by sampling the audio signal Sig once each in S2, . . . . [Problems to be Solved by the Invention] According to digital storage technology, there is no room for noise to enter after the signal is digitized, so S/
It becomes possible to reproduce the original signal while keeping N high. However, the conventional sampling techniques described above do not take any measures against noise contained in the signal to be sampled. Therefore, when the original sound in the signal to be sampled is small and is equal to or smaller than noise, the conventional technology causes a significant deterioration in sound quality. [Means for Solving the Problems] The A/D conversion circuit of the present invention is configured to perform multiple sampling in a sampling period of a certain period of time that is repeated at certain intervals. Then, as the output value of the sampling circuit, a value obtained by dividing the integrated value of multiple sampling by the number of sampling times of multiple sampling, or a difference between two added values of multiple sampling is used.
[Effect] When the same original sound including noise is multiple-added, Equation (1) holds because the noise has randomness. 'xrm
v I + (m n + ...
11) Here, FI: Signal containing noise and original sound at arbitrary sampling time m: Number of multiple additions 1: Original sound component not containing noise n1: Noise signal.

What should be noted here is that while the original sound component is multiplied by m times by m multiple additions, the random noise component increases by r times. In order to obtain the original sound from the signal obtained using equation (1), equation (1) is divided by the number of multiple additions m. F + /m= v + + (Fi/m > n +
-(2Here, if m is made sufficiently large, the second term on the right side of the equation (2J) approaches O infinitely.

Alternatively, the difference between two adjacent integrated values is taken to find the original sound.

F1+I Fl = v, + (F]1T blue--(m > n
+ − − (In Equation 31 (3), the second term on the right side decreases as m increases. In other words, by performing multiple sampling on the same signal and performing the processing shown in Equations (■) to (3), Noise can be suppressed.

[Example] Next, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a sampling circuit in one embodiment of the present invention. As shown in the figure, in this embodiment, in a certain sampling period, the analog input signal In is sampled by the sampling circuit using pulses generated by the pulse generation circuit 17. This sampling signal is sent to an integrator 12 and added there. The output of the integrator is compared with a reference value Ref in a comparator l3,
If the integrated value of the integrator 12 does not exceed the reference value Ref, 1 is added to the count value of the counter 16 and a signal is sent to the pulse generating circuit to perform sampling again.
As the sampling is repeated multiple times in this way, the integrated value of the integrator 12 gradually increases, and at a certain point the reference value Ref
Exceeds. Then, the switch 14 operates and the output of the integrator is sent to the divider 15. The integrated value is counter 1 here.
It is output as 6 Cow Out. At this point, the counter 16 and integrator 12 are reset and wait for the start of the next sampling period. Here, the reason for preventing the output of the integrator 12 from becoming larger than a certain level is that if the original sound Vl is sufficiently large, as the number of integrations m increases, mVl will become extremely large, exceeding the capacity of the circuit that handles this signal. This is because Generally, when the original sound Vl is large, the proportion of the noise n1 in the signal decreases, so setting a limit on the number of additions as described above is meaningful from the standpoint of efficient use of the circuit. In addition, in the circuit shown in FIG. 1, when the input analog signal is at a low level, the switch 14 is operated when the number of additions m reaches a certain value (when it exceeds the sampling period St). The output signal Out is output from the circuit.

FIG. 2 is a diagram showing the sampling situation according to the embodiment of FIG. 1, in which sampling is performed in sampling intervals S2 and m3 times. Here, assuming that the signal Sig gradually increases in each sampling period, the number of samplings has the following relationship: ml > m2 > ms.

FIG. 3 shows the number of additions, the integrated original sound level Vl (=mv.), and the noise level Nl according to the embodiment shown in FIG.
(=r1n+), and as is clear from the figure, as the number of additions increases, V + /
NI gradually increases. FIG. 4 is a block diagram showing another embodiment of the present invention. In this embodiment, the integrated output F1+1 of the integrator 12 is input to one differentiator, where the hold value of the hold circuit 18 that stores the integrated value F up to the previous time is subtracted. The difference signal from the differentiator 19 is input to the switch 14. As in the previous embodiment, when the output of the integrator 12 exceeds a certain level or when the count value of the counter 16 reaches a certain value, the output signal Out is outputted via the switch 14. FIG. 5 is a diagram showing the relationship between the signal level and the number of additions in the embodiment of FIG. 4. The integrated signal F+ is the output of the integrator 12, which is the integrated original sound level V
It is the sum of I and the cumulative noise level N+. As is clear from the figure, as the number of additions increases, N1+4Nl decreases.

In addition, although the above embodiment describes an audio product, the present invention is not limited to this, and may be applied to other A-D products.
It is also used in conversion circuits. [Effects of the Invention] As explained above, the present invention samples the same signal multiple times during one sampling period in the sampling circuit of the A-D conversion circuit. It is possible to significantly reduce the noise components present in the signal. Therefore, according to the present invention, in an audio product such as a compact disc,
It is possible to prevent the introduction of noise components during analog-to-digital signal conversion, which was the only problem that could not be overcome with conventional methods, and the fidelity of audio products can be dramatically improved.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing one embodiment of the present invention, Figs. 2 and 3 are diagrams explaining its operation, Fig. 4 is a block diagram showing another embodiment of the invention, and Fig. 5 is its operation. Explanatory diagram, No. 6
The figure is a flowchart showing the functions of the A-D conversion circuit, and FIG. 7 is a diagram explaining the operation of the conventional example.

Claims (1)

[Claims] In an A-D converter circuit that samples an analog signal containing random noise in a sampling period of a fixed time that is repeated at fixed time intervals, and converts the sampled value into a digital signal, the sampling converts the analog signal containing random noise into the digital signal. 1. An A-D conversion circuit characterized in that it is performed by sampling multiple times within a certain period of time.