JPH0395827A - Semiconductor electron emitting element - Google Patents

Abstract

PURPOSE:To easily attain stable electron emission characteristics by providing one or a plurality of P<+> regions and a ring-like N<+> region formed to surround the P<+> regions under a Schottky barrier electrode in a P-type semiconductor layer. CONSTITUTION:One or a plurality of P<+> regions 5 and a ring-like N<+> region 3 formed to surround the P<+> regions are provided under a Schottky barrier electrode 6 in a P-type semiconductor layer 4. Since the N<+> region 3 is provided in the vicinity of an interface with a low work function material in the P-type semiconductor base 1, a depletion layer 2 is generated at a PN<+> interface. Therefore a transfer path of electrons injected from the P<+> layer to the P layer is limited by the depletion layer 2 generated at the PN<+> interface so that they are concentrated on the P<+> layer provided at an electron emitting part resulting in easy increase of current density.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor electron-emitting device.

[Conventional technology] Among conventional semiconductor electron-emitting devices, one using avalanche amplification is disclosed in, for example, U.S. Pat. No. 4,259,678.
and US Pat. No. 4,303,930.

This semiconductor electron-emitting device forms a P-type semiconductor layer and an N-type semiconductor layer on a semiconductor substrate, and deposits cesium or the like on the surface of the N-type semiconductor layer to reduce the work function of the surface. A reverse bias voltage is applied to both ends of a diode formed by a P-type semiconductor layer and an N-type semiconductor layer to cause avalanche amplification, thereby making the electrons hot and sending them from the electron-emitting region to the semiconductor substrate. It emits electrons in a direction perpendicular to the surface.

[Problems to be Solved by the Invention] However, the conventional semiconductor electron-emitting device described above has the following drawbacks because cesium, which is used to form the electron-emitting portion, is a chemically extremely active element. there were.

■Ultra-high vacuum (1o -10Tor) for stable operation
r or more).

■Life span, efficiency, etc. strongly depend on the degree of vacuum.

■The device must not be exposed to the atmosphere.

Furthermore, in conventional semiconductor electron-emitting devices, the structure is such that electrons that have gained high energy through avalanche amplification pass through the N-type semiconductor layer and reach the surface of the electron-emitting region. There was also the drawback that it was lost due to lattice scattering within the layer. In order to suppress this energy loss, it is necessary to make the N-type semiconductor layer extremely thin (less than 200 layers), but it is difficult to fabricate such an extremely thin N-type semiconductor layer with uniformity, high concentration, and low defects. Therefore, there was a problem in that it was difficult to stably manufacture the device.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems and provide a substrate cross-sectional emission type electron-emitting device that can easily achieve stable electron-emitting characteristics.

[A thousand steps to solve the problem] The gist of the present invention is to have a P-type semiconductor layer formed on a semiconductor substrate, a Schottky barrier electrode on the P-type semiconductor layer, and a P-type semiconductor layer formed on the P-type semiconductor layer. A semiconductor electron-emitting device is characterized in that it has one or more P1 regions under the Schottky barrier electrode in the semiconductor device and a ring-shaped N+ region formed surrounding the P0 region.

[Function] The semiconductor electron-emitting device of the present invention uses a material for lowering the work function of the surface of the electron-emitting part (hereinafter referred to as a low-work function material).
Since the doped region is used as a Schottky electrode for the P-type semiconductor, an electron emitting region can also be formed in the cross-sectional direction of the semiconductor substrate, and multiple electron emitting regions can be formed in the same device. .

In addition, since we used an element that is extremely stable even in the atmosphere as a low work function material, we do not need an ultra-high vacuum to achieve stable operation, and the lifespan and efficiency do not strongly depend on the degree of vacuum. It is also possible to expose it to the atmosphere.

Conventionally invented semiconductor electron-emitting devices use a PN junction, so there is a lot of energy loss within the N-type layer.
Materials with extremely low work functions had to be used. Therefore, in practice, only cesium and the like have been used. On the other hand, in the present invention, since a Schottky junction is used, the energy loss is smaller than in the conventional example.
,GdBsWSi2,TiSi,,ZrSiz,Gf
Si2 etc. can be used. Examples of low work function materials that can be used in the present invention include IA, 2A, 3A group and lanthanoid metals, and IA. There are 2A, 3A group and lanthanoid silicides, borides, carbides, etc. Specifically, Tic. ZrC, HfC, LaBa. SmBa
, GdBsWSi2. TiSi2, ZrSi2,
GfSi2 etc. can be used.

Furthermore, unlike conventional semiconductor electron-emitting devices, the structure is not such that electrons that have gained high energy through avalanche amplification pass through the N-type semiconductor layer and reach the surface of the electron-emitting region, so the N-type semiconductor layer is extremely thin. < (200 people or less) There are no manufacturing difficulties such as the need to form a semiconductor electron-emitting device, and therefore a semiconductor electron-emitting device can be stably manufactured.

Hereinafter, the present invention will be explained in detail using FIG. 1 and FIG. 2.

FIG. 1 is a diagram for explaining the operating principle of the semiconductor electron-emitting device of the present invention, and is a conceptual diagram showing an example of the configuration of the semiconductor electron-emitting device of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a depletion layer region, 3 is an n" region, 4 is a P-type semiconductor layer,
5 is a P3 region, 6 is a Schottky electrode, 8 is an n-type ohmic electrode, and 9 is a P-type ohmic electrode.

In addition, examples of semiconductor materials used in the electron-emitting device of the invention include St, Ge, GaAs, GaP, and Afl.
As. GaAsP, AJ2GaAs, SiC. Although there are BP and the like, any material may be used as long as it can form a P-type semiconductor, and particularly indirect transition type materials with a large band gap are suitable.

Furthermore, FIG. 2 is a conceptual diagram showing energy bands near the surface of the semiconductor electron-emitting device of the present invention.

First, the electron emission process in the semiconductor electron-emitting device of the present invention will be explained using FIG.

By applying a reverse bias to a Schottky diode made of a P-type semiconductor and a low work function material, the bottom EC of the conduction band of the P-type semiconductor is brought to the vacuum level E of the Schottky electrode.
The energy level is higher than VAC. Electrons generated by avalanche amplification gain energy higher than the lattice temperature due to the electric field in the depletion layer generated at the semiconductor-metal electrode interface, and are injected into the Schottky electrode made of a low work function material. Electrons that do not lose energy due to lattice scattering or the like and have energy greater than the work function of the Schottky electrode surface are emitted into vacuum from the Schottky electrode surface (ie, the electron emitting part).

In the semiconductor discharge device of the present invention, as shown in FIG.
N1 near the interface with the low work function material in the P-type semiconductor substrate
Since the region is provided, a depletion layer is generated at the PN" interface. Therefore, the movement path of electrons injected from the P4 layer to the P layer is limited by the depletion layer created at the PN+ interface, and Since it is concentrated in a region, it is easy to increase the current density.

In addition, in the semiconductor discharge device of the present invention, in the device manufacturing process, the P4 region and the N3 region, which become electron emitting regions,
It can be formed from the semiconductor surface by ion implantation, etc.
A plurality of electron emitting parts can be formed at arbitrary positions on the same plane of the same substrate.

Furthermore, since desired semiconductor layers can be sequentially deposited on the surface of the semiconductor substrate by, for example, the MBE (molecular beam epitaxial) method, it is easy to fabricate a device in which electron-emitting parts are stacked. A plurality of electron emitting parts can be formed in a direction perpendicular to the substrate surface.

Further, according to the present invention, the positions of each of the plurality of 23 regions provided in the P-type semiconductor layer can be arbitrarily determined, so that the emitted electron beam can be shaped into a desired shape.

[Example 1] FIG. 3 is a schematic diagram showing a GaAs semiconductor electron-emitting device according to an example of the present invention, FIG. 3(a) is a plan view, and FIG. 3(b) is a plan view. is a sectional view taken along the line AA in FIG. 3(a). In the figure, +01 is a P"Si substrate, 102 is a single layer of P, 103 is a ring-shaped N+ region, and 104 is a dot-shaped P3
105 is an insulating film, 106 and 107 are ohmic electrodes, and 108 is a Schottky electrode.

The manufacturing process of the semiconductor discharge device shown in FIG. 3 will be described below.

■ On the As-doped P''Si substrate 101 with an impurity concentration of 1 x 1019 am-3, CVD (chemical vapor deposition) 7 or LPE (? & phase epitaxial growth) 7 is deposited.
P layer 102 with A s /Q degree of 3X10”
grew.

■Next, using normal photolithography technology, 10
3, 104 openings are provided, and a ring-shaped N″″ area 103 is provided.
In the dotted P0 region 104, B' ions were implanted at an impurity concentration of 1×10"cm-3, and As"" ions were implanted at an impurity concentration of IXIO"cm-' in the dotted P0 region 104. It was activated by annealing.

(2) Thereafter, Sin was vacuum-deposited as an absolute material on the surface, and openings were formed by photolithography.

(2) On the ring-shaped N2 region 103 and on the back surface of the substrate, 82 was vacuum-deposited, respectively, to form ohmic electrodes 106 and 107.

■Furthermore, as a material that becomes Schottky't&108, for example, Ga (φ0 = 3.1 eV), which is a low work function material, is vacuum-deposited by 100 people, and GaSi2 is formed by heat treatment at 350°C for 10 minutes, and a point-like P0 region is formed. 104 and a high quality Schottky junction was formed.

In the semiconductor electron-emitting device produced as described above,
When a reverse bias is applied to the Schottky fault diode 108, the Schottky electrode 108 and the dotted P'' region 1
At the interface with GaSi, avalanche amplification occurred and high energy electrons were emitted from the GaSi surface.

As explained above, according to this embodiment, since the P+ region for concentrating the electric field and limiting the electron emission region is formed, electron emission occurs along the point, so that the point-like P+ region is formed. It has become possible to freely set the distribution of electron emission within one device by adjusting the arrangement of the regions and the size of the P0 region. Furthermore, since the electron-emitting device uses a conventional semiconductor manufacturing process, it is easy to miniaturize a single device and make it multi-device.

(Example 2) FIG. 4 is a schematic diagram showing a GaAs semiconductor electron-emitting device according to a second example of the present invention, FIG. 4(a) is a plan view, and FIG. 4(b) is a fourth FIG. 3 is a cross-sectional view taken along the line A-A in FIG. In the figure, 401 is a PSi substrate, 40
2 is a P layer, 403 is a ring-shaped N region, 404 is a dotted P+ region, 405 is an insulating film, 408 and 407 are ohmic electrodes, and 408 is a Schottky electrode.

The manufacturing process of the semiconductor discharge device shown in FIG. 4 will be described below.

■ P- with an impurity concentration of 5 x 1018 cm-' - P- with an impurity concentration of 1 x 10 I6 cm-' is deposited on the GaAs substrate 401 by the MBE (molecular beam epitaxial) method or the MO-CVD (metal-organic chemical vapor deposition) method.
- GaAs layer 402 was grown epitaxially. The P-type impurity used at this time was Be.

(2) Si'' was ion-implanted into the ring-shaped N0 region 403 at an accelerating voltage of 1 60 keV, and Be'' was ion-implanted into the dot-like P0 region 404 at an accelerating voltage of 40 keV using FIB (focused ion beam) without a mask.

■Subsequently, St○2 is vacuum-deposited on both sides of the substrate 401,
The implanted impurities were activated by annealing at 850° C. for 3 minutes.

■Next, after peeling off the entire surface of the Sin on the back side of the substrate, only the inside of the ring-shaped N3 region on the front side is etched, and the insulating film 405 is etched.
It was. ■Next, the back side of the P0 substrate 401 and the P--GaAs
In the n+ region of the layer 402, Au-Zn alloy and Au
-Ge alloy was vacuum-deposited, the Au-Ge alloy film on the surface was patterned, and then heat treated at 400°C for 3 minutes to form open electrodes 406 and 407, respectively.

■Finally, LaB is a low work function material that forms a high-quality Schottky junction for holes in GaAs. (φwy42.6
eV) was subjected to electron beam evaporation to form a Schottky electrode.

The semiconductor electron-emitting device prepared in this way was 2xlO
When placed in a vacuum chamber maintained at −' Torr and applying a reverse bias of 7 V, electron emission of approximately 1 nA was observed.

[Effects of the Invention] As explained above, according to the electron-emitting device of the present invention, the electron-emitting portion can be arbitrarily limited, and further,
A plurality of electron emitting parts can be simultaneously formed on the same substrate.

Further, according to the electron-emitting device of the present invention, it is possible to emit electrons in a direction perpendicular to the cross section of the sample, and furthermore, by providing the electron-emitting cross section in a plurality of different directions, it is possible to emit electrons in a direction perpendicular to the cross section of the sample. It is possible to emit electrons independently.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining the operating principle of the semiconductor electron-emitting device of the present invention, and FIG. 2 is a conceptual diagram showing the energy band near the surface of the semiconductor electron-emitting device of the present invention. FIG. 3 is a schematic diagram showing a GaAs semiconductor electron-emitting device according to an embodiment of the present invention, and FIG. 4 is a schematic diagram showing a GaAs semiconductor electron-emitting device according to a second embodiment of the present invention. . 1... Semiconductor substrate, 2... Depletion layer region, 3... n
+ region, 4... P-type semiconductor layer, 5... P0 region, 6
... Cicotte key electrode, 8... N-type ohmic electrode, 9... P-type ohmic electrode, 101... P"Si
Substrate, 102... P single layer, 103... Ring-shaped N area, 104... Dotted P area, 105... Insulating film, 106, 107... Ohmic electrode, 108...
Schottky electrode. 401...P"Si substrate, 402
... P layer, 403 ... Ring-shaped N0 region, 404
... point-like P+ region, 405 ... insulating film, 406,4
07...Ohmic electrode, 40B...Schottky electrode. Figure 3 (a) Figure (a) Figure (b)

Claims (2)

[Claims] (1) having a P-type semiconductor layer formed on a semiconductor substrate,
A Schottky barrier electrode is provided on the P-type semiconductor layer;
A semiconductor electron emission device characterized by having one or more P^+ regions under the Schottky barrier electrode in a type semiconductor layer and a ring-shaped N^+ region formed surrounding the P^+ regions. element. (2) Schottky barrier electrode is Ga or LaB_6
2. The semiconductor electron-emitting device according to claim 1, wherein the semiconductor electron-emitting device is formed by: