JPH039330Y2 - - Google Patents

Info

Publication number
JPH039330Y2
JPH039330Y2 JP1986168764U JP16876486U JPH039330Y2 JP H039330 Y2 JPH039330 Y2 JP H039330Y2 JP 1986168764 U JP1986168764 U JP 1986168764U JP 16876486 U JP16876486 U JP 16876486U JP H039330 Y2 JPH039330 Y2 JP H039330Y2
Authority
JP
Japan
Prior art keywords
plating
semiconductor wafer
wafer
plated
liquid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986168764U
Other languages
Japanese (ja)
Other versions
JPS6373939U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986168764U priority Critical patent/JPH039330Y2/ja
Publication of JPS6373939U publication Critical patent/JPS6373939U/ja
Application granted granted Critical
Publication of JPH039330Y2 publication Critical patent/JPH039330Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Electrodes Of Semiconductors (AREA)

Description

【考案の詳細な説明】 産業上の利用分野 この考案は半導体製造装置で、詳しくは半導体
ウエーハにバンプ電極を形成する噴流式メツキ装
置に関する。
[Detailed Description of the Invention] Industrial Field of Application This invention relates to a semiconductor manufacturing device, and more particularly to a jet plating device for forming bump electrodes on a semiconductor wafer.

従来の技術 例えばDHDダイオードはバンプ電極を有する
ダイオード素子をその電極を介して2本のスラグ
リードで挾持してガラス封止した構造を有し、前
記ダイオード素子のバンプ電極はスラグリードと
の電気的接触を安定させる等の目的でAgを50〜
60μm程度の高さにメツキして形成される。この
ようなバンプ電極のメツキはダイオード素子を多
数形成した半導体ウエーハに対して行われ、その
メツキ法は浸漬式と噴流式に大別される。
Conventional technology For example, a DHD diode has a structure in which a diode element having a bump electrode is sandwiched between two slag leads via the electrodes and sealed with glass, and the bump electrode of the diode element is electrically connected to the slag lead. Ag is added to 50~ for the purpose of stabilizing contact etc.
It is formed by plating to a height of about 60 μm. Such bump electrode plating is performed on a semiconductor wafer on which a large number of diode elements are formed, and the plating methods are roughly divided into immersion method and jet method.

浸漬式は半導体ウエーハの非メツキ面にワツク
スを塗布してこの半導体ウエーハをメツキ用電極
板と共にメツキ液に対向して浸漬し、半導体ウエ
ーハと電極板間にぬメツキ電圧を付与してメツキ
する方法であるが、この方法はメツキ前にワツク
スを塗布したりメツキ後に半導体ウエーハに塗布
されたワツクスを除去する必要があり、そこで最
近は噴流式のメツキ法が主流を占めている。
The immersion method is a method in which wax is applied to the non-plated surface of a semiconductor wafer, the semiconductor wafer is immersed together with a plating electrode plate in a plating solution, and a plating voltage is applied between the semiconductor wafer and the electrode plate to perform plating. However, this method requires the application of wax before plating and the removal of the wax applied to the semiconductor wafer after plating, so jet plating methods have recently become mainstream.

上記噴流式のメツキ装置の従来例を第2図を参
照して以下説明すると、1は垂設されたメツキ筒
で、開口上端面に等間隔で複数の絶縁性支持ピン
2,2…が突設される。3はメツキ筒1を囲うカ
バー、4はメツキ筒1内に設置されたメツシユ状
の下部電極である。5は支持ピン2,2…にて被
メツキ面を下にして保持された半導体ウエーハ
(以下ウエーハと称する)、6はウエーハ5の上面
に接触する上部電極である。7はメツキ筒1の下
部より下部電極4を通過して上昇しウエーハ5の
下面を中央から周辺部に沿つて噴流するAg成分
を含むメツキ液で、メツキ筒1の開口上端をオー
バーフローしてカバー3内に流下しそして貯液槽
8に貯溜してポンプ9にて再びメツキ筒1の下部
に供給される経路で循環する。
A conventional example of the above-mentioned jet plating device will be described below with reference to FIG. 2. Reference numeral 1 denotes a vertically installed plating cylinder, and a plurality of insulating support pins 2, 2, . . . protrude at equal intervals from the upper end surface of the opening. will be established. 3 is a cover surrounding the plating tube 1; 4 is a mesh-shaped lower electrode installed inside the plating tube 1; 5 is a semiconductor wafer (hereinafter referred to as a wafer) held with the surface to be plated downward by support pins 2, 2, . . . , and 6 is an upper electrode that contacts the upper surface of the wafer 5. 7 is a plating liquid containing an Ag component that rises from the bottom of the plating tube 1 through the lower electrode 4 and jets from the center to the periphery of the lower surface of the wafer 5, overflowing the upper end of the opening of the plating tube 1 and covering it. The liquid flows down into the plating cylinder 1, is stored in the liquid storage tank 8, and is circulated through a route where it is supplied again to the lower part of the plating cylinder 1 by the pump 9.

ウエーハ5は例えば第3図及び第4図に示すよ
うにP型アノードタイプのダイオード素子(以下
素子と称する)10,10を多数格子状配列で有
するもので、11は共通の裏面電極、12は表面
に形成された絶縁膜、13,13…は絶縁膜12
に選択的に形成した窓孔で、この窓孔13,13
…にAu蒸着膜14,14…を先に形成してから
上記メツキ装置でもつてAgのバンプ電極15,
15…が次の要領で形成される。
For example, as shown in FIGS. 3 and 4, the wafer 5 has a large number of P-type anode type diode elements (hereinafter referred to as elements) 10, 10 arranged in a lattice pattern, in which 11 is a common back electrode, and 12 is a common back electrode. Insulating films formed on the surface, 13, 13... are insulating films 12
This window hole is selectively formed in the window hole 13, 13.
After first forming the Au vapor deposited films 14, 14... on the above plating device, the Ag bump electrodes 15,
15... are formed in the following manner.

即ち、第2図に示すようにウエーハ5を裏面電
極11を上にしてメツキ筒1の支持ピン2,2…
上に位置決め載置し、裏面電極11上を上部電極
6で押圧して電気的に接触させておく。この状態
でメツキ筒1からメツキ液7を噴出させると共
に、下部電極4にプラス、上部電極6にマイナス
のメツキ電圧を印加すると、メツキ液7からウエ
ーハ5に順方向のメツキ電流が流れてメツキ液7
のAg成分がウエーハ5の下面にあるAu蒸着膜1
4,14…上にメツキされ、バンプ電極15,1
5…が形成される。
That is, as shown in FIG. 2, the wafer 5 is placed on the support pins 2, 2, . . . of the plating tube 1 with the back electrode 11 facing upward.
The top electrode 11 is pressed with the top electrode 6 to make electrical contact. In this state, when the plating liquid 7 is jetted out from the plating cylinder 1 and a positive plating voltage is applied to the lower electrode 4 and a negative plating voltage is applied to the upper electrode 6, a forward plating current flows from the plating liquid 7 to the wafer 5, and the plating liquid 7
Au vapor deposited film 1 whose Ag component is on the bottom surface of wafer 5
4, 14... are plated on the bump electrodes 15, 1
5... is formed.

考案が解決しようとする問題点 ところで、上記噴流式メツキ装置によれば、ウ
エーハ5の被メツキ面にメツキ液7を噴流させな
がら上下電極4,6間にメツキ電圧を印加してメ
ツキ液7のAg成分をウエーハ5の被メツキ面に
あるAu蒸着膜14,14…上にメツキさせてバ
ンプ電極15,15…を形成させている。ところ
が、ウエーハ5の被メツキ面にメツキ液を噴流さ
せる際、ウエーハ5の被メツキ面が乾いていてメ
ツキ液7とのなじみが悪い為、ウエーハ5の被メ
ツキ面にある窓孔13,13…に空気が溜つて気
泡ができ、この気泡によりバンプ電極が形成され
なかつたり高さ不足のバンプ電極が形成され、半
導体製造の歩留りを悪くすることがあつた。
Problems to be Solved by the Invention Incidentally, according to the jet plating apparatus described above, the plating liquid 7 is applied by applying a plating voltage between the upper and lower electrodes 4 and 6 while jetting the plating liquid 7 onto the surface to be plated of the wafer 5. Ag components are plated on the Au vapor deposited films 14, 14, . . . on the surface to be plated of the wafer 5, to form bump electrodes 15, 15, . However, when the plating liquid is jetted onto the surface of the wafer 5 to be plated, since the surface of the wafer 5 to be plated is dry and does not mix well with the plating liquid 7, the window holes 13, 13, etc. on the surface of the wafer 5 to be plated are Air accumulates and forms bubbles, and these bubbles sometimes cause bump electrodes not to be formed or bump electrodes with insufficient height to be formed, resulting in poor yields in semiconductor manufacturing.

そこでこの考案は、前記従来の問題点を解決す
る為に、ウエーハの被メツキ面を予めウエツトさ
せておくことによつて、メツキ液とのなじみを良
くしてウエーハの被メツキ面での気泡の発生を防
止し、半導体製造の歩留りの向上を図ることを目
的とする。
Therefore, in order to solve the above-mentioned conventional problems, this idea was developed by pre-wetting the surface of the wafer to be plated to improve the compatibility with the plating solution and to prevent air bubbles on the surface of the wafer to be plated. The purpose is to prevent this occurrence and improve the yield of semiconductor manufacturing.

問題点を解決するための手段 上記目的を達成するためのこの考案の構成は、
半導体ウエーハを被メツキ面を下にして保持する
メツキ筒と、メツキ筒上の半導体ウエーハの上面
に接触する上部電極と、メツキ筒内を上昇して半
導体ウエーハ下面に噴流するメツキ液中に配置さ
れた下部電極を具備し、半導体ウエーハの被メツ
キ面にメツキ液を噴流させながら上下電極間にメ
ツキ電圧を印加してメツキを行い半導体ウエーハ
に部分的にバンプ電極を形成する噴流式メツキ装
置であつて、上記メツキ筒内に半導体ウエーハの
被メツキ面に水分を噴霧するプリウエツト用ノズ
ルを配置するようにしたものである。
Means for solving the problem The structure of this invention to achieve the above purpose is as follows:
A plating cylinder that holds a semiconductor wafer with the surface to be plated facing down, an upper electrode that contacts the top surface of the semiconductor wafer on the plating cylinder, and a plating liquid that rises inside the plating cylinder and is disposed in the plating liquid that flows onto the bottom surface of the semiconductor wafer. The present invention is a jet plating device which is equipped with a lower electrode, and which applies a plating voltage between the upper and lower electrodes while jetting a plating liquid onto the surface to be plated of a semiconductor wafer to form bump electrodes partially on the semiconductor wafer. A prewetting nozzle for spraying moisture onto the surface of the semiconductor wafer to be plated is disposed within the plating cylinder.

作 用 そしてこの考案は前記の手段により、プリウエ
ツト用ノズルから水分を噴霧して半導体ウエーハ
の被メツキ面を予めウエツトし、該半導体ウエー
ハの被メツキ面とメツキ液のなじみを良好させ
る。
Function: According to the above-described method, the surface of the semiconductor wafer to be plated is pre-wetted by spraying moisture from the prewetting nozzle, thereby improving the compatibility between the surface of the semiconductor wafer and the plating solution.

実施例 この考案の一実施例を第1図に基づき以下説明
する。尚、第2図と同一参照符号は同一物を示し
その説明を省略する。この実施例の特徴はメツキ
筒1内にプリウエツト用ノズル16を設置したこ
とである。このプリウエツト用ノズル16はポン
プ17にて貯液槽8のメツキ液7を円錐状に噴霧
させるもので、メツキ筒1の支持ピン2,2…上
に位置決め載置されたウエーハ5の下面にメツキ
液7が噴霧されるように配置される。
Embodiment An embodiment of this invention will be described below with reference to FIG. Note that the same reference numerals as in FIG. 2 indicate the same parts, and the explanation thereof will be omitted. A feature of this embodiment is that a prewetting nozzle 16 is installed inside the plating cylinder 1. This pre-wetting nozzle 16 uses a pump 17 to spray the plating liquid 7 from the liquid storage tank 8 into a conical shape, and plating the lower surface of the wafer 5 positioned and mounted on the support pins 2, 2... of the plating cylinder 1. It is arranged so that the liquid 7 is sprayed.

上記構成に於いて、先ず、ウエーハ5を裏面電
極11を上にしてメツキ筒1の支持ピン2,2…
上に位置決め載置し、裏面電極11上を上部電極
6で押圧して電気的に接触しておく。この状態で
弁18を開いてメツキ筒1内のメツキ液7を貯液
槽8に戻し、その液面がプリウエツト用ノズル1
6のノズル端より低くなると弁18を閉じる。そ
の後プリウエツト用ノズル16にて貯液槽8のメ
ツキ液7を噴霧してウエーハ5の下面をウエツト
させる。このようにウエーハ5の下面をウエツト
させると、ウエーハ5の下面にメツキ液7を噴流
させる際、ウエーハ5の下面とメツキ液7のなじ
みが良くなり、これによりウエーハ5の下面に気
泡が発生しなくなる。この後、従来同様にメツキ
を行えばウエーハ5の下面に所定のバンプ電極1
5,15…が形成される。
In the above configuration, first, the wafer 5 is placed with the back electrode 11 facing upward, and the support pins 2, 2, . . .
The top electrode 11 is pressed with the top electrode 6 to make electrical contact. In this state, open the valve 18 to return the plating liquid 7 in the plating cylinder 1 to the liquid storage tank 8, so that the liquid level reaches the prewetting nozzle 1.
When the temperature drops below the nozzle end of No. 6, the valve 18 is closed. Thereafter, the plating liquid 7 in the liquid storage tank 8 is sprayed by the prewetting nozzle 16 to wet the lower surface of the wafer 5. By making the bottom surface of the wafer 5 wet in this way, when the plating liquid 7 is jetted onto the bottom surface of the wafer 5, the bottom surface of the wafer 5 and the plating liquid 7 become more compatible, and this prevents air bubbles from being generated on the bottom surface of the wafer 5. It disappears. After that, if plating is performed in the same manner as before, a predetermined bump electrode 1 will be formed on the bottom surface of the wafer 5.
5, 15... are formed.

考案の効果 この考案によれば、ウエーハの被メツキ面にメ
ツキ液を噴流させながらメツキを行う装置に於い
て、ウエーハの被メツキ面を予めウエツトさせる
ようにしたから、ウエーハの被メツキ面にメツキ
液を噴流させる際、ウエーハの被メツキ面とメツ
キ液のなじみが良くなり、ウエーハの被メツキ面
の気泡の発生を防止することができ、これにより
半導体製造の歩留りの向上が図れ、実用効果大な
る半導体製造装置が提供できる。
Effects of the invention According to this invention, in a device that performs plating while jetting plating liquid onto the surface of a wafer, the surface of the wafer to be plated is wetted in advance. When the liquid is jetted, the surface of the wafer to be plated and the plating liquid become better compatible, and the generation of bubbles on the surface of the wafer to be plated can be prevented.This improves the yield of semiconductor manufacturing and has great practical effects. A semiconductor manufacturing apparatus can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例の半導体製造装置
を示す要部側断面図、第2図は従来のバンプ電極
メツキ装置の要部側断面図、第3図及び第4図は
メツキされる半導体ウエーハの平面図及び−
線拡大断面図である。 1……メツキ筒、4……下部電極、5……半導
体ウエーハ、6……上部電極、7……メツキ液、
15……バンプ電極、16……プリウエツト用ノ
ズル。
FIG. 1 is a sectional side view of the main part of a semiconductor manufacturing apparatus according to an embodiment of the present invention, FIG. 2 is a sectional side view of the main part of a conventional bump electrode plating apparatus, and FIGS. 3 and 4 are plated parts. Plan view of semiconductor wafer and -
It is a line enlarged sectional view. 1... Plating tube, 4... Lower electrode, 5... Semiconductor wafer, 6... Upper electrode, 7... Plating liquid,
15...Bump electrode, 16...Prewetting nozzle.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体ウエーハを被メツキ面を下にして保持す
るメツキ筒と、メツキ筒上の半導体ウエーハの上
面に接触する上部電極と、メツキ筒内を上昇して
半導体ウエーハ下面に噴流するメツキ液中に配置
された下部電極を具備し、半導体ウエーハの被メ
ツキ面にメツキ液を噴流させながら上下電極間に
メツキ電圧を印加してメツキを行い半導体ウエー
ハに部分的にバンプ電極を形成する噴流式メツキ
装置であつて、上記メツキ筒内に半導体ウエーハ
の被メツキ面に水分を噴霧するプリウエツト用ノ
ズルを配置したことを特徴とする半導体製造装
置。
A plating cylinder that holds a semiconductor wafer with the surface to be plated facing down, an upper electrode that contacts the top surface of the semiconductor wafer on the plating cylinder, and a plating liquid that rises inside the plating cylinder and is disposed in the plating liquid that flows onto the bottom surface of the semiconductor wafer. The present invention is a jet plating device which is equipped with a lower electrode, and which applies a plating voltage between the upper and lower electrodes while jetting a plating liquid onto the surface to be plated of a semiconductor wafer to form bump electrodes partially on the semiconductor wafer. A semiconductor manufacturing apparatus characterized in that a prewetting nozzle for spraying moisture onto a surface to be plated of a semiconductor wafer is disposed in the plating cylinder.
JP1986168764U 1986-10-31 1986-10-31 Expired JPH039330Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986168764U JPH039330Y2 (en) 1986-10-31 1986-10-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986168764U JPH039330Y2 (en) 1986-10-31 1986-10-31

Publications (2)

Publication Number Publication Date
JPS6373939U JPS6373939U (en) 1988-05-17
JPH039330Y2 true JPH039330Y2 (en) 1991-03-08

Family

ID=31101945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986168764U Expired JPH039330Y2 (en) 1986-10-31 1986-10-31

Country Status (1)

Country Link
JP (1) JPH039330Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2739743B2 (en) * 1989-12-25 1998-04-15 カシオ計算機株式会社 Method of forming electrodes by plating

Also Published As

Publication number Publication date
JPS6373939U (en) 1988-05-17

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