JPH0390532U - - Google Patents
Info
- Publication number
- JPH0390532U JPH0390532U JP15146489U JP15146489U JPH0390532U JP H0390532 U JPH0390532 U JP H0390532U JP 15146489 U JP15146489 U JP 15146489U JP 15146489 U JP15146489 U JP 15146489U JP H0390532 U JPH0390532 U JP H0390532U
- Authority
- JP
- Japan
- Prior art keywords
- controlled oscillator
- pll
- voltage controlled
- reference signal
- input reference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15146489U JPH0390532U (pt) | 1989-12-28 | 1989-12-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15146489U JPH0390532U (pt) | 1989-12-28 | 1989-12-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0390532U true JPH0390532U (pt) | 1991-09-13 |
Family
ID=31697763
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15146489U Pending JPH0390532U (pt) | 1989-12-28 | 1989-12-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0390532U (pt) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014518036A (ja) * | 2011-05-02 | 2014-07-24 | 日本テキサス・インスツルメンツ株式会社 | 入力クロックが失われたときｐｌｌ出力周波数を保つ装置及び方法 |
-
1989
- 1989-12-28 JP JP15146489U patent/JPH0390532U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014518036A (ja) * | 2011-05-02 | 2014-07-24 | 日本テキサス・インスツルメンツ株式会社 | 入力クロックが失われたときｐｌｌ出力周波数を保つ装置及び方法 |