JPH0389649A - Turn-back circuit - Google Patents

Abstract

PURPOSE:To realize a stable and inexpensive turn-back circuit of low power consumption and of small mounting area by providing a transistor(TR) switch circuit which disconnects the input terminal of a data discriminating circuit and a line reception end in response to a control signal. CONSTITUTION:When the control input signal of a terminal 3 goes to the low level, the high level is sent from an inverter circuit 8 to turn on TRs Tr5 and Tr6 and switches SW3 and SW4 and to turn off TRs Tr3 and Tr4 and switches SW1 and SW2. Then, the normal communication mode is set. Since switches SW1 and SW2 are turned off in the normal communication mode, data of a terminal 1 or 2 is not turned back to a terminal 4 or 5. When the terminal 3 goes to the high level, TRs Tr5 and Tr6 and switches SW3 and SW4 are turned off, and TRs Tr3 and Tr4 and switches SW1 and SW2 are turned on. Thus, data of the terminal 1 or 2 is turned back to the terminal 4 or 5 and is outputted.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a data signal folding circuit.

[Conventional technology]

Traditional folding circuits are implemented using relays.

[Problem to be solved by the invention]

Conventional folding circuits are comprised of relays, so they have the drawbacks of high power consumption and large mounting area.

An object of the present invention is to provide a stable and inexpensive folding circuit with low power consumption and small mounting area.

[Means to solve the problem]

The loopback circuit of the present invention is provided between an input end of transmission data, a line transmission end, and an input end of the loopback circuit, and transmits the transmission data to the line in response to a control signal instructing switching between communication and loopback. a first transistor switch circuit connected only to either one of the end and the input end of the folding circuit; a second transistor switch circuit connecting or disconnecting the output of the folding circuit in response to the control signal; The input end of the data identification circuit connected to the output end of the folding circuit via the second transistor switch circuit and the line receiving end is provided between the input end of the data identification circuit and the line receiving end. and a third transistor switch circuit that connects and disconnects the connection with the receiving end of the line.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram for explaining the operation of this embodiment. 1st
In the figure, reference number 1 is a terminal for inputting data on the AMI positive side, 2 is a terminal for inputting data on the negative side of AMI, and 3 is a terminal for inputting data on the AMI negative side.
is a terminal for control input, 4 is a terminal for AMI positive side data output, 5 is a terminal for AMI negative side data output, 6
is the line transmitting end, 7 is the line receiving end, 8 is the inverter circuit,
9 is a comparator on the AMI positive side, 10 is a comparator on the AMI negative side, R1-R4 are resistors for current limiting, R5-R8 are resistors for setting the first reference potential, R9 to R
IO is a resistor for setting the second reference potential, R11 to R13 is a resistor for setting a return potential, Trl is a transistor for outputting data on the AMI positive side, Tr2 is a transistor for outputting data on the negative side of the AMI, Tr3 to Tr6 is a control transistor, SW1 to SW4 are control switches,
T1 indicates a transmitting transformer, and T2 indicates a receiving transformer.

In FIG. 1, when the control input signal at terminal 3 becomes L level, the inverter circuit 8 outputs H level, and T
Turn on r5 and Tr6 and SW3 and SW4,
Turn off Tr3 and Tr4 and SW1 and SW2. At this time, if terminal 1 or terminal 2 becomes H level,
Trl or Tr2 is turned on, and a voltage appears at the midpoint and one end of the primary winding of the transformer T1, and data is sent to the line via the line transmission end 6. In addition, the received data inputted to the line receiving end 7 is transmitted through the resistors R5 to R8 via the transformer T2.
Comparators 9 and 10 compare the potential with a first reference potential set by , and the comparison result is output from terminal 4 or terminal 5 . Therefore, when terminal 3 is at L level, data at terminal 1 or terminal 2 is output to the line transmitting end 6, data at the line receiving end 7 is output to terminal 4 or terminal 5, and the normal communication mode is established. . Since SW1 and SW2 are turned off in the normal communication mode, data at terminal 1 or terminal 2 is not looped back to terminal 4 or terminal 5.

When terminal 3 becomes H level, Tr5 and Tr6 and SW
Tr3 and SW4 are turned off, and Tr3 and Tr4, SWl and SW2 are turned on. At this time, terminal 1
Or when terminal 2 becomes H level, Tri or Tr2
turns on, and one of the resistors R13 lowers the potential at one end. The potentials across the resistor R13 are the input potentials of the comparators 9 and 10, respectively. Therefore, changing the potential at this point is relative to comparator 9 or 1.
By changing the comparison potential of 0, data at terminal 1 or terminal 2 is output back to terminal 4 or terminal 5. The signal waveforms of each part at this time are shown in Figure 2.
From Figure 2, it can be seen that the terminal 1 data is looped back to terminal 4, and the terminal 2 data is looped back to terminal 5. ).

Note that when terminal 3 goes to L level, Tr5 and Tr6 are off, so the primary side of transformer T1 becomes open.
The line transmitting end 6 becomes in a no-signal state. Also, SW3・SW
4 is off, the input data to the line receiving end 7 is the comparator 9.l.

It is not transmitted to the other side.

Note that the control switches SWI to SW4 are CMO84Af
This can be realized with one circuit.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to realize a stable and inexpensive folding circuit with low power consumption and a small mounting area.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram of each part in the embodiment of the present invention. 1 to 5... terminal, 6... line transmitting end, 7... line receiving end, 8... inverter circuit, 9, 10... comparator, R1-R13... resistor, Tri to Tr6・
...Transistor, SWI to SW4...Control switch, Tl. T2...Transmission transformer.

Claims (2)

[Claims] (1) The transmission data is transferred to the line transmission end and the loopback circuit in response to a control signal provided between the input end of the transmission data and the input terminal of the line transmission end and the loopback circuit, which instructs communication and loopback switching. a first transistor switch circuit connected to only one of the input terminals of the circuit; a second transistor switch circuit that connects or disconnects the output of the folding circuit in response to the control signal; and the second transistor switch is provided between the input end of a data identification circuit connected to the output end of the folding circuit via a circuit and the line receiving end, and is connected to the input end of the data identification circuit and the line receiving end in response to the control signal. and a third transistor switch circuit that connects and disconnects the connection between the folding circuit and the third transistor switch circuit. (2) The folding circuit according to claim 1, wherein the first to third transistor switch circuits are provided in pairs for each polarity of positive and negative polarity data.