JPH0389610A - Differential amplifier with auto-zero unction and sample and holde function - Google Patents

Differential amplifier with auto-zero unction and sample and holde function

Info

Publication number
JPH0389610A
JPH0389610A JP1226286A JP22628689A JPH0389610A JP H0389610 A JPH0389610 A JP H0389610A JP 1226286 A JP1226286 A JP 1226286A JP 22628689 A JP22628689 A JP 22628689A JP H0389610 A JPH0389610 A JP H0389610A
Authority
JP
Japan
Prior art keywords
sample
differential amplifier
auto
zero
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1226286A
Other languages
Japanese (ja)
Inventor
Shoichiro Tada
多田 昭一郎
Akira Matsuzawa
松沢 昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1226286A priority Critical patent/JPH0389610A/en
Publication of JPH0389610A publication Critical patent/JPH0389610A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a differential amplifier with the auto-zero function and the sample and hold function quicker than conventional are by starting the auto-zero operation of the differential amplifier in the hole state of a sample and virtually shortening the time of the auto-zero operation. CONSTITUTION:The offset voltage of a differential amplifier 100 is held in offset voltage holding capacities 10A and 10B by the auto-zero operation. A switch 4 is opened, and a switch 3 is closed, and switches 8A and 8B are closed, and switches 12A and 12B are opened, and then, the voltage obtained by amplifying the difference between an input signal 1 and a reference signal 2 appears in output terminals of sample and hold circuits 200A and 200B. When switches 8A and 8B are opened next, the voltage of differential voltage holding capacities 11A and 11B and the voltage in output terminals of sample and hold circuits 200A and 200B are kept constant though the input signal 1 and the reference signal 2 are changed. The switch 3 is opened and the switch 4 is closed at this time, and thereby, the differential amplifier 100 already enters into the auto-zero operation when sample and hold circuits 200A and 200B perform the holding operation.

Description

【発明の詳細な説明】 産業上の利用分野 本発明C亀2つの信号の差を増幅するオートゼロ機姐 
サンプルホールド機能付き差動増幅器に関するものであ
も 従来の技術 第1図に従来のオートゼロ機組 サンプルホールド機能
付き差動増幅器の構成を示し 第4図にそのタイミング
を示す。
[Detailed description of the invention] Industrial application field The present invention is an auto-zero machine that amplifies the difference between two signals.
Regarding differential amplifiers with sample and hold functions, prior art FIG. 1 shows the configuration of a conventional auto-zero differential amplifier with sample and hold functions, and FIG. 4 shows its timing.

第1図の差動増幅器100において、MOSトランジス
タ5A、5&  抵抗器6A、6BJ上 特性が互いに
等しいことが理想的であるバ 加工精度等の問題により
、必ずしも等しい特性にはならな〜 そのた△ この差
動増幅器の出力電圧に(上入力信号1と参照信号2の差
を増幅した電圧の他に 常に一定の電圧 すなわちオフ
セット電圧が含ま−れていも 正確な差動増幅を行なう
ために(上このオフセット電圧を取り除いてやらなけれ
ばならな〜1 第1図のオートゼロ機組 サンプルホールド機能付き差
動増幅器での入力信号1と参照信号2の差の増幅は 次
のような手順で行なう。
In the differential amplifier 100 of FIG. 1, it is ideal that the characteristics of the MOS transistors 5A, 5 and the resistors 6A, 6BJ are equal to each other. Even if the output voltage of this differential amplifier (in addition to the voltage that amplifies the difference between input signal 1 and reference signal 2) always includes a constant voltage, that is, an offset voltage, in order to perform accurate differential amplification ( This offset voltage must be removed~1 The auto-zero mechanism shown in Figure 1 Amplification of the difference between input signal 1 and reference signal 2 in the differential amplifier with sample and hold function is performed as follows.

手順1 (オートゼロ) ま衣 スイッチ4を閉改 スイッチ3を開く。Step 1 (Auto zero) Close switch 4 and open switch 3.

そのときに差動増幅器100の出力端にCヨ  オフセ
ット電圧が現われも さらに スイッチ8A、8B、ス
イッチ12A、12Bを閉じることにより、オフセット
電圧保持容量10A、IOBに(上 差動増幅器100
のオフセット電圧が保持されも手順2(サンプル) 次に スイッチ4を開き、スイッチ3を閉じもすると、
差動増幅器100の出力端に(上 入力信号1と参照信
号2の差を増幅した電圧にオフセット電圧を加えた電圧
が現われも このと東 スイッチ8A、8Bを閉じ ス
イッチ12A、12Bを開け1′L サンプルホールド
回路200A、200Bの出力端には入力信号lと参照
信号2の差を増幅した電圧が現われも ここ弘 オフセ
ット電圧保持容量10A、IOBに(よ 差動増幅器1
00のオフセット電圧が保持されたままであるの玄 サ
ンプルホールド回路20OA、200Bの出力端に現わ
れる電圧に(上 差動増幅器100のオフセット電圧は
含まれていな(1 手順3 (ホールド) その次に スイッチ8A、8Bを開く。すると、差動電
圧保持容量11A、IIBの電圧およびサンプルホール
ド回路20OA、200Bの出力端の電圧ζよ 入力信
号lや参照信号2が変化しても一定に保たれも これらの手順の繰り返しにより、オートゼロ機胤 サン
プルホールド機能付き差動増幅が行なわれも 発明が解決しようとする課題 第4図から分かるように 第1図のオートゼロ機組 サ
ンプルホールド機能付き差動増幅器に(よオートゼロ動
作が必要であも また 漏れ電流のたべ 長い時間が経
つとオフセット保持容量10A、IOBに保持される電
圧が変化してしまうたべある程度以上の頻度でオートゼ
ロ動作を行う必要があん ところパ 差動増幅器100
の動作電流(上 電流源7によって決まっており、大き
くすると消費電力が大きくなり、小さくするとMOS)
ランジスタ5A、5Bに流れる電流が小さくなるために
オートゼロ動作にかかる時間が長くなるという問題点が
あった 本発明(上 上述のサンプルホールド機能付き差動増幅
器の欠点について考案研究した結果によりなされたもの
であり、従来よりも高速なサンプルホールド機能付き差
動増幅器を提供することを目的とすも 課題を解決するための手段 本発明C1上述の課題を解決するたべ 差動増幅器と、
スイッチを介して前記差動増幅器の一方の入力端に接続
される入力信号と、前記差動増幅器のもう一方の入力端
に接続される参照信号と、前記差動増幅器の2つの入力
端を互いに接続するスイッチと、前記差動増幅器のそれ
ぞれの出力端を入力とする2つのサンプルホールド回路
と、前記2つのサンプルホールド回路の出力端と電圧源
をそれぞれ接続する2つのスイッチとを有し 前記2つ
のサンプルホールド回路はそれぞれスイッチとそのスイ
ッチに接続されたオフセット電圧保持容量および差動電
圧保持容量とから構成され前記2つのサンプルホールド
回路がホールド状態にあるときから前記差動増幅器にオ
ートゼロ動作をさせることを特徴とするオートゼロ機胤
 サンプルホールド機能付き差動増幅器であも作用 本発明(よ 上述の構成のオートゼロ機組 サンプルホ
ールド機能付き差動増幅器において、サンプルホールド
回路がホールド状態にあるときか転差動増幅器にオート
ゼロ動作をさせことにより、オートゼロ動作の時間が見
かけ上短くなも したがって、従来よりも高速なオート
ゼロ機胤 サンプルホールド機能付き差動増幅器が得ら
れも実施例 第1図に本発明のオートゼロ機姐 サンプルホールド機
能付き差動増幅器の構成を示し 第2図にそのタイミン
グを示す。
At that time, even if an offset voltage appears at the output terminal of the differential amplifier 100, by further closing the switches 8A, 8B, and 12A, 12B, the offset voltage holding capacitor 10A is connected to the IOB (upper differential amplifier 100).
Even if the offset voltage of is held, Step 2 (sample) Next, if switch 4 is opened and switch 3 is closed,
At the output terminal of the differential amplifier 100, a voltage obtained by adding an offset voltage to the voltage obtained by amplifying the difference between input signal 1 and reference signal 2 appears. A voltage that amplifies the difference between the input signal 1 and the reference signal 2 appears at the output terminals of the sample and hold circuits 200A and 200B.
The voltage appearing at the output terminals of the sample and hold circuits 20OA and 200B does not include the offset voltage of the differential amplifier 100 (1 Step 3 (Hold)) Then switch 8A and 8B.Then, the voltages of the differential voltage holding capacitors 11A and IIB and the voltages at the output terminals of the sample and hold circuits 20OA and 200B, ζ, will remain constant even if the input signal l or reference signal 2 changes. By repeating these steps, differential amplification with an auto-zero machine and sample-and-hold function is performed.Problems to be Solved by the InventionAs can be seen from FIG. Even if auto-zero operation is necessary, due to leakage current, the offset holding capacitor 10A and the voltage held in IOB will change over time, so it is necessary to perform auto-zero operation more frequently than a certain level. amplifier 100
Operating current (upper: Determined by current source 7; increasing it will increase power consumption; decreasing it will cause MOS)
The present invention (above) was made as a result of devising and researching the drawbacks of the above-mentioned differential amplifier with a sample and hold function, which had the problem that the time required for auto-zero operation was longer due to the smaller current flowing through the transistors 5A and 5B. It is an object of the present invention to provide a differential amplifier with a sample and hold function that is faster than the conventional one.
An input signal connected to one input terminal of the differential amplifier through a switch, a reference signal connected to the other input terminal of the differential amplifier, and two input terminals of the differential amplifier connected to each other. two sample-and-hold circuits whose inputs are respective output terminals of the differential amplifier; and two switches which respectively connect the output terminals of the two sample-and-hold circuits and the voltage source. Each of the two sample and hold circuits is composed of a switch and an offset voltage holding capacitor and a differential voltage holding capacitor connected to the switch, and causes the differential amplifier to perform an auto-zero operation from when the two sample and hold circuits are in the hold state. An auto-zero device characterized by the above-mentioned auto-zero device which also works in a differential amplifier with a sample-and-hold function. By causing the dynamic amplifier to perform auto-zero operation, the time for auto-zero operation is apparently shorter. Therefore, a faster auto-zero device than the conventional differential amplifier with a sample and hold function can be obtained. Auto-zero unit The configuration of the differential amplifier with sample and hold function is shown, and its timing is shown in Figure 2.

第1図の構成は従来の構成と同一であり、従来のオート
ゼロ機組 サンプルホールド機能付き差動増幅器と同様
に正確な差動増幅を行なうためにjL  オフセット電
圧を取り除いてやらなければならな(1 第1図のオートゼロ機姐 サンプルホールド機能付き差
動増幅器での入力信号1と参照信号2の差の増幅(上 
次のような手順で行なう。
The configuration shown in Figure 1 is the same as the conventional configuration, and in order to perform accurate differential amplification, the jL offset voltage must be removed (1 Auto-zero machine in Figure 1 Amplification of the difference between input signal 1 and reference signal 2 using a differential amplifier with sample and hold function (upper
Follow the steps below:

手順1 (オートゼロ) 既に スイッチ4は閉じられており、スイッチ3は開か
れていも モして差動増幅器100の出力端に(上 差
動増幅器100のオフセット電圧が現われていも ここ
で、スイッチ8A、8&  スイッチ12A、12Bを
閉じることにより、オフセット電圧保持容量10A、I
OBにば 差動増幅器100のオフセット電圧が保持さ
れも 手順2(サンプル) 次に スイッチ4を開き、スイッチ3を閉じもすると、
差動増幅器100の出力端に(上 入力信号1と参照信
号2の差を増幅した電圧にオフセット電圧を加えた電圧
が現われも このとよ スイッチ8A、8Bを閉は ス
イッチ12A、12Bを開けば サンプルホールド回路
20OA、200Bの出力端には入力信号1と参照信号
2の差を増幅した電圧が現われも ここで、オフセット
電圧保持容量10A、IOBに(よ 差動増幅器100
のオフセット電圧が保持されたままであるので、サンプ
ルホールド回路200A、200Bの出力端に現われる
電圧に(よ 差動増幅器100のオフセット電圧は含ま
れていな鶏 手順3(ホールド) その次に スイッチ8A、8Bを開く。すると、差動電
圧保持容量11A、IIBの電圧およびサンプルホール
ド回路20OA、200Bの出力端の電圧(上 入力信
号lや参照信号2が変化しても一定に保たれも このと
きに スイッチ3を開き、スイッチ4を閉じることによ
り、サンプルホールド回路20OA、200Bがホール
ド動作をしているときに 差動増幅器100は既にオー
トゼロ動作に入っているようにしていも これらの動作の繰り返しにより、オートゼロ機能、 サ
ンプルホールド機能付き差動増幅が行なわれも オートゼロ動作の期間に オフセット電圧保持容量10
A、10Bに差動増幅器100のオフセット電圧を保持
させム すなわ板 その電圧で充電する力t その際 
同時に MOSトランジスタ5A、5Bのドレイン、抵
抗器6A、6&  スイッチ8A、8B、  及びそれ
らをつなぐ配線部分に存在する寄生容量にL 充電する
必要があも そして、充電電流は電流源7によって決ま
っていも 従って、オートゼロに必要な時間も決ってし
まう。本発明で(上 上記で述べたように サンプルホ
ールド回路200A、200Bがホールド動作をしてい
る間に 差動増幅器100に既にオートゼロ動作に入ら
せていも そのた&MO3)ランジスタ5A、5Bのド
レイン、抵抗器6A、6&  スイッチ8A、8&  
及びそれらをうなぐ配線部分に存在する寄生容量に1よ
 すでに差動増幅器lOOのオフセット電圧が充電され
てい瓜 したがって、上記手順1のオートゼロ時には 
オフセット電圧保持容量10A、IOBに充電するだけ
でよく、短時間で済む。これにより、高速なオートゼロ
機組サンプルホールド機能付き差動増幅器が得られもま
た 第3図のように 差動増幅器100とサンプルホー
ルド回路200A、200Bとの間にバッファアンプ5
0を挿入した構成の場合、上記の方法に加丸 バッファ
アンプ50を挿入した分より差動増幅器100の負荷が
軽くなるたゑ 更に高速なオートゼロ機能、 サンプル
ホールド機能付き差動増幅器が得られも 発明の効果 以上の説明から明かなように 本発明によれC′Lわず
かなタイミングの変更により、オートゼロ機組 サンプ
ルホールド機能付き差動増幅器の速度を大きく高めるこ
とができも したがって、本発明は極めて有用であも
Step 1 (Auto zero) Even though switch 4 is already closed and switch 3 is open, the offset voltage of the differential amplifier 100 appears at the output terminal of the differential amplifier 100. , 8& By closing the switches 12A, 12B, the offset voltage holding capacity 10A, I
In OB, even if the offset voltage of the differential amplifier 100 is held, Step 2 (sample) Next, if switch 4 is opened and switch 3 is closed,
A voltage obtained by adding an offset voltage to the voltage obtained by amplifying the difference between input signal 1 and reference signal 2 appears at the output terminal of the differential amplifier 100. In this case, when switches 8A and 8B are closed, when switches 12A and 12B are opened. A voltage obtained by amplifying the difference between input signal 1 and reference signal 2 appears at the output terminals of sample and hold circuits 20OA and 200B.
Since the offset voltage of the differential amplifier 100 is still held, the voltage appearing at the output terminals of the sample and hold circuits 200A and 200B does not include the offset voltage of the differential amplifier 100.Step 3 (Hold) Then, switch 8A, 8B. Then, the voltage of the differential voltage holding capacitor 11A and IIB and the voltage of the output terminal of the sample and hold circuits 20OA and 200B (upper) will be kept constant even if the input signal 1 or reference signal 2 changes. By opening switch 3 and closing switch 4, even if the differential amplifier 100 is already in auto-zero operation while the sample-and-hold circuits 20OA and 200B are in hold operation, repeating these operations will cause Even if differential amplification with auto-zero function and sample-hold function is performed, the offset voltage holding capacitance is 10% during auto-zero operation.
A, 10B is made to hold the offset voltage of the differential amplifier 100. In other words, the force t to charge with that voltage is then
At the same time, it is necessary to charge the parasitic capacitances existing in the drains of MOS transistors 5A and 5B, resistors 6A and 6 & switches 8A and 8B, and the wiring that connects them to L.And even though the charging current is determined by the current source 7, Therefore, the time required for auto-zero is also determined. In the present invention (as described above, even if the differential amplifier 100 is already in auto-zero operation while the sample-and-hold circuits 200A and 200B are performing the hold operation, the drains of the transistors 5A and 5B, Resistor 6A, 6 & Switch 8A, 8 &
The offset voltage of the differential amplifier lOO has already been charged by 1 in the parasitic capacitance existing in the wiring section that drives them. Therefore, at the time of auto-zero in step 1 above,
It is only necessary to charge the offset voltage holding capacitor 10A, IOB, and it takes only a short time. As a result, a differential amplifier with a high-speed auto-zero mechanism and sample-and-hold function can be obtained.As shown in FIG.
In the case of a configuration in which 0 is inserted, the load on the differential amplifier 100 is lighter than that by inserting the buffer amplifier 50 in the above method.It is also possible to obtain a differential amplifier with a faster auto-zero function and sample-hold function. Effects of the Invention As is clear from the above explanation, the speed of the differential amplifier with auto-zero mechanism and sample-hold function can be greatly increased by changing the C'L timing slightly. Therefore, the present invention is extremely useful. Deamo

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明及び従来のオートゼロ機組 サンプルホ
ールド機能付き差動増幅器の構成阻 第2図は本発明の
オートゼロ機組 サンプルホールド機能付き差動増幅器
のタイミングは 第3図は本発明のオートゼロ機組 サ
ンプルホールド機能付き差動増幅器の他の構成は 第4
図は従来のオートゼロ機組 サンプルホールド機能付き
差動増幅器のタイミング図であも 1・・・入力倍散 2・・・参照信!  3.4.8A
、8B、12A、12B・・・スイッチ、 IOA、I
OB・・・オフセット電圧保持容t  lIA、11B
・・・作動電圧保持容量、 100・・・差動増幅t 
 20OA、200B・・・サンプルホールド回胤
Figure 1 shows the configuration of the auto-zero mechanism of the present invention and the conventional auto-zero mechanism. Figure 2 shows the configuration of the auto-zero mechanism of the present invention. The timing of the differential amplifier with sample-and-hold function. Figure 3 shows the auto-zero mechanism of the present invention. Other configurations of the differential amplifier with hold function are as follows.
The figure is a timing diagram of a conventional auto-zero mechanism differential amplifier with sample and hold function.1... Input multiplication 2... Reference signal! 3.4.8A
, 8B, 12A, 12B...Switch, IOA, I
OB...Offset voltage holding capacitor tlIA, 11B
...Operating voltage holding capacity, 100...Differential amplification t
20OA, 200B...Sample hold cycle

Claims (1)

【特許請求の範囲】[Claims] 差動増幅器と、スイッチを介して前記差動増幅器の一方
の入力端に接続される入力信号と、前記差動増幅器のも
う一方の入力端に接続される参照信号と、前記差動増幅
器の2つの入力端を互いに接続するスイッチと、前記差
動増幅器のそれぞれの出力端を入力とする2つのサンプ
ルホールド回路と、前記2つのサンプルホールド回路の
出力端と電圧源をそれぞれ接続する2つのスイッチとを
有し、前記2つのサンプルホールド回路はそれぞれスイ
ッチとそのスイッチに接続されたオフセット電圧保持容
量および差動電圧保持容量とから構成され、前記2つの
サンプルホールド回路がホールド状態にあるときから前
記差動増幅器にオートゼロ動作をさせることを特徴とす
るオートゼロ機能、サンプルホールド機能付き差動増幅
a differential amplifier; an input signal connected to one input terminal of the differential amplifier via a switch; a reference signal connected to the other input terminal of the differential amplifier; two sample-and-hold circuits whose inputs are the respective output terminals of the differential amplifier; and two switches which respectively connect the output terminals of the two sample-and-hold circuits and the voltage source. The two sample-and-hold circuits each include a switch and an offset voltage holding capacitor and a differential voltage holding capacitor connected to the switch, and the difference between the two sample-and-hold circuits is in the hold state. A differential amplifier with an auto-zero function and a sample-hold function that allows the dynamic amplifier to perform auto-zero operation.
JP1226286A 1989-08-31 1989-08-31 Differential amplifier with auto-zero unction and sample and holde function Pending JPH0389610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1226286A JPH0389610A (en) 1989-08-31 1989-08-31 Differential amplifier with auto-zero unction and sample and holde function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1226286A JPH0389610A (en) 1989-08-31 1989-08-31 Differential amplifier with auto-zero unction and sample and holde function

Publications (1)

Publication Number Publication Date
JPH0389610A true JPH0389610A (en) 1991-04-15

Family

ID=16842834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1226286A Pending JPH0389610A (en) 1989-08-31 1989-08-31 Differential amplifier with auto-zero unction and sample and holde function

Country Status (1)

Country Link
JP (1) JPH0389610A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5966088A (en) * 1997-05-23 1999-10-12 Mitsubishi Denki Kabushiki Kaisha Analog/digital converter and voltage comparator capable of fast producing of output offset voltage
JP2007026569A (en) * 2005-07-19 2007-02-01 Yokogawa Electric Corp Sample and hold circuit
JP2011061726A (en) * 2009-09-14 2011-03-24 Toshiba Corp Semiconductor integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5966088A (en) * 1997-05-23 1999-10-12 Mitsubishi Denki Kabushiki Kaisha Analog/digital converter and voltage comparator capable of fast producing of output offset voltage
JP2007026569A (en) * 2005-07-19 2007-02-01 Yokogawa Electric Corp Sample and hold circuit
JP2011061726A (en) * 2009-09-14 2011-03-24 Toshiba Corp Semiconductor integrated circuit

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