JPH0388392A - Multilayer printed wiring board - Google Patents

Multilayer printed wiring board

Info

Publication number
JPH0388392A
JPH0388392A JP22481089A JP22481089A JPH0388392A JP H0388392 A JPH0388392 A JP H0388392A JP 22481089 A JP22481089 A JP 22481089A JP 22481089 A JP22481089 A JP 22481089A JP H0388392 A JPH0388392 A JP H0388392A
Authority
JP
Japan
Prior art keywords
wiring
wiring pattern
multilayer printed
board
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22481089A
Other languages
Japanese (ja)
Inventor
Kazuhiro Sunakawa
砂川 一広
Masato Morimoto
正人 森本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP22481089A priority Critical patent/JPH0388392A/en
Publication of JPH0388392A publication Critical patent/JPH0388392A/en
Pending legal-status Critical Current

Links

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To reduce wiring pattern by performing electrical connection using a jumper wire crossing the other wiring pattern in a region crossing one wiring pattern which actually crosses the main surface of the main body of a wiring board. CONSTITUTION:The title item has a multi layer printed wiring board main unit 1, wiring patterns 1a and 1b which are formed in a form actually crossing on the main surface of this multi-layer printed wiring board main body 1, and a jumper wire 3. Then, the jumper wire 3 is bonded through a bonding pad 4 which is provided at the edge part of the wiring pattern 1a which is provided sandwiching one wiring pattern 1b, thus performing electrical connection between the wiring patterns 1a. In this case, since no through-holes are used for connecting the wiring patterns 1a and 1b at the crossing region, the inner-layer wiring pattern layer can be used for other signals, thus achieving high-density wiring and miniaturization of the multilayer printed wiring board 1.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、多層印刷配線基板に係り、特に配線パターン
間の電気的接続方式を改良した多層印刷配線基板に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a multilayer printed wiring board, and more particularly to a multilayer printed wiring board with an improved electrical connection method between wiring patterns.

(従来の技術) 周知のように信号用配線パターン層、電源用配線パター
ン層、接地用配線パターン層などを多層的に積層一体化
して成る多層印刷配線基板は、各種の電子機器類などで
広く実用に供されている。
(Prior Art) As is well known, multilayer printed wiring boards, which are formed by laminating and integrating signal wiring pattern layers, power supply wiring pattern layers, grounding wiring pattern layers, etc., are widely used in various electronic devices. It is put into practical use.

ところで、この種の多層印刷配線基板においては、配線
パターン層間の電気的な接続をスルホール接続やヴイア
ホール接続などによって行う構成を成している。しかし
て、基板主面で実質的に交叉する形で所要の配線パター
ンが形成された多層印刷配線基板の場合は、たとえば第
3図に断面的に、また第4図に平面的にそれぞれ要部構
成を示す如くなされている。すなわち、多層印刷配線基
板本体1主面で、実質的に交叉する形に形成される配線
ハターンla、lbの中、一方の配線パターンlaは、
他方の配線パターンibを挟んで設けたスルホール2内
壁面に被着形成した導体層2aおよび内層配線パターン
leを介して電気的に接続した構成を採っている。つま
り、一般的に内層配線パターン層の配線密度の方が、外
層配線パターン層の配線密度よりも低いことを利用して
、スルホール接続により実質的には、基板本体1主面で
交叉していると同様の配線パターンを有する多層印刷配
線基板として機能させている。
Incidentally, this type of multilayer printed wiring board has a configuration in which electrical connections between wiring pattern layers are made by through-hole connections, via-hole connections, or the like. In the case of a multilayer printed wiring board in which the required wiring patterns are formed in a substantially intersecting manner on the main surface of the board, for example, the main parts are shown in a cross-sectional view as shown in FIG. 3, and in a planar view as shown in FIG. The configuration is as shown. That is, among the wiring patterns la and lb formed in a substantially intersecting shape on the main surface of the multilayer printed wiring board main body 1, one wiring pattern la is as follows.
A configuration is adopted in which electrical connection is made via a conductor layer 2a formed on the inner wall surface of the through hole 2 provided with the other wiring pattern ib in between and an inner layer wiring pattern le. In other words, by taking advantage of the fact that the wiring density of the inner wiring pattern layer is generally lower than that of the outer wiring pattern layer, through-hole connections are made to substantially intersect on the main surface of the board body 1. It functions as a multilayer printed wiring board with a similar wiring pattern.

(発明が解決しようとする課Ja) しかし、上記構成乃至構造の多層印刷配線基板の場合に
は、実用上次のような不都合が認められる。すなわち、
多層印刷配線基板本体1主面で実質的に交叉する形で形
成される配線パターンla、1bの中、一方の配線パタ
ーンlaもしくは配線パターンtbをスルホール2内壁
面に被着形成した導体層2aおよび内層配線パターンl
cを介して電気的に接続する構成と成すため、配線パタ
ーン層の増加が必然的となり、多層印刷配線基板自体が
厚くなりかつ、コストアップとなるばかりでなく、配線
パターン自体も長くなり特性的な問題がある。
(Problem to be Solved by the Invention Ja) However, in the case of the multilayer printed wiring board having the above configuration or structure, the following practical disadvantages are recognized. That is,
Among the wiring patterns la and 1b formed in a substantially intersecting manner on the main surface of the multilayer printed wiring board body 1, one wiring pattern la or wiring pattern tb is formed by adhering to the inner wall surface of the through hole 2, and a conductor layer 2a; Inner layer wiring pattern l
In order to create a configuration in which electrical connections are made through C, it is inevitable that the number of wiring pattern layers will increase, which not only increases the thickness of the multilayer printed wiring board itself and increases the cost, but also makes the wiring pattern itself longer and has different characteristics. There is a problem.

また、前記配線パターンla、 lbが実質的に交叉す
る形で形成される箇所が多くなり、スルホール接続が多
用されと内層配線パターンleの形成可能領域も制限さ
れ、さらに多層化せざるを得ず製造工程的にも煩雑とな
る。
In addition, there are many places where the wiring patterns la and lb are formed in a substantially intersecting manner, and through-hole connections are often used, which limits the area in which the inner layer wiring patterns le can be formed, forcing further multilayering. The manufacturing process is also complicated.

本発明は、上記事情に対処してなされたもので、基板主
面で実質的に交叉する形で形成される配線パターンを有
する多層印刷配線基板において、スルホールおよび内層
配線パターンを用いずに、所要の交叉配線パターンが形
成された多層印刷配線基板を提供するものである。
The present invention has been made in response to the above-mentioned circumstances, and is a multilayer printed wiring board having wiring patterns formed substantially intersecting on the main surface of the board, without using through holes or inner layer wiring patterns. The present invention provides a multilayer printed wiring board on which a cross wiring pattern is formed.

【発明の構成] (課題を解決するため、の手段) 本発明は、少くとも多層印刷配線基板本体主面で実質的
に交叉する形で所要の配線パターンが形成された印刷配
置1基板であって、前記基板本体主面で実質的に交叉す
る一方の配線パターンを交叉する領域でワイヤボンディ
ングによりジャンパー配線にて電気的に接続して成るこ
とを特徴とする。
[Structure of the Invention] (Means for Solving the Problems) The present invention provides a single printed wiring board on which a required wiring pattern is formed in a substantially intersecting manner at least on the main surface of a main body of a multilayer printed wiring board. The two wires are electrically connected by jumper wiring by wire bonding in the region where one of the wiring patterns that substantially intersect on the main surface of the substrate body intersects with each other.

(作 用) 本発明によれば、基板本体主面で実質的に交叉する一方
の配線パターンを交叉する領域で他の配線パターンを跨
がせてジャンパー配線にて電気的に接続した構成とする
ため、配線パターンの短縮化が可能となり、リードタイ
ムを短くできる。
(Function) According to the present invention, one wiring pattern that substantially intersects on the main surface of the board body is configured to straddle another wiring pattern in the area where it intersects, and to be electrically connected by jumper wiring. Therefore, the wiring pattern can be shortened and lead time can be shortened.

また、内層配線パターンを他の信号配線パターンとして
使用し得るので、配線パターン層の低減化乃至多層印刷
配!lji基板の薄型化を図り得るし°、さらに基板主
面にスルホール接続用ランドを設ける必要もないので、
基板主面における配線パターンの高密度化も図り得る。
In addition, since the inner layer wiring pattern can be used as another signal wiring pattern, the number of wiring pattern layers can be reduced or multilayer printed wiring pattern can be used! It is possible to make the lji board thinner, and there is no need to provide through-hole connection lands on the main surface of the board.
It is also possible to increase the density of the wiring pattern on the main surface of the substrate.

(実施例) 以下、本発明に係る多層印刷配線基板基板の要部を示す
第1図および第2図を参照して本発明の詳細な説明する
。第1図は要部断面図、第2図は要部平面図である。図
において、1は多層印刷配線基板本体、la、 lbは
前記多層印刷配線基板本体1主面で実質的に交叉する形
に形成される配線パターン、3は一方の配線パターン1
bを跨いで配線パターンla間をワイヤボンディングに
より電気的に接続するジャンパー配線である。しかして
、前記ジャンパー配線3は、一方の配線パターンtbを
挟んで対峙配設された配線パターンlaの端部に設けた
ボンディングパット4を介してボンディングされ、配線
パターンla間の電気的接続を行っている。また、5は
前記ジャンパー配!1[3を外界および電気絶縁的に保
護するレジスト層であり、さらにldは信号用の内層配
線パターン層、leは他方の基板本体1主面に形設され
た配線パターンである。
(Example) Hereinafter, the present invention will be described in detail with reference to FIGS. 1 and 2 showing essential parts of a multilayer printed wiring board according to the present invention. FIG. 1 is a sectional view of the main part, and FIG. 2 is a plan view of the main part. In the figure, 1 is a multilayer printed wiring board body, la and lb are wiring patterns formed to substantially intersect on the main surface of the multilayer printed wiring board body 1, and 3 is one wiring pattern 1.
This is a jumper wiring that straddles the wiring pattern la and electrically connects the wiring pattern la by wire bonding. Thus, the jumper wiring 3 is bonded via the bonding pad 4 provided at the end of the wiring pattern la, which is disposed facing each other with one wiring pattern tb interposed therebetween, thereby establishing an electrical connection between the wiring patterns la. ing. Also, 5 is the jumper arrangement! 1[3 from the outside world and electrically insulatively, ld is an inner wiring pattern layer for signals, and le is a wiring pattern formed on the main surface of the other substrate body 1.

次に、上記本発明に係る多層印刷配線基板の製造例を説
明する。常套の手段により、所要の内層配線パターン層
を有する表面銅箔張り積層板を先ず得る。次いで、上記
表面銅箔張り積層板の銅箔層について、選択エツチング
処理を施して所要の配線パターンを形成する。つまり、
交叉する形の領域を有する所要の配線パターンを、選択
エツチング処理によって、前記積層板主面に形成する。
Next, an example of manufacturing the multilayer printed wiring board according to the present invention will be described. First, a surface copper foil-clad laminate having the required inner wiring pattern layer is obtained by conventional means. Next, the copper foil layer of the surface copper foil-clad laminate is selectively etched to form a desired wiring pattern. In other words,
A desired wiring pattern having intersecting regions is formed on the main surface of the laminate by selective etching.

しかる後、要すれば前記配線パターンを形成した積層板
主面に、ソルダーレジスト層を印刷法で形成してから、
一方の配線パターンを挟んで両側にて切離されている、
一対の配線パターンの互いに対峙する領域にボンディン
グバットを設け、ワイヤボンディングにより、前記対峙
する一対の配線パターン間をジャンパー配線する。かく
して所要の電気的な接続を行った後、要すれば前記ジャ
ンパー配線領域をたとえばソルダーレジストで被覆保護
することにより、所望の多層印刷配線基板を得ることが
できる。
After that, if necessary, a solder resist layer is formed by a printing method on the main surface of the laminate on which the wiring pattern has been formed, and then
It is separated on both sides with one wiring pattern in between.
Bonding butts are provided in regions where the pair of wiring patterns face each other, and jumper wiring is performed between the pair of wiring patterns facing each other by wire bonding. After making the necessary electrical connections, if necessary, the jumper wiring area is covered and protected with, for example, a solder resist, thereby obtaining a desired multilayer printed wiring board.

[発明の効果] 上記のように、基板主面で実質的に交叉する形で所要の
配線パターンを形成、具備する本発明に係る多層印刷配
線基板は、上記交叉する領域での配線パターンの接続に
スルホールを用いないため、内層配線パターン層を他の
信号用などに使用し得ることになる。つまり配線の高密
度化乃至多層印刷配線基板の小形化なども容易に図り得
る。また、基板主面の配線パターン間を内層配線パター
ンにより接続する必要もなくなるので、内層配線パター
ン層の低減乃至他の信号配線パターンとしての利用も可
能となり、多層印刷配線基板の大容量化を図り得る。さ
らに、基板主面の配線パターン間の接続を、内層配線パ
ターンおよびスルホールによる代りに、ジャンパー配線
で行なうため、基板主面に接続用ランドの形成も不要と
なり、この分基板主面を配線パターン形成領域として利
用し、配線の高密度化を行い得る。
[Effects of the Invention] As described above, the multilayer printed wiring board according to the present invention, in which the required wiring patterns are formed and provided in a manner that substantially intersects on the main surface of the board, has a structure in which the wiring patterns are connected in the intersecting regions. Since no through holes are used in the structure, the inner wiring pattern layer can be used for other signals. In other words, it is possible to easily increase the density of wiring and reduce the size of multilayer printed wiring boards. In addition, since there is no need to connect wiring patterns on the main surface of the board with inner layer wiring patterns, it is possible to reduce the number of inner layer wiring patterns or use them as other signal wiring patterns, increasing the capacity of multilayer printed wiring boards. obtain. Furthermore, since connections between wiring patterns on the main surface of the board are made by jumper wiring instead of using inner layer wiring patterns and through-holes, there is no need to form connection lands on the main surface of the board, and the wiring pattern can be formed on the main surface of the board. It can be used as an area to increase wiring density.

【図面の簡単な説明】[Brief explanation of drawings]

第1図およびm2図は本発明に係る多層印刷配線基板の
要部構成例を示し、第1図は断面図、第2図は平面図、
第3図および第4図は従来の多層印刷配線基板の要部構
成を示し、第3図は断面図、84図は平面図である。 1・・・・・・・・・多層印刷配線基板本体la、 l
b・・・基板主面の交叉配線パターン2・・・・・・・
・・スルホール 2a・・・・・・・・・スルホール導体層3・・・・・
・・・・ジャンパー配線 4・・・・・・・・・ボンディングバット5・・・・・
・・・・レジスト層
FIG. 1 and FIG.
3 and 4 show the main part structure of a conventional multilayer printed wiring board, with FIG. 3 being a sectional view and FIG. 84 being a plan view. 1......Multilayer printed wiring board main body la, l
b...Cross wiring pattern 2 on the main surface of the board...
...Through hole 2a...Through hole conductor layer 3...
...Jumper wiring 4...Bonding butt 5...
・・・Resist layer

Claims (1)

【特許請求の範囲】[Claims]  少くとも基板主面で実質的に交叉する形で所要の配線
パターンが形成された多層印刷配線基板であって、前記
基板主面で実質的に交叉する一方の配線パターンを交叉
する領域でワイヤボンディングによりジャンパー配線に
て電気的に接続して成ることを特徴とする多層印刷配線
基板。
A multilayer printed wiring board in which a required wiring pattern is formed so as to substantially intersect at least on the main surface of the board, and wire bonding is performed in an area where one of the wiring patterns that substantially intersects on the main surface of the board intersects. A multilayer printed wiring board characterized by being electrically connected by jumper wiring.
JP22481089A 1989-08-31 1989-08-31 Multilayer printed wiring board Pending JPH0388392A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22481089A JPH0388392A (en) 1989-08-31 1989-08-31 Multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22481089A JPH0388392A (en) 1989-08-31 1989-08-31 Multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPH0388392A true JPH0388392A (en) 1991-04-12

Family

ID=16819564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22481089A Pending JPH0388392A (en) 1989-08-31 1989-08-31 Multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH0388392A (en)

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