JPH0388298A - Illumination device - Google Patents

Abstract

PURPOSE:To simplify the configuration of a control means in an illuminating device by switch-controlling a switch means with output of a first IC and a second IC. CONSTITUTION:When an electric power circuit 5 is closed, a first condenser 11 is charged at once by charging circuit 14 and kept at a constant voltage by a resistance 13 and a voltage regulation element 15. At the same time, a clock pulse is applied to CP input terminals of first and second ICs 9, 10 by a pulse generating circuit 21 and connecting circuits 22 linked with the charge of the first condenser 11. Data input to the first and second ICs 9, 10 is given with voltage of respective second and third condensers 17, 18, but the charging is delayed because of passing through first and second resistant circuits 19, 20. Consequently the data input to the ICs 9, 10 at the time of applying clock pulse is both at low level, while Q output is high level and Q output is low level in both the ICs 9, 10, and switches 3 and 4 are close-controlled so as to light up lamps A and B. In this way the control means is mostly composed of the ICs and their functional circuits enabling the simple constitution.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a lighting lamp whose illumination state is switched in multiple stages by a switch means such as a relay, and a lighting lamp whose power supply circuit is switched off within a certain period of time. The present invention relates to an improvement in a lighting device including a control means for switching the switch means one step in a predetermined order and returning the switch means to the predetermined step in conjunction with the cutoff exceeding the predetermined time.

[Conventional technology]

The above-mentioned lighting device is well known from Japanese Patent Publication No. 55-5840 and commercially available products, but in both cases the configuration of the control means is complicated.

[Problem to be solved by the invention]

When simplifying the configuration of the control means using an IC, an operation circuit for the IC itself is newly required, so the I
Even if the configuration excluding C and its operating circuit were to be halved, the overall configuration could become even more complex.

In order to solve this problem, the operating circuit of the IC needs to be not just an operating circuit, but a multi-purpose circuit that fulfills some of the functions of the configuration of the control means.

[Means for Solving the Problems] The basic configuration of the present invention will be explained with reference to FIG. 1. Reference numeral 1 denotes an illumination lamp whose illumination state can be switched in multiple stages, including lamps A and B, for example. Reference numeral 2 denotes a switch means for switching the illumination state, which includes, for example, a switch 3 connected in series to the lamp A and a switch 4 connected in series to the lamp B. The power supply circuit 5 of the illumination lamp 1 is connected to a commercial power supply 7 through a wall switch 6, for example.

The control means has the configuration shown in broken line 8, and includes first and second ICs 9 and 10, which are D-type flip-flops, and their VDD terminals. A first capacitor 11 connected between the terminals and a full-wave or half-wave rectifier 1 from the power supply circuit 5.
2, a charging circuit 14 for charging the first capacitor 11 through a resistor 13, a constant voltage circuit consisting of a constant voltage element 15 and a resistor 13 connected in parallel to the first capacitor 11, and a power supply circuit 5 cutoff. A discharge circuit 16 for discharging the first capacitor 11 at a constant time constant, and a first IC
9 D (data) input terminal and ■. a second capacitor 17 connected between the second ICl0 terminal and a third capacitor 1 connected between the D input terminal and the VSS terminal of the second ICl0.
8, the D input terminal of the first IC9 and the Q of the second IC10.
(Q depending on the embodiment) A first resistor circuit 19 connecting the output terminal, and a D input terminal of the second ICl0 and the first IC9.
A second resistor circuit 20 connects the Q (in some embodiments, Q) output terminal, a pulse generating circuit 21 for generating a pulse voltage in conjunction with the charging of the first capacitor 11, and a pulse generating circuit 21 for generating a pulse voltage in conjunction with the charging of the first capacitor 11. CP of the first and second ICs 9 and 10 (
Connection circuit 2 for applying clock pulse) to the input terminal
2.

The switches 3 and 4 are controlled to close by the outputs of ICs 9 and 100,000 (Q depending on the embodiment), respectively, but since switch control by IC outputs generally belongs to the conventional technology, detailed illustrations will be omitted.

[Effect]

When the power supply circuit 5 is closed for the first time, the first capacitor 11 is immediately charged by the charging circuit 14, and a constant voltage is maintained by the resistor 13 and the constant voltage element 15. This voltage becomes vDD of the first and second ICs 9 and 10. At the same time, the first
A pulse generation circuit 21 linked to charging of the capacitor 11 of
A clock pulse is applied by the connection circuit 22 to the CP large input terminals of the first and second ICs 9 and 10.

The data inputs of the first and second ICs 9 and 10 are respectively
is given by the voltage of the third capacitor 17.18,
Even if these capacitors are charged after the power supply circuit 5 is closed, the charging is delayed because they pass through the first and second resistor circuits 19, 20, respectively. Therefore, when the clock pulse is applied, the data inputs of ICs 9 and 10 are both at low level (below Vtw), and the Q output of both ICs 9 and 10 is high level (voo) and the Q output is low level' (vt
*) will be in the state. This is the first stage, IC9,10
Switches 3 and 4 are controlled to close by the Q output of , and lamps A and B are lit.

In the first stage, the Q output of the first IC9 is low level, and the second I
The Q output of Cl0 is high level and the second capacitor 1
Only 7 is charged to vDD. Therefore, the data input is such that the first IC9 is at a high level and the second ICl0 is at a low level, and then when a clock pulse is applied, the Q output of IC9 and the Q output of ICl0 are at a high level in the second stage. Become.

In the second stage, switch 4 is closed and lamp B is lit.

The clock pulse is applied by once cutting off the power supply circuit 5. When the power supply circuit 5 is shut off, the first capacitor 11 is discharged by the discharge circuit 16, and in conjunction with the charging of the capacitor by re-closing the power supply circuit, the pulse generation circuit 2
1 is activated.

However, if a certain period of time, such as one second, elapses between the shutoff and the re-closing, the switch does not switch to the second stage but returns to the first stage. When the power supply circuit 5 is cut off, the first capacitor 11 is connected to the discharge circuit 16.
The second capacitor 17 is also discharged with the same time constant through the IC internal diode and the discharge circuit 16. Therefore, for example, if the time constant is set so that the voltage drops to vT after 1 second, if the power supply circuit 5 is shut off and then reclosed after 1 second or more, the first and second ICs 9 and 10 Both data inputs are low level;
Return to the first step.

In the second stage, both the Q output of the first IC9 and the hundred output of the second IC10 are at high level, and the second and third capacitors 17
．． Since 18 are charged together, the data inputs of ICs 9 and 10 are both high.

Therefore, once a clock pulse is applied by cutting off the power supply circuit 5, the Q outputs of both ICs 9 and 10 become high level at the third stage. In the third stage, both Sui and Sochi 3.4 are not controlled to close, and the lamp 1 is turned off.

However, if a certain period of time, such as 1 second, elapses between shutting off the power supply circuit 5 and closing it again, the data inputs of both ICs 9 and 10 will become low level due to discharge of the capacitors 17 and 18.
Return to the first step.

In the third stage, the Q output of IC9 is at a high level and the capacitor 1
8 is charged, the data input of ICl0 is at a high level, and the Q output of ICl0 is at a low level and the capacitor 17
is not charged, so the data input of IC9 is at a low level. Therefore, by once cutting off the power supply circuit 5 and applying the clock pulse, the 100 output of the first IC 9 and the second I
The Q output of Cl0 becomes the fourth stage with a high level. In the fourth stage, switch 3 closes and lamp A lights up.

However, if a certain period of time, such as 1 second, elapses between shutting off the power supply circuit 5 and closing it again, the capacitor 18 will discharge and the ICl
The 0 data input becomes a low level and returns to the first stage.

In the fourth stage, the Q output of IC9 and the 100 output of ICl0 are at a low level, and both capacitors 17 and 18 are not charged, so the data inputs of both IC9 and 10 are at a low level. Therefore, once the power supply circuit 5 is cut off and a clock pulse is applied, both the first IC 9 and the second IC 0 return to the first stage where the Q output is at a low level. In this case, capacitor 17.
18 has been discharged in advance, the switch to the first stage is made regardless of the time from when the power supply circuit 5 is cut off to when it is closed again.

〔Example〕

The most general embodiment of the lighting device of this invention will be explained with reference to FIG. In the same embodiment, an inverter fluorescent lamp 23 and a miniature bulb 2
The illumination lamp 25 consisting of 4 is switched by a switch means 26 into three stages: full lighting of the fluorescent lamp in the first stage, dimmer lighting of the fluorescent lamp in the second stage, and lighting of small bulbs in the third stage.

The control means 28 for switching the switch means 26 in conjunction with the interruption of the power supply circuit 27 will be described next.

The IC29 includes a first IC30 and a second IC31, each of which is a D-type flip-flop, but the vDD and VSS terminals are common, and a first capacitor 3 is connected between the two terminals.
2 is connected. Resistor 33 and diode 34 constitute a charging circuit for first capacitor 32 . The resistor 33, the emitter-base circuit of the transistor 35, and the Zener diode 36 constitute a constant voltage circuit for keeping the voltage of the first capacitor 32 at a constant voltage. The resistor 37 constitutes a discharge circuit for discharging the first capacitor 32 at a constant time constant when the power supply circuit 27 is cut off. The second capacitor 38 is connected to the Di input terminal of the first IC 30. Between the terminals, a third capacitor 3'9 is connected to a second 1cai capacitor,
Each is connected between the input terminal and the VSS terminal. 1st
The D1 input terminal of the IC 30 is connected to the Q output terminal of the second IC 31 by the first resistor circuit 40, and the
31 glue.

The input terminal is connected to the first IC 30 by the second resistor circuit 41.
Q of is connected to the output terminal.

42 indicates a clock pulse generation circuit. When the first capacitor 32 is charged and reaches the Zener voltage of the Zener diode 36, the transistor 35 is turned on and the capacitor 43 is charged through the resistor 44. 1 I
It is applied to the CP input terminal of C30 and the CP1 input terminal of the second IC31. When the first capacitor 32 is discharged by cutting off the power supply circuit 27, the transistor 35 is turned off, and the capacitor 43 is discharged by the resistor 46.

The operation of the control means 28 is basically the same as that of the control means 8 shown in FIG. Initially, the second and third capacitors 38 and 39 are not charged, so the data input of IC29, that is, the first IC30 input and the second IC31 input, are both at a low level, so the output of IC30 is and ``5!'' output of IC31 both become high level first stage.

In the first stage, the capacitor 47 is charged by the ``Qt output, and 5
CRJ8 turns on, and fluorescent lamp 2 passes through the rectifier bridge 49.
3 lights up.

In the first stage, the second IC3 is charged by charging the third capacitor 39.
1, the input is at a high level, and the second capacitor 38 is not charged, and the first IC 30 is connected, the input is at a low level.
The clock pulse caused by the power supply circuit 27 being cut off once,
Output and Q, the output becomes the second stage with high level. However, when the power supply circuit is shut off and then closed again, the first capacitor 32
When a certain period of time or more, which is appropriately set by the discharge time constant of
Since both the i input % and Dt inputs become low level, the process returns to the first stage.

In the second stage, the fluorescent lamp 23 lights up on page and output as in the first stage, but Q! Small output capacitor 50 is charged and 5CR
51 is turned on and the dimming input is applied to the same fluorescent lamp, so
The fluorescent lights are dimmed.

In the second stage, the second and third capacitors 38 and 39 are both charged, and the D1 input of IC30 and the input of IC31 are both at a high level, so the clock pulse caused by the power supply circuit 27 being temporarily cut off causes Q and output. , the Q output becomes high level, but the Q output terminal and the CL terminal (second I
Since the clear input terminal of C31 is short-circuited, Q of the second IC 31 immediately changes to a high level state.

This is the third stage, but if a certain period of time has passed after the power supply circuit 27 was cut off and closed again, the capacitor 38 and 3
Return to the first stage with a discharge of 9.

In the third stage, Q, the capacitor 52 is charged at the output, and the voltage is 5C.
R53 turns on and the miniature bulb 24 lights up.

In the third stage, both the second and third capacitors 38 and 39 are not charged, and both D, input and input are at low level.

Therefore, once the power supply circuit 27 is shut off, it returns to the first stage regardless of the time from shutoff to re-closing.

When switching from the second stage to the third stage, the Q and output of the second stage are Appear. For this reason, the fluorescent lamp 23 may flash for a moment before the third stage miniature bulb 24 lights up, making the user feel uncomfortable. Therefore, in this embodiment, the charging of the capacitor 47 is momentarily delayed by the resistor 54 to prevent the fluorescent lamp 23 from flashing momentarily.

In this embodiment, since charging of the first capacitor 32 is performed by half-wave rectification using the diode 34, the power supply circuit 27 for switching the switch means 26 may be cut off by either full-wave cut-off or half-wave cut-off.

〔Effect of the invention〕

To perform control to switch the illumination state of the lighting lamps in a predetermined order in conjunction with the power supply circuit being cut off once, and to return to the initial lighting state regardless of the order if the same cut-off continues for a certain period of time such as 1 second. As is clear from 8 in FIG. 1 and 28 in FIG. 2, the control means consists mostly of an IC and its operating circuit.

That is, the first and second D type flip-flop ICs
And ■. . There are almost no components other than the circuit, clock pulse circuit, and data circuit. Therefore, the simplification of the configuration of the control means through the use of an IC has been extremely effectively achieved.

[Brief explanation of drawings]

FIG. 1 shows the basic configuration of the lighting device of the present invention. FIG. 2 shows the most general embodiment of the lighting device of the invention.

Claims (1)

[Claims] A lighting lamp whose illumination state is switched in a plurality of stages by a switch means, and the switch means is switched one stage in a predetermined order in conjunction with the interruption of the power supply circuit within a certain period of time, and the lighting state is switched in one stage in conjunction with the interruption of the power supply circuit for a certain period of time. A lighting device comprising a control means for returning the switch means to a predetermined stage, the control means comprising first and second ICs that are D-type flip-flops;
a first capacitor connected between the V_D_D terminal and the V_S_S terminal of the first capacitor, and a charging circuit for charging the first capacitor from the power supply circuit through a rectifying element;
a constant voltage circuit for maintaining the voltage of the first capacitor at a constant voltage; a discharge circuit for discharging the first capacitor at a constant time constant when the power supply circuit is cut off; a second capacitor connected between the data input terminal and the V_S_S terminal; a third capacitor connected between the data input terminal and the V_S_S terminal of the second IC; and a third capacitor connected between the data input terminal and the V_S_S terminal of the second IC; a first resistance circuit that connects a data input terminal and an output terminal of the second IC; a second resistance circuit that connects a data input terminal of the second IC and an output terminal of the first IC; A pulse generation circuit for generating a pulse voltage in conjunction with charging of the first capacitor, and a connection circuit for applying this pulse voltage to the clock pulse input terminals of the first and second ICs. A lighting device characterized in that the switching means is switched and controlled by the outputs of the first and second ICs.