JPH0386074A - Pulse width modulator for push-pull booster converter - Google Patents

Abstract

PURPOSE:To prevent a converter transformer from being irregularly magnetized by employing two switching elements to be driven by two pulses of a frequency divider, and two switching elements to be driven by two pulses of a general switching power source IC, and controlling the transformer by the switching elements. CONSTITUTION:One end of the primary side of a converter transformer 4 is connected to the collectors of transistors Tr1, Tr3, the other end is connected to the collectors of transistors Tr2, Tr4, and the midpoint of the primary side is connected to a DC power source through a choke coil 5. An oscillator 1 supplies a timing clock to a frequency divider 2 and a general switching power source IC 3, the divider 2 generates a driving pulse for conducting the transistors Tr1, Tr2, and the IC 3 generates a pulse for driving the transistors Tr3, Tr4.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a pulse width modulation circuit, and particularly to a pulse width modulation circuit for a push-pull boost converter in which the switching time of a switching element is more than half of one cycle. Regarding.

(Prior Art) Fig. 2 is a circuit diagram of a pulse width modulation circuit of a conventional push-pull boost converter.In the six figures, 4 is a converter transformer, 5 is a choke coil, 6 is a feedback input terminal, 10 is an oscillator 11.12 is a sawtooth wave generator, 13.
14 is a comparator, D is a diode, 'I''r5.T
r6 is an npn type transistor. The circuit configuration and operation of this conventional push-pull boost converter pulse width modulation circuit will be described below.

One end of the primary side of the converter transformer 4 is connected to the collector of an npn type transistor Tr5, and the other end of the primary side of the converter transformer 4 is connected to the collector of an npn type transistor Tr6. It is connected to a DC power source via a choke coil 5. npn type transistor Tr
The emitter of 5 is grounded, and its base is connected to the output terminal of comparator 13. The emitter of the npn transistor Tr6 is grounded, and its base is connected to the output terminal of the comparator 14.

The oscillator 10 supplies two clocks with the same wavelength and a phase difference of 180° to the sawtooth wave generator 1112, and the sawtooth wave generators 11 and 12 each supply two clocks with the same wavelength and a phase difference of 180°.
Two sawtooth waves differing by 80 degrees are generated and the sawtooth waves are supplied to comparators 13 and 14, respectively. One of the two input terminals of the comparator 1<rator 13 and 14 is connected to the feedback input terminal 6, respectively, and the comparator 13 compares the sawtooth wave from the sawtooth wave generator 11 and the feedback voltage from the feedback input terminal 6. generates a pulse that is the conduction time of the npn transistor Tr5, outputs it to the base of the npn transistor Tr5, and outputs it to the base of the npn transistor Tr5.
The n-type transistor Tr5 is driven. On the other hand, the comparator 14 compares the sawtooth wave from the sawtooth wave generator 12 with the feedback voltage from the feedback input terminal 6 to generate a pulse that is the conduction time of the npn transistor Tr6.
Output to the base of pn type transistor Tr6, npn
The transistor Tr6 is driven.

At this time, the sawtooth waves generated by the sawtooth wave generators 11 and 12 are out of phase by 180 degrees, so
From the comparators 13 and 14, the npn type transistor T
r5. The pulses output to Tr6 also have a phase of 18
0 degree difference l6. npn type transistor Tr5. The conduction time of each Tr 6, that is, the width of the pulse generated by the comparators 13 and 14, is usually about one-quarter of one period of the sawtooth wave generated by the sawtooth wave generator 11 and 12, and It varies depending on the feedback voltage from the

(Problems to be Solved by the Invention) In the pulse width modulation circuit of the conventional push-pull boost converter described above, if the slopes of the sawtooth waves generated by the sawtooth wave generators 11 and 12 do not match, the converter There is a difference in the width of each pulse generated by the npn transistors Tr5.13 and Tr5.14. Tr
6 will be different, causing magnetic leakage in the converter transformer 4 and causing excessive current to flow. However, since it is very difficult to adjust the circuits of the sawtooth wave generators 11 and 12, this will occur in the converter transformer 4. Conventional push-pull boost converters have problems that need to be solved, such as magnetism that is difficult to prevent and reduces the reliability of push-pull boost converters.

(Means for Solving the Problems) Means provided by the present invention to solve the above-mentioned problems are as follows:
an oscillator that generates a timing clock; a frequency divider that receives the timing clock and generates two driving pulses; and an IC for a general-purpose switching power supply that receives the timing clock and a feedback signal and generates two driving pulses;
first and second switching elements driven by two drive pulses of the divided period, and third and fourth switching elements driven by two drive pulses of the general-purpose switching power supply IC.
The first switching element and the third switching element are connected to one end of the primary side of the converter transformer whose primary side midpoint is connected to a DC power supply, and the second switching element is The switching element and the fourth switching element are connected to the other end of the primary side of the converter transformer, and the converter transformer is connected to the first switching element, the second switching element, the third switching element, and the third switching element. (Example) Next, the present invention will be described in detail with reference to Examples.

FIG. 1 is a circuit diagram showing one embodiment of the present invention. In this figure, 1 is an oscillator, 2 is a frequency divider, 3 is a general-purpose switching power supply IC 14 is a converter transformer, 5 is a choke coil, and 6 is a Feedback input terminal, D is a diode, T r
1, T r 2 + T r 3 + T r 4 are npn type transistors. The circuit configuration and operation of this embodiment will be explained below.

One end of the primary side of the converter transformer 4 is connected to the collector of the npn type transistor Tri and the npn type transistor T.
The other end on the next side is connected to the collector of the npn type transistor Tr2 and the collector of the npn type transistor Tr4, and the middle point on the next side is connected to the choke coil. It is connected to a DC power supply via 5. Four npn type transistors Tri, T
r2. Tr3. Each emitter of Tr4 is grounded. n
The bases of pn type transistors Tri and Tr2 are respectively connected to the two pulse output terminals of the frequency divider 2, and the bases of the pn type transistors Tri and Tr2 are respectively connected to the two pulse output terminals of the frequency divider 2. The base of the Tr4 is connected to the two pulse output terminals of the general-purpose switching power supply IC3, respectively.0 oscillator 1 supplies the timing clock to the frequency divider 2 and the general-purpose switching power supply IC3.0 frequency divider 2 supplies the timing clock. and a clock obtained by dividing the frequency of the timing clock by half, to generate two driving pulses for making the npn transistors Tri and Tr2 conductive.

The period of these two driving pulses is the same as the period of the clock obtained by dividing the timing clock of oscillator 1 into half, and the pulse width is one-fourth of one period of this driving pulse.
The phases of the two drive pulses are 180 degrees different l1. Therefore, npn type transistors Tri, Tr
2 are alternately rendered conductive, and their conduction time is one quarter of one period of the clock obtained by dividing the timing clock of the oscillator 1 by half. On the other hand, the general-purpose switching power supply IC3 uses the timing clock from the oscillator 1! npn with the feedback voltage from Ifl feedback input terminal 6
A transistor Tr3. A drive pulse is generated to make Tr4 conductive. The period of these two driving pulses is np
It is the same as the period of the drive pulse of the n-type transistors Tri and Tr2, and its pulse width changes with the feedback voltage from the feedback input terminal 6 within a range of one quarter or less of one period of this drive pulse. The phases of the drive pulses differ by 180 degrees l1. Also, since the pulse that drives the npn transistor Tri and the pulse that drives the npn transistor Tr3 are 90 degrees different in phase, the four np
N-type transistors Tri, Tr2 . Tr3. The conduction state of Tr4 is Tri-+'l'r2-+Tr3-+Tr4
Conductivity occurs alternately in this order. Therefore, each npn type transistor Tri, Tr2 . Tr3. In the first half of one cycle of the driving pulse of Tr4, two npn type transistors T
ri and Tr3 become conductive separately to switch one end of the primary side of the converter transformer 4, and in the latter half, two npn type transistors 'T''r2.Tr
4 are individually turned on and the other end of the primary side of the converter transformer 4 is switched.

Generally, there is no difference in time width between the two pulses generated by a frequency divider, and the IC3 for general-purpose switching power supplies
Since the converter has a compensation circuit therein, there is almost no difference in the pulse widths of the two drive pulses that they each output, and biased magnetization does not occur in the converter transformer 4.

(Effects of the Invention) As described above in detail, according to the present invention, a period dividing and general-purpose switching power supply IC is used as a drive pulse generator for a transistor that switches one end and the other end of the primary side of a converter transformer, respectively. As a result, there is no difference in the pulse widths of the drive pulses of the transistors, so there is no magnetic leakage in the converter transformer, and the reliability of the push-pull boost converter is improved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional push-pull boost converter pulse width modulation circuit. DESCRIPTION OF SYMBOLS 1... Oscillator, 2... Frequency divider, 3... General-purpose switching power supply IC54... Converter transformer, 5...
...Choke coil, 6...Feedback input terminal, 10...
・Oscillator. 11.12...Sawtooth wave generator, 13.14...
Comparator, D-...diode, Trl, Tr2°Tr3. Tr4. 'T'r5. Tr6-npn type transistor.

Claims (1)

[Claims] an oscillator that generates a timing clock; a frequency divider that receives the timing clock and generates two driving pulses; and an IC for a general-purpose switching power supply that receives the timing clock and a feedback signal and generates two driving pulses;
first and second switching elements driven by two drive pulses of the divided period, and third and fourth switching elements driven by two drive pulses of the general-purpose switching power supply IC.
The first switching element and the third switching element are connected to one end of the primary side of the converter transformer whose primary side midpoint is connected to a DC power supply, and the second switching element is The switching element and the fourth switching element are connected to the other end of the primary side of the converter transformer, and the converter transformer is connected to the first switching element, the second switching element, the third switching element, and the third switching element. A pulse width modulation circuit for a push-pull boost converter, characterized in that switching is controlled by a switching element of No. 4.