JPH0385815A - Reset circuit - Google Patents

Abstract

PURPOSE:To generate a reset signal without losing the operation of a variable power supply by using the result of comparison between a reference voltage obtained from a smaller reference voltage than the voltage being a power voltage of an integrated circuit and a 2nd voltage, as a reset signal. CONSTITUTION:Resistors R1-R3, R4, R5 are used as 1st-3rd resistors connected in series to divide the voltage of a DC power supply, and 4th and 5th resistors connected in series similarly to divide the voltage of a DC power supply, and a Zener diode is connected in parallel with the resistors R2, R4 in opposite polarity. Then each resistance is selected to satisfy equations I, II, where V0 is a maximum voltage of the DC power supply and Vz is the Zener voltage of the Zener diode. Then the voltage V1 across the resistor R3 and a voltage V2 across the resistor R5 are inputted to a voltage comparison means, where they are compared to output a reset signal. Thus, even when the voltage of the DC power supply is increased from 0V gradually, correct reset is attained.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a reset circuit that generates a power-on reset signal for an integrated circuit, and particularly when the output voltage of a variable voltage DC power supply is gradually applied from Ov. The present invention relates to a reset circuit that generates a reset signal suitable for.

[Conventional technology]

Conventionally, the configuration of a reset circuit that generates a power-on reset signal as shown in FIG. 5 is known, and when the switch SW is turned on, the charging period of the capacitor C via the resistor R is used to output a Low signal to the load. I did a reset. As a document related to such prior art, Japanese Patent Application Laid-Open No. 1986-
Publication No. 45221 is mentioned.

[Problem to be solved by the invention]

The above conventional technology does not take into consideration the reset signal that is output when the power supply voltage gradually increases from Ov, and the power supply voltage is gradually increased through a dimmer to a fluorescent lamp with a control integrated circuit, etc. When supplying power to the control integrated circuit, the integrated circuit was unable to power-on reset.

This will be explained in detail below with reference to FIG.

FIG. 3 is a circuit diagram showing once again the basic circuit configuration of the reset circuit in the prior art. In the figure, 14 is a variable DC voltage source, 8 is a Zener diode, 9 is a resistor, 10 is a capacitor, and 13 is an integrated circuit with a reset terminal.9 When a DC voltage V is suddenly applied from voltage source 4 , resistor 9, and capacitor 10, a reset signal is input when power supply voltage VCC of integrated circuit 13 is applied. However, if the output voltage of the voltage g14 is gradually applied from Ov at a time sufficiently slower than the relationship between the time constants of the resistor 9 and the capacitor 10, as shown in FIG. There was a problem in that the integrated circuit 13 was not reset because the reset signal input to the integrated circuit 13 had the same voltage value as the power supply voltage vCC of the integrated circuit engineer 3.

The horizontal axis in FIG. 4 indicates the voltage value of the voltage source 14 when the power supply voltage is gradually applied from Ov.

SUMMARY OF THE INVENTION An object of the present invention is to provide a reset circuit that can solve the above problems and generate a reset signal without impairing the operation of a variable voltage source.

[Means to solve the problem]

The above purpose is to generate a reference voltage V which is smaller than VCC and a second voltage in addition to the voltage VCC which is the power supply voltage of the integrated circuit, and to compare the reference voltage obtained from Vl with the second voltage. This can be distantly related by using it as a reset signal.

[Effect]

1st to 3rd connected in series to divide the voltage of the DC power supply
As the fourth and fifth resistors connected in series, which divide the voltage of the DC power supply in the same way as the resistors shown in FIG.

and connect a Zener diode in parallel with R2, R, in the opposite direction. At this time, the maximum voltage value of the DC power supply is ■.

, where the Zener voltage of the Zener diode is Vz, each resistance value is set to satisfy the following two equations. Resistor R
Voltage V1 across resistor 3 and voltage V across resistor 5.

A reset signal is output by inputting and comparing the voltage to the voltage comparison means. In this way, even if the voltage value of the DC power supply is gradually increased from Ov, the reset can be performed correctly.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. Figure ↓ shows a part of the circuit that controls the dimming of a fluorescent lamp.The part surrounded by the dotted line, which consists of a 100V commercial AC power supply 1, a conduction angle control circuit 2, a rectifier circuit 3, and a smoothing capacitor 4, is a variable voltage DC current. This is a power supply circuit. The conduction angle control circuit 2 connects both ends of the smoothing capacitor 4 to 0 to 1. OOV DC voltage V4 is obtained. When the DC voltage v4 is gradually applied from Ov, the resistor 71.72 and the Zener voltage Vz of the Zener diode 5.8 cause the resistor 71.
A DC voltage of VCC in FIG. 2 is obtained across the terminal 72. In order to initialize (reset) the integrated circuit 13 that has a reset terminal, it is necessary to apply a reset when vCC is applied. The voltage v1° across the resistor 10 is set to VC by the resistors 9 and 10 and the Zener diode 8 for protection.
By setting the voltage to a value smaller than C, a DC voltage of ■1° in Fig. 2 is obtained. The voltage v7 obtained across the resistor 72
□ and vi. are input to the comparator 12 and compared.

Resistor 6 is R, 71 is R, 72 is R1, 9 is R4゜10 is R, :If the maximum value of V4 is V4 (max), then Vz)-2L-V, then V ,>V.

R, +R, R, +R.

−”L−Vz<　　”’　　V, teVtz<Vz.

R2+R3R4+R.

Therefore, vl is applied to the output terminal of the comparator 12. The RESET voltage in Figure 2 that remains Low until the voltage value of V7□ exceeds the voltage value of V7□ is obtained, and by using this as a reset signal, a reset is performed when the electric voltage vCC of the integrated circuit 13 is applied. , and the integrated circuit 13 is initialized.

The horizontal axis in FIG. 2 shows the voltage value of the voltage source when voltage is gradually applied from Ov to the variable voltage DC power source.

Although the integrated circuit 13 serves as a low-enable reset terminal, it is also possible to obtain a high-enable reset signal by switching the inputs of the comparator 12.

In addition, since a reset signal is output through a comparator, the ratio of resistors 6, 71, 72, 9, and 10 can be changed to set vl. , ■7□, it is possible to reset the integrated circuit 13 in any state.

Furthermore, even if you do not gradually increase the voltage value of V4 from 0■ but suddenly turn on VCC and turn on VCC, by inserting capacitor 11 in parallel with resistor 10, resistor 9 and capacitor 11 integrated circuit 1 due to the time constant relationship of
3 is reset.

In addition, by using the threshold voltage of the integrated circuit as the target of voltage comparison instead of (2) and (2), Vi
. The reset signal can also be used to reset the integrated circuit.

〔Effect of the invention〕

According to the present invention, it is possible to generate a reset signal even when the power supply voltage is gradually applied from OV using a variable voltage DC power supply using a conduction angle control circuit, etc. This has the effect of being able to power-on reset the circuit.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
3 is a circuit diagram showing the basic configuration of the power-on reset circuit. FIG. 4 is a timing chart showing the main voltage waveforms in FIG. This is a reset circuit diagram. 1... AC power supply, 2... Continuity angle control circuit, 3... Rectifier circuit, 4.11... Smoothing capacitor, 5.8... Zener diode, 6.71.72.9.10 ...Resistor, 12゛/Comparator, 13...Integrated circuit with reset terminal, 14...Variable voltage DC power supply. ] ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼ ＼

Claims (1)

[Scope of Claims] 1. A reset circuit that supplies a DC power supply that gradually rises to a certain maximum voltage to a load, and also generates and supplies a reset signal from the DC power supply to power-on reset the load. , a first circuit connected in series for dividing the DC power supply voltage;
to a third resistor, fourth and fifth resistors connected in series for similarly dividing the DC power supply voltage, and a series connection circuit of the second resistor and the third resistor. input a constant voltage diode connected with opposite polarity, a first voltage V1 taken out from both ends of the third resistor, and a second voltage V2 taken out from both ends of the fifth resistor. and a comparison circuit that outputs a reset signal to the load when V1>V2, and sets the resistance values of each of the first to fifth resistors to R1 and R2.
, R3, R4, R5, R5/(R4+R5)
<R3/(R1+R2+R3) holds true, and further, when the maximum voltage of the series power supply is V0 and the Zener voltage of the voltage regulator diode is V_z, {R3/(R2+R3)}V_z< {R5/(R4+R5) } A reset circuit characterized in that a relationship such as V0 is established.