JPH0384831A - Plasma display panel - Google Patents

Plasma display panel

Info

Publication number
JPH0384831A
JPH0384831A JP1222042A JP22204289A JPH0384831A JP H0384831 A JPH0384831 A JP H0384831A JP 1222042 A JP1222042 A JP 1222042A JP 22204289 A JP22204289 A JP 22204289A JP H0384831 A JPH0384831 A JP H0384831A
Authority
JP
Japan
Prior art keywords
barrier
distance
picture elements
pixel
row electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1222042A
Other languages
Japanese (ja)
Inventor
Yoshio Sano
佐野 與志雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1222042A priority Critical patent/JPH0384831A/en
Publication of JPH0384831A publication Critical patent/JPH0384831A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To decrease the probability that a longitudinal electrode is covered by a barrier, even with an increase in the barrier width caused by dislocation of the barrier or paste drop, etc., or decrease in the width of the longitudinal electrode, etc., so as to prevent lack of picture elements that may arise from stoppage of electric discharge by adopting such configuration that adjacent picture elements bite into one another. CONSTITUTION:The arrangement and configuration of picture elements is stretched to the side of line electrodes 3 more than conventional ones and the picture elements are so arranged as to bite into one another. As to one side of a triangle connecting the centers of the picture elements 11 which side is parallel to longitudinal electrodes 4 and the distance x from the crossing point of a barrier 9 to the center, the distance (x) is half the distance (z) from the parallel side to the apex of the triangle within normal arrangement of rectangular picture elements. When the configuration of the picture elements 11 is such that they bite into one another to the side of the longitudinal electrode 4, then the distance (x) is less than half the distance (z) and in extreme cases the distance (x) is zero; the probability that the longitudinal electrodes are covered by the barrier due to slight dislocation of the barrier, broadening of the barrier width or narrowing of the width of each longitudinal electrode is therefore decreased and electric discharge is stably maintained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、近年進展著しいパーソナルコンピュータやオ
フィスワークステーショ〉′、ないしは将来の発展が期
待されている壁がけテレビ等に用いられるドツトマトリ
クスタイプのプラズマデイスプレィの構造に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to the dot matrix type used in personal computers and office workstations, which have been rapidly progressing in recent years, and wall-mounted televisions, which are expected to develop in the future. Regarding the structure of plasma display.

〔従来の技術〕[Conventional technology]

従来のプラズマデイスプレィの構造例を第9図A、Hに
示す。第9図A、Bにおいて、Aは平面図、BはAのa
−a’部分の断面図で、21はガラス等よりなる第1絶
縁基板、22はやはりガラス等よりなる第2絶縁基板、
23は列電極、24は行電極、25.26は絶縁体、2
7.30は保護層であるMgO膜、は放電ガス空間、2
9は障壁、31は画素である。
Examples of the structure of a conventional plasma display are shown in FIGS. 9A and 9H. In Figures 9A and B, A is a plan view and B is a of A.
21 is a first insulating substrate made of glass or the like; 22 is a second insulating substrate also made of glass or the like;
23 is a column electrode, 24 is a row electrode, 25.26 is an insulator, 2
7.30 is an MgO film which is a protective layer, is a discharge gas space, 2
9 is a barrier, and 31 is a pixel.

列電極23と行電極24の間に略1oov以上の交流電
圧を印加すると、列電極23、と行電極24の交点で発
光を生じるので、ドツトマトリクス表示を行うことが可
能である。
When an AC voltage of about 1 oov or more is applied between the column electrode 23 and the row electrode 24, light is emitted at the intersection of the column electrode 23 and the row electrode 24, so that dot matrix display can be performed.

ここで、セル障壁29は、一般に1.スクリーン印刷法
により、ガラスなどを含むペーストを障壁パターンの形
に多層塗りし、その後焼成して作製される。
Here, the cell barrier 29 is generally 1. It is created by applying multiple layers of paste containing glass or the like in the shape of a barrier pattern using screen printing, and then firing it.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述したような従来の技術では、画素の形状は、一般に
、各辺が行電極または列電極に並行な四辺形で、基盤の
目の様に配置されている。第9図の場合、目合せ等のズ
レ、スクリーン印刷時のスクリーンのゆがみ等により障
壁が列電極の方向にずれると、行電極の一部が障壁でお
おわれることになりミ極端な場合は行電極が全て障壁に
おおわれて放電しなくなる欠点がある。またペーストパ
ターンのダレ、及びペースト焼成時のペーストのダレ等
により、障壁幅が増加すると、やはり行電極が障壁でお
おわれることになり、放電を生じなくなる欠点がある。
In the conventional technology as described above, the shape of the pixel is generally a quadrilateral with each side parallel to a row electrode or a column electrode, and is arranged like an eye on a substrate. In the case of Figure 9, if the barrier shifts in the direction of the column electrode due to misalignment, distortion of the screen during screen printing, etc., part of the row electrode will be covered by the barrier, and in extreme cases, the row electrode will be covered by the barrier. There is a drawback that all the electrodes are covered with a barrier and no discharge occurs. Furthermore, if the barrier width increases due to sagging of the paste pattern, sagging of the paste during paste firing, etc., the row electrodes will still be covered with the barrier, resulting in a disadvantage that no discharge will occur.

なお、ここでは第9図の従来例をもとに説明したが、必
ずしも第9図の例に限らず、画素を区切る障壁を用いて
いるドツトマトリクス型のプラズマディスプレイパネル
では、一般的にここで述べたような問題点がある。
Although the explanation here is based on the conventional example shown in FIG. 9, it is not necessarily limited to the example shown in FIG. There are problems as mentioned above.

1課題を解決するための手段〕 本発明によれば、放電ガス空間と、放電ガス空間をはさ
むように並行におかれた2枚の絶縁基板を有し、縞状の
行電極及び、この縞状の行電極に直交し、この縞状の行
電極と電気的に絶縁された縞状の列電極を、絶縁基板の
放電ガス空間側の面上に配置し、2枚の絶縁基板の少く
とも一方の絶縁基板に形状された障壁で区画される各画
素は、基盤目状の配置から互いに隣り合う画素行(又は
列〉を画素行く又は列)に沿って半画案分ずらした配置
のいわゆる三角画素配列を有し、さらに、各画素が行電
極の方に相互に食い込んでおり、隣接する画素間を区分
する障壁の交点の中心点が、互いに隣接する3つの画素
の中心点を結んだ三角形の内側に位置し、かつ、前記三
角形の一辺で行電極に並行な辺よりはかって、この辺と
この辺に対向した三角形の頂点との距離の半分未満の位
置にあることを特徴とするプラズマディスプレイパネル
が得られる。
Means for Solving 1 Problem] According to the present invention, there is provided a discharge gas space and two insulating substrates placed in parallel so as to sandwich the discharge gas space, and the striped row electrodes and the striped row electrodes are arranged in parallel. Striped column electrodes, which are perpendicular to the striped row electrodes and electrically insulated from the striped row electrodes, are arranged on the surface of the insulating substrate facing the discharge gas space. Each pixel partitioned by a barrier formed on one insulating substrate is arranged in a so-called arrangement in which the adjacent pixel rows (or columns) are shifted by half a pixel along the pixel rows (or columns) from the grid-like arrangement of the substrate. It has a triangular pixel arrangement, and furthermore, each pixel interdigitates toward the row electrode, and the center point of the intersection of the barriers separating adjacent pixels connects the center points of three adjacent pixels. A plasma display characterized by being located inside a triangle, and at a position measured from one side of the triangle parallel to the row electrode, less than half the distance between this side and the vertex of the triangle opposite to this side. You get a panel.

〔作用〕[Effect]

本発明は上述の構成を用いることにより従来技術の問題
点を解決した。すなわち、各画素の配列・形状を、列電
極の方に従来よりひきのばし、相互にくいこむような形
状とする。すなわち、第8図に示すように、画素の中心
を結んだ三角形の一辺で行電極に並行な辺yと、障壁の
交点の中心との距離Xについてみると、第8図のように
通常の四角形画素のならびでは、辺yと三角形の頂点ま
での距離2に対して距離Xは1/2である。これに対し
て、各画素の形状を、行電極の方に相互にくい込むよう
にすると距離Xは距離2の1/2未満となり、極端な場
合は距離Xは零となる。このようにすることで障壁の位
置が多少ずれたり、障壁の幅がひろがったり、あるいは
行電極の幅が細くなったりして行電極が障壁におおわれ
る確率が減少し、放電を安定に維持できるようになった
The present invention solves the problems of the prior art by using the above-described configuration. That is, the arrangement and shape of each pixel is extended toward the column electrodes compared to the conventional method, and is shaped so that they are embedded into each other. That is, as shown in Fig. 8, if we look at the distance X between the side y of the triangle connecting the pixel centers and parallel to the row electrode, and the center of the intersection of the barriers, we can see that In a rectangular pixel array, the distance X is 1/2 of the distance 2 between the side y and the vertex of the triangle. On the other hand, if the shape of each pixel is made to embed into the row electrode, the distance X will be less than 1/2 of the distance 2, and in an extreme case, the distance X will be zero. By doing this, the probability that the row electrode will be covered by the barrier due to the position of the barrier being slightly shifted, the width of the barrier being widened, or the width of the row electrode becoming thinner is reduced, and the discharge can be maintained stably. It became so.

また、特に、両側放電の行電極を使用する場合は、行電
極が、障壁を形状するペーストの焼成ダレ等により拡が
っても、行電極をおおってしまうことが少くなり、放電
を安定化する上で非常に効果のあることがわかった。以
下、実施例により、さらに詳細に説明する。
In addition, especially when using row electrodes with discharge on both sides, even if the row electrodes spread due to firing sag of the paste forming the barrier, they are less likely to cover the row electrodes, which helps stabilize the discharge. It turned out to be very effective. Hereinafter, the present invention will be explained in more detail with reference to Examples.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
は本発明の第1の実施例の平面図(第1図A)及び断面
図〈第1図B〉であり、1は2mm厚さのガラスよりな
る第1絶縁基板、2はやはり2mm厚さのガラスよりな
る第2絶縁基板、3は透明なネサ膜(Sn02を主成分
とする透明な薄膜の導電膜)よりなる幅100ミクロン
の列電極、4はA1薄膜よりなる幅300ミクロンの両
側放電の行電極、5,6はAl2O3薄膜よりなる厚さ
2ミクロンの絶縁体、7は絶縁体5の上部を保護する厚
さ0,5ミクロンのMgO膜、8は放電ガス空間、9は
各画素を区切る障壁、10は蛍光体、11.は障壁9で
区画された六角形の形状の画素である。
Next, the present invention will be explained with reference to the drawings. FIG. 1 is a plan view (FIG. 1A) and a cross-sectional view (FIG. 1B) of a first embodiment of the present invention, where 1 is a first insulating substrate made of glass with a thickness of 2 mm, and 2 is also a first insulating substrate made of glass with a thickness of 2 mm. A second insulating substrate made of glass with a thickness of 2 mm, 3 a column electrode with a width of 100 microns made of a transparent NESA film (a transparent thin conductive film whose main component is Sn02), and 4 a column electrode with a width of 300 microns made of an A1 thin film. 5 and 6 are insulators made of Al2O3 thin film with a thickness of 2 microns, 7 is an MgO film with a thickness of 0.5 microns that protects the upper part of the insulator 5, 8 is a discharge gas space, 9 10 is a barrier separating each pixel, 10 is a phosphor, and 11. are hexagonal pixels partitioned by barriers 9.

第1図より明かなように、画素11は従来例と異なり六
角形の形状であり、その頂点が行電極4の方に隣りの画
素行に食い込んでいる。第8図と比較してみると、距離
Xは距Mzに比較して第1図の場合的1/4となってい
る。なおこの値は画素の設計により変動するものの必ず
1/2未満となっている。このような画素構成により、
障壁の位置がずれを生じたり、障壁の幅がペーストのダ
レ等により増加しても各行電極が障壁でおおわれてしま
うことはなくなり、放電が停止することもなくなった。
As is clear from FIG. 1, the pixel 11 has a hexagonal shape, unlike the conventional example, and its apex cuts into the adjacent pixel row toward the row electrode 4. When compared with FIG. 8, the distance X is 1/4 of the distance Mz in the case of FIG. 1. Although this value varies depending on the pixel design, it is always less than 1/2. With this pixel configuration,
Even if the position of the barrier is shifted or the width of the barrier is increased due to sagging of the paste, each row electrode is no longer covered by the barrier, and the discharge is no longer stopped.

また、障壁の位置ずれの許容範囲を広くなるため、パネ
ル製造上非常に有利となった。なおこの場合、障壁の設
計厚さを従来例にくらべて薄くする必要はないので、障
壁自体の製造法に対しては従来と同じ手法を用いること
ができる利点もある。
In addition, the permissible range of displacement of the barrier is widened, which is very advantageous in panel manufacturing. In this case, there is no need to make the designed thickness of the barrier thinner than in the conventional example, so there is an advantage that the same conventional method can be used for manufacturing the barrier itself.

第2図は本発明の第2の実施例で、第1の実施例と同様
、第2図Aは平面図、第2図Bは断面図で画素12は第
1の実施例と同様六角形であるが、第1の実施例と異な
り六角形の2辺が行電極4に並行している。この場合も
、第2図から明らかなように、各々の画素12は隣の行
の画素の方に相互に食いこむようになっており、特にこ
め場合は画素12が行電極4を全幅にわたって含んでい
る。従って行電極4と障壁9の目金せずれや、行を極4
の幅がせまくなったりあるいは障壁9の幅が広くなった
りしても、行電極4は十分に画素4内に位置するので放
電特性が非常に安定する効果があった。なお、この場合
、第8図と対比してみると距離Xがゼロとなっているこ
とがわかる。
FIG. 2 shows a second embodiment of the present invention. Like the first embodiment, FIG. 2A is a plan view, and FIG. 2B is a sectional view, and the pixels 12 are hexagonal like the first embodiment. However, unlike the first embodiment, two sides of the hexagon are parallel to the row electrodes 4. In this case as well, as is clear from FIG. 2, each pixel 12 bites into the pixel in the adjacent row, and especially in the case of pixel 12 including the row electrode 4 over its entire width. There is. Therefore, there may be misalignment between the row electrodes 4 and the barrier 9, and the row electrodes 4 may be
Even if the width of the barrier 9 becomes narrower or the width of the barrier 9 becomes wider, the row electrode 4 is located sufficiently within the pixel 4, so that the discharge characteristics are very stable. Note that in this case, when compared with FIG. 8, it can be seen that the distance X is zero.

第3図A、Bは本発明の第3の実施例で、Aは平面図、
BはAにおけるa−a’部の断面図である0行電極とし
て、両側放電形式(行電極−列電極間の放電〉のもので
はなく、画素13を中に2本の独立な行電極4,18が
通っていて、この行電極間で放電を起す構成のものであ
る。画素の形状は本発明の第1の実施例と同じ六角形で
ある。
FIGS. 3A and 3B show a third embodiment of the present invention, where A is a plan view;
B is a cross-sectional view of the a-a' section in A. The 0th row electrode is not a double-sided discharge type (discharge between row electrode and column electrode), but two independent row electrodes 4 inside the pixel 13. , 18 passing through the row electrodes, and discharge is caused between the row electrodes.The shape of the pixel is the same hexagon as in the first embodiment of the present invention.

行電極がこのような形式の場合も、画素を六角形とする
ことにより、障壁9のずれや、ペーストダレによる障壁
幅増加に対しても製造上の許容誤差範囲が拡がる効果が
ある。
Even when the row electrodes are of this type, by making the pixels hexagonal, there is an effect of widening the tolerance range in manufacturing with respect to the shift of the barrier 9 and the increase in the barrier width due to paste sag.

以上述べたように、本発明の基本概念を基礎とし、画素
形状を六角形とすることにより、上述した効果を有する
プラズマデイスプレィを実現することができた。また画
素形状を六角形とすることにより、視認性も向上し、空
間分解能も向上する利点もあった。
As described above, by making the pixel shape hexagonal based on the basic concept of the present invention, it was possible to realize a plasma display having the above-mentioned effects. Further, by making the pixel shape hexagonal, there were also advantages of improved visibility and improved spatial resolution.

第4図A、Bは本発明の第4の実施例であり、第1図と
同一番号を付している部分はほぼ同一である。また、第
1図と同様、Aは平面図、Bは断面図である0画素14
はひし型の四角形であり、行電極4の方に深く食い込む
形となっている。第8図と対比してみると距離xはゼロ
となっている。従って本発明の第1の実施例と同等ない
しはそれ以上の効果を有するものである。
FIGS. 4A and 4B show a fourth embodiment of the present invention, and the parts denoted by the same numbers as in FIG. 1 are almost the same. Also, as in FIG. 1, A is a plan view and B is a cross-sectional view.
It is a diamond-shaped square, and has a shape that digs deeply into the row electrode 4. When compared with FIG. 8, the distance x is zero. Therefore, this embodiment has the same or better effects than the first embodiment of the present invention.

第5図A、Bは本発明の第5の実施例であり、画素15
は従来と同じく四角形であるが、図の如く各画素が左右
に隣接する画素の方に深く、くいこむようになっている
、なおこの場合も距離Xはゼロである。第5図かられか
るように両側放電の行電極4を用いたままで、画素15
が行電極の全幅を占有するようになっているので、障壁
の位置がずれたり、行電極の幅がペーストのダレ等によ
りひろがったりしてもほとんど影響をこうむらないよう
になった。
5A and 5B show a fifth embodiment of the present invention, in which a pixel 15
is a square as in the conventional case, but as shown in the figure, each pixel is deeply embedded in the pixels adjacent to the left and right, and the distance X is also zero in this case. As shown in FIG. 5, while using the row electrodes 4 with discharge on both sides, the pixels 15
occupies the entire width of the row electrode, so even if the position of the barrier shifts or the width of the row electrode expands due to paste sag, etc., there is almost no effect.

第6図A、Bは本発明の第6の実施例である。FIGS. 6A and 6B show a sixth embodiment of the present invention.

第1図と同一番号を付している部分は同一である6画素
16は六角形の画素であり、六角形の一部が行電極4に
食い込む形になっている。従って、本発明の第1の実施
例と同じ効果を有している。なお第6図の場合、第8図
に対応した距Mxは距MZの約1/3となっている。
The six pixels 16 having the same numbers as in FIG. 1 are hexagonal pixels, and a part of the hexagon cuts into the row electrode 4. Therefore, it has the same effect as the first embodiment of the present invention. In the case of FIG. 6, the distance Mx corresponding to FIG. 8 is approximately 1/3 of the distance MZ.

第7図A、Bは本発明の第7の実施例であり、画素17
は円形となっている。画素形状が円形の例は古くから知
られているが、本実施例では円形画素が特に相互にくい
こんだ形状となっているため、第1の実施例で述べたの
と同様の効果を有するものである。なお第7図の場合、
第8図に対応した距離Xは距離2の約173である。
7A and 7B show a seventh embodiment of the present invention, in which the pixel 17
is circular. Examples where the pixel shape is circular have been known for a long time, but in this example, the circular pixels are particularly embedded into each other, so that the same effect as described in the first example is achieved. It is. In the case of Figure 7,
The distance X corresponding to FIG. 8 is approximately 173 of the distance 2.

以上の実施例においては、行電極と列電極が2枚の異な
る基板上にある場合について述べたが、必ずしもこれに
限ることはなく、片側の基板上に行電極と列電極を配置
した電極構成の場合にも本発明を適用できる。
In the above embodiments, the case where the row electrodes and column electrodes are on two different substrates has been described, but the invention is not limited to this, and the electrode configuration is such that the row electrodes and column electrodes are arranged on one substrate. The present invention is also applicable to this case.

また行電極が一対で維持放電を行うような放電形式では
なく、従来例のように1本の行電極と1本の列電極の間
で放電を行わせる形式の電極構成に対しても本発明を適
用できるのはいうまでもない。
The present invention also applies to an electrode configuration in which a discharge is performed between one row electrode and one column electrode, as in the conventional example, instead of a discharge type in which a sustain discharge is performed between a pair of row electrodes. Needless to say, it can be applied.

なお、以上の実施例においては薄膜により電極や絶縁層
、MgO層を作成する場合を示したが、必ずしも薄膜に
よる必要はなく厚膜プロセスを用いて作成してもよい。
In the above embodiments, the electrodes, insulating layer, and MgO layer are formed using thin films, but they do not necessarily need to be formed using thin films, and may be formed using a thick film process.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は従来と異なり、各画素が
隣接する画素間で相互にくいこむ形をとりいれることに
より、障壁位置のずれやペーストダレ等による障壁幅の
増加、あるいは行電極幅の減少等を生じても行電極が障
壁におおい隠されることが少くなり、放電停止による画
素欠けを防ぐことができる。従って、行電極と障壁の間
の目合せマージンが大きくとれ、また行電極の幅や、障
壁幅のマージンも大きくなり、パネル製造上非常に有利
である。
As explained above, the present invention differs from the conventional art in that each pixel is embedded into adjacent pixels, thereby increasing the barrier width or decreasing the row electrode width due to misalignment of the barrier position or paste sagging. Even if such problems occur, the row electrodes are less likely to be hidden by the barrier, and pixel chipping due to discharge stop can be prevented. Therefore, the alignment margin between the row electrode and the barrier can be increased, and the margin for the width of the row electrode and the width of the barrier can also be increased, which is very advantageous in manufacturing the panel.

また画素の形状を円形や六角形、六角形等の多角形とす
ることにより、画素の角が目立たなくなり、表示品位の
優れたプラズマディスプレイパネルを得ることができう
効果も有する。
Furthermore, by making the pixel shape circular, hexagonal, or polygonal such as hexagonal, the corners of the pixel become less noticeable, and a plasma display panel with excellent display quality can be obtained.

【図面の簡単な説明】 第1図A、Bは本発明の第1の実施例のプ・ラズマディ
スプレイパネルの第1の実施例の平面図及び断面図、第
2図A、B〜第7図A、Bは各々本発明のプラズマディ
スプレイパネルの異なる実施例の平面図及び断面図、第
8図は本発明の基本的な内容を説明するための図、第9
図A、Bは従来例のプラズマディスプレイパネルの平面
図及び断面図である。 1.21・・・第1絶縁基板、2,22・・・第2絶縁
基板、3,23・・・列電極、4,18.24・・・行
電極、5,6,25.26・・・絶縁体、7,27゜3
0・・・M、O膜、8,28・・・放電ガス空間、9゜
29・・・障壁、10・・・蛍光体、11〜17.31
・・・画素。
[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1A and 1B are a plan view and a sectional view of a first embodiment of a plasma display panel according to the first embodiment of the present invention, and FIGS. Figures A and B are respectively a plan view and a sectional view of different embodiments of the plasma display panel of the present invention, Figure 8 is a diagram for explaining the basic contents of the present invention, Figure 9 is a diagram for explaining the basic content of the present invention, and Figure 9
Figures A and B are a plan view and a sectional view of a conventional plasma display panel. 1.21...First insulating substrate, 2,22...Second insulating substrate, 3,23...Column electrode, 4,18.24...Row electrode, 5,6,25.26... ...Insulator, 7,27°3
0...M, O film, 8,28...Discharge gas space, 9°29...Barrier, 10...phosphor, 11-17.31
...pixel.

Claims (1)

【特許請求の範囲】[Claims]  放電ガス空間と、放電ガス空間をはさむように平行に
おかれた2枚の絶縁基板を有し、縞状の行電極及び、こ
の縞状の行電極に直交し、この縞状の行電極と電気的に
絶縁された縞状の列電極を、絶縁基板のガス放電空間側
の面上に配置し、前記絶縁基板の少くとも一方の絶縁基
板に設けた障壁で放電ガス空間を区画して成る画素の、
互いに隣接する画素の中心が三角形の頂点にくるように
配置したいわゆる三角画素配列を有するプラズマディス
プレイパネルにおいて、各画素が、隣りの行の画素の方
に相互に食い込んでおり、隣接する3つの画素間を区分
する障壁の交点の中心点が互いに隣接する3つの画素の
中心点を結んだ三角形の内側に位置し、かつ、前記三角
形の一辺で行電極に並行な辺よりはかつて、この辺とこ
の辺に対向した三角形の頂点との距離の半分未満の位置
にあることを特徴とするプラズマディスプレイパネル。
It has a discharge gas space and two insulating substrates placed in parallel to sandwich the discharge gas space, and has a striped row electrode and a striped row electrode that is perpendicular to the striped row electrode. Electrically insulated striped column electrodes are arranged on the gas discharge space side surface of an insulating substrate, and the discharge gas space is partitioned by a barrier provided on at least one of the insulating substrates. of pixels,
In a plasma display panel that has a so-called triangular pixel array in which the centers of adjacent pixels are arranged at the vertices of a triangle, each pixel mutually bites into the pixels in the adjacent row, and the three adjacent pixels The center point of the intersection of the barriers dividing the space is located inside the triangle connecting the center points of three adjacent pixels, and the distance between this side and this side is longer than one side of the triangle parallel to the row electrode. A plasma display panel characterized in that the plasma display panel is located at a position less than half the distance from a vertex of a triangle facing the .
JP1222042A 1989-08-28 1989-08-28 Plasma display panel Pending JPH0384831A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1222042A JPH0384831A (en) 1989-08-28 1989-08-28 Plasma display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1222042A JPH0384831A (en) 1989-08-28 1989-08-28 Plasma display panel

Publications (1)

Publication Number Publication Date
JPH0384831A true JPH0384831A (en) 1991-04-10

Family

ID=16776179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1222042A Pending JPH0384831A (en) 1989-08-28 1989-08-28 Plasma display panel

Country Status (1)

Country Link
JP (1) JPH0384831A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5825128A (en) * 1995-08-09 1998-10-20 Fujitsu Limited Plasma display panel with undulating separator walls
WO2003088297A1 (en) * 2002-04-17 2003-10-23 Mitsubishi Denki Kabushiki Kaisha Surface-discharge plasma display panel
KR100404573B1 (en) * 1996-10-23 2004-03-09 엘지전자 주식회사 Plasma display panel
KR100455636B1 (en) * 2002-01-16 2004-11-06 미쓰비시덴키 가부시키가이샤 Display device
KR100523869B1 (en) * 1997-05-16 2005-12-29 엘지전자 주식회사 Plasma Display Panel
KR100720347B1 (en) * 2001-07-31 2007-05-21 가부시끼가이샤 히다치 세이사꾸쇼 Color image display method
US7230377B2 (en) 2000-04-29 2007-06-12 Samsung Sdi Co., Ltd. Base panel having partition and plasma display device utilizing the same
JP2007149669A (en) * 2005-11-23 2007-06-14 Samsung Sdi Co Ltd Plasma display panel
US7459851B2 (en) 2003-11-29 2008-12-02 Samsung Sdi Co., Ltd. Plasma display panel having delta pixel arrangement
US9562879B2 (en) 2011-08-15 2017-02-07 Moller Medical Gmbh Pipe containing a metal casing with a plastics material inlay for use in low and high pressure applications, in particular as an HPLC column

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5967872A (en) * 1995-08-09 1999-10-19 Fujitsu Limited Method for fabrication of a plasma display panel
US5825128A (en) * 1995-08-09 1998-10-20 Fujitsu Limited Plasma display panel with undulating separator walls
KR100404573B1 (en) * 1996-10-23 2004-03-09 엘지전자 주식회사 Plasma display panel
KR100523869B1 (en) * 1997-05-16 2005-12-29 엘지전자 주식회사 Plasma Display Panel
US7230377B2 (en) 2000-04-29 2007-06-12 Samsung Sdi Co., Ltd. Base panel having partition and plasma display device utilizing the same
KR100720347B1 (en) * 2001-07-31 2007-05-21 가부시끼가이샤 히다치 세이사꾸쇼 Color image display method
KR100455636B1 (en) * 2002-01-16 2004-11-06 미쓰비시덴키 가부시키가이샤 Display device
US7088314B2 (en) 2002-04-17 2006-08-08 Mitsubishi Denki Kabushiki Kaisha Surface discharge type plasma display panel having an isosceles delta array type pixel
WO2003088297A1 (en) * 2002-04-17 2003-10-23 Mitsubishi Denki Kabushiki Kaisha Surface-discharge plasma display panel
US7459851B2 (en) 2003-11-29 2008-12-02 Samsung Sdi Co., Ltd. Plasma display panel having delta pixel arrangement
JP2007149669A (en) * 2005-11-23 2007-06-14 Samsung Sdi Co Ltd Plasma display panel
US7667402B2 (en) 2005-11-23 2010-02-23 Samsung Sdi Co., Ltd. Plasma display panel and method of fabricating the same
US9562879B2 (en) 2011-08-15 2017-02-07 Moller Medical Gmbh Pipe containing a metal casing with a plastics material inlay for use in low and high pressure applications, in particular as an HPLC column

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