JPH038451U - - Google Patents
Info
- Publication number
- JPH038451U JPH038451U JP6772089U JP6772089U JPH038451U JP H038451 U JPH038451 U JP H038451U JP 6772089 U JP6772089 U JP 6772089U JP 6772089 U JP6772089 U JP 6772089U JP H038451 U JPH038451 U JP H038451U
- Authority
- JP
- Japan
- Prior art keywords
- logic
- logic circuits
- same
- integrated circuit
- output terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6772089U JPH038451U (es) | 1989-06-09 | 1989-06-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6772089U JPH038451U (es) | 1989-06-09 | 1989-06-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH038451U true JPH038451U (es) | 1991-01-28 |
Family
ID=31601543
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6772089U Pending JPH038451U (es) | 1989-06-09 | 1989-06-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH038451U (es) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55138678U (es) * | 1979-03-24 | 1980-10-02 |
-
1989
- 1989-06-09 JP JP6772089U patent/JPH038451U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55138678U (es) * | 1979-03-24 | 1980-10-02 |