JPH0383358A - Circuit for measuring capacitance - Google Patents

Abstract

PURPOSE:To easily and accurately perform fine adjustment on reference radio waves by providing an all-pass circuit for phase adjustment and an analog multiplier for voltage adjustment so as to generate a phase-lagged voltage and converting the phase-lagged voltage into a current. CONSTITUTION:By generating a prescribed voltage which is lagged in phase by 90 deg. from that of an AC voltage e0 for measurement to be supplied to a sample by means of an all-pass circuit 1 for phase adjustment and analog multiplier 2 for voltage adjustment and converting the phase-lagged voltage into a current, an already known current is which is to be subtracted from a measured capacitance current ix is generated. Such voltage controlling system can perform more easily and more accurately, than the conventional capacitance controlling system, the fine adjustment of the reference current from the outside.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to, for example, DLTS (deep level transient spectroscopy:
Deep Level Transient 5pec
troscopy) or ICTS (Isothermal Volume Transient Spectroscopy)
e Transient 5pectroseopy)
Capacitance measurement used in semiconductor impurity measurement equipment, etc. that is configured to evaluate the energy level, concentration, carrier type 2 degeneracy, etc. associated with impurities and defects in semiconductors using transient capacitance characteristic measurement methods such as A device, more specifically, a capacitor configured to generate a difference current by subtracting a known reference current from a measurement capacitance current obtained by applying a measuring AC voltage to a sample to be measured, and to amplify the difference current. Regarding measurement circuits.

(Prior Art) As illustrated in FIG. 4, a conventional capacitance measuring circuit of this type receives two AC voltages, which are 180° out of phase with each other, from an AC power source E through a transformer T. , a measurement capacitance current 18 obtained by generating a measurement AC voltage eQ and a reference AC voltage e, and applying the measurement AC voltage e0 to the measurement target sample O (its capacitance is CX).
and the reference AC voltage e is a reference voltage Mcs with a known capacity.
By adding (actually subtracting) the reference current obtained by applying the reference current (reference voltage 1 current + s) at the contact P, the difference between one of these measured capacitance currents and the reference capacitance current i, i, is calculated. i (iz-i, ) and amplifying the difference current i with a current amplifier A, the measured capacitance current 1. The electric current [1
The sensor is configured to obtain the following, and the sensitivity (resolution) is improved using the so-called zero method.

In order to maximize the improvement in sensitivity (resolution) by such a zero method, the measurement capacitance current i1 and the reference capacitance current! , and must be approximately equal, the reference capacitance C5 is, as shown in the figure, a plurality of known capacitance elements Cs+, C5x--Csll (usually, C31=C0="'""= C5R) are connected in parallel, and a known capacitive element CS+ is used according to the capacitance of the 14o.

csl...Csll switch SW+, SWt
...5WR (usually a relay etc. is used)
It is configured such that it can be arbitrarily selected and adjusted (controlled).

[Problem to be solved by the invention]

However, in the capacitance measurement circuit with the conventional configuration described above, a so-called capacity control method is adopted, which is configured to use the reference AC voltage i obtained from the reference capacitance C3 as the reference current to be subtracted from the measured capacitance current iX. , a large number of known capacitance elements C to constitute the reference voltage 1cs
s+, Cs1...C311 are required (for example, 12 are required in the case of 12bit), and since these capacitive elements are generally expensive and bulky, the entire circuit becomes large and the manufacturing cost increases. The problem is that it is expensive,
In addition, the reference capacitance current i can only be controlled in stages (
Further, there is the problem that errors occur due to the stray capacitance of the switches S W + , S Wt . . . SWo, making it impossible to accurately control the capacitance from the outside. There was also.

It is an object of the present invention to use a control method that is completely different from the conventional capacitance control method, that is, a current obtained from a voltage regulating means and a resistor, as a known reference current to be subtracted from the measured capacitance current. Proverbs composed in 1.1
'The object of the present invention is to develop and provide a capacitance measuring circuit that can solve the conventional problems as described above by adopting a voltage control type.

[Means to solve the problem]

In order to achieve the above object, a capacitance measurement circuit according to the present invention generates a difference current by subtracting a known reference current from a measurement capacitance current obtained by applying a measurement alternating current voltage to a sample to be measured. In a capacitance measuring circuit configured to amplify a difference current, an all-pass circuit for phase adjustment and an analog multiplier for voltage adjustment are provided for the reference AC voltage in order to generate the known reference current. According to
A resistor is provided for generating a predetermined phase-lag voltage that is delayed by 90 degrees with respect to the phase of the measurement AC voltage supplied to the sample, and converting the phase-lag voltage into a current. There is.

[Effect]

The effects achieved by adopting such a characteristic configuration are as follows.

That is, in the capacitance measuring circuit according to the present invention, as will become clearer from the description of the embodiments to be described later, an all-bus circuit for phase adjustment and an analog multiplier for voltage adjustment are used to A known reference current to be subtracted from the measurement capacitance current by generating a predetermined phase-lag voltage delayed by 90' from the phase of the supplied measurement AC voltage from the reference AC voltage and converting the phase-lag voltage into a current. Since it uses a voltage control method configured to generate In addition, as a capacitive element corresponding to the reference capacitance for the sample (measured capacitance), it is sufficient to provide only one capacitive element of any capacitance in the all-bus circuit that constitutes the phase adjuster, so the entire circuit can be replaced with the conventional one. It can be significantly smaller and the manufacturing cost can be lowered.Furthermore, the phase adjuster uses an all-pass circuit that can change only the phase without changing the gain during phase adjustment. Adjustments can be made extremely easily.

〔Example〕

Specific embodiments of the present invention are shown below in the drawings (Figures 1 to 3).
The explanation will be based on Figure).

FIG. 1 shows an overall schematic circuit configuration diagram of a capacity measuring circuit according to an embodiment of the present invention. In this figure, E is an AC power supply, and T
is a transformer, and this transformer T generates two AC voltages having the same phase, that is, a measurement AC voltage e0 and a reference AC voltage e.

The measurement AC voltage e0 is applied to the measurement target sample O (its capacitance is C8), and a measurement capacitance current ix is obtained. Note that the phases of the measurement capacitance currents i and I are advanced by 90@ in phase than the measurement AC voltage e0.

On the other hand, the reference AC voltage e is applied to an all-bus circuit 1 for phase adjustment, which connects one capacitor C, a fixed resistor R1, and a variable resistor R as shown in the figure. In this case, the variable resistor R in the all-bus circuit 1 changes the phase of the output voltage e from the all-bus circuit 1 to the reference AC voltage e and the measurement AC voltage e0.
It is adjusted to advance substantially 90" further than the

Next, the output current e□ from the all-bus circuit l is input to the X terminal of the analog multiplier 2 for voltage adjustment (having a characteristic of Z=XXY), and the Y of the analog multiplier H2
By controlling the variable DC power supply V attached to the terminal, the current is adjusted to a predetermined value and output from the X terminal.

Furthermore, the output current 12 from the analog multiplier 2 is
The voltage is input to the inverter 3 and converted into a voltage (2) whose phase is delayed by 180°. Therefore, the voltage e1 output from the inverter 3 is equal to the reference AC voltage e and the measurement AC voltage e.
It is 90@ behind 0.

The voltage e□ output from the inverter 3 is converted into a reference current i1 via a fixed resistor R8. It is clear that this reference current i is also delayed by 90° from the reference AC voltage e and the measurement AC voltage e0, similar to the voltage ``31'' output from the inverter 3. The reference voltage fi s and the measurement AC voltage e
The measured capacitance current i1 whose phase is advanced by 90 degrees from zero has a phase difference of 180'' from each other.

Therefore, these measurement capacitance current il+ and reference current i.

By adding (actually subtracting) the measured capacitances to current ill and reference AC voltage i at contact P,
! Generates a difference current i (ix −i, ) with the difference 1! By amplifying the stream i to the TL stream amplifier 8,
The current I is amplified by a minute change in one of the measured capacitance currents, and the sensitivity (resolution) is improved by the so-called zero method.

Therefore, the known reference current i output from the resistor R3
, and the amplified current (2) output from the current amplifier A, the capacitance C of the sample O to be measured can be measured with high resolution.

By the way, as a means for advancing the phase of the reference AC voltage e as described above, in addition to the all-bus circuit l, for example, a simple RC circuit (so-called filter) as shown in FIG. 2 is used. However, in the case of such an RC circuit, there is a problem that the gain changes with the phase adjustment, and since it is impossible to advance the phase by more than 90''', it is necessary to compensate for the phase delay in other circuits. The disadvantage is that it cannot be corrected.

On the other hand, the above-mentioned all-bus circuit I is capable of outputting a voltage whose phase is 0 to 180 degrees ahead of the applied voltage.
Furthermore, it has a unique characteristic in that it does not involve a change in gain during phase adjustment, which is why the all-bus circuit 1 is particularly used as a means for phase adjustment in this capacitance measuring circuit. That's the reason.

Note that as the all-bus circuit 1, as shown in FIG. 3, a configuration using an operational amplifier a may be adopted, but if such an operational amplifier a is used, noise may increase. Therefore, it is desirable to use the configuration shown in FIG.

Furthermore, in the above embodiment, since a current output type analog multiplier 2 is used, an inverter 3 is provided, but when a voltage output type analog multiplier is used, , such an inverter 3 is unnecessary.

〔Effect of the invention〕

As is clear from the detailed description above, the capacitance measuring circuit according to the present invention generates a known reference li current to be subtracted from the measurement capacity N current obtained by applying the measurement AC voltage to the sample to be measured. By providing an all-pass circuit for phase adjustment and an analog multiplier for voltage adjustment with respect to the reference AC voltage, a predetermined value delayed by 90@ from the phase of the measurement AC voltage supplied to the sample is provided. Because it uses a voltage control method that generates a phase-lag voltage and provides a resistor to convert the phase-lag voltage into a current, the reference current Fine adjustment can be easily and accurately performed by external control, and as a capacitive element corresponding to the reference capacitance for the sample (measurement capacitance), a capacitive element of any capacitance in the all-pass circuit constituting the phase adjuster can be used as the IW. Because it is only necessary to provide a
The phase adjuster uses an all-pass circuit that can change only the phase without changing the gain during phase adjustment, so it has various excellent effects such as extremely easy phase adjustment. Demonstrated.

[Brief explanation of drawings]

1 to 3 are for explaining a specific embodiment of the capacitance measuring circuit according to the present invention, in which FIG. 1 shows an overall schematic circuit configuration diagram, and FIG. 2 shows a schematic diagram of the overall circuit configuration. A circuit configuration diagram of a comparative example is shown for the main part used in explaining the operation, and FIG. 3 shows a circuit diagram of the main part of another embodiment. FIG. 4 is for explaining the technical background of the present invention and problems of the prior art, and shows an overall schematic circuit configuration diagram of a conventional general capacitance measuring circuit. O...Sample to be measured, C1l...Capacity of sample S to be measured, eo...AC voltage for measurement, i x...Measurement capacitance current, el...Reference AC voltage, i,... Known reference current, i...Difference current, ■...Amplification current, 1...All-pass circuit, 2...Analog multiplier, 8$1...Phase lag voltage, R. resistance. Applicant Horiba Ltd. Agent

Claims (1)

[Claims] A capacitance measurement circuit configured to generate a difference current by subtracting a known reference current from a measurement capacitance current obtained by applying a measurement AC voltage to a measurement target sample, and to amplify the difference current, To generate the known reference current, an all-pass circuit for phase adjustment and an analog multiplier for voltage adjustment are provided for the reference AC voltage, so that the known reference current is generated from the phase of the measurement AC voltage supplied to the sample. 1. A capacitance measuring circuit, characterized in that it generates a predetermined phase-lag voltage delayed by 90 degrees, and is provided with a resistor for converting the phase-lag voltage into a current.