JPH038320A - Formation of pattern - Google Patents

Abstract

PURPOSE:To simplify the process of pattern formation by etching respective substance layers continuously with each mask obtained by raw materials. CONSTITUTION:The layer L1 of a substance is formed on a semiconductor substrate 1 and is disposed on a sample stage. A material gas for resist is introduced in the sample chamber and when its pressure reaches a prescribed value, electron beams 2 scan the upper part of the layer L1. Then, a resist pattern R1 consisting of an amorphous hydrocarbon system substance is formed to the required thickness on the layer L1. Subsequently, the layer L2 of a substance is formed on the whole surface and a resist pattern R2 is formed on the layer L2. The anisotropic etching of L1 is performed up to a depth that is halfway in the direction of thickness of the layer L1. As a result, patterns P1 and P2 are formed and objective patterns are obtained by removing the patterns R1 and R2.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a pattern forming method.

[Summary of the invention]

In the pattern forming method of the present invention, a first mask layer made of a substance produced from the raw material by irradiating the first layer to be etched with a charged particle beam in an atmosphere containing a gaseous raw material is provided. a step of forming a second layer on the first layer to be etched; a step of forming a second layer on the first layer to be etched and the first mask layer; and a step of forming a layer on the second layer to be etched. forming on the second layer to be etched a second mask layer made of a substance produced from the raw material by irradiating a charged particle beam in an atmosphere containing the gaseous raw material; The method further comprises a step of successively etching the second layer to be etched and the first layer to be etched using the mask layer and the first mask layer. Thereby, it is possible to simplify the process of forming a pattern, and also to form a pattern with an extremely fine width.

[Conventional technology]

Conventionally, patterns in semiconductor integrated circuits and the like have been formed, for example, by the following method. That is, as shown in FIG. 4A, first, a first material layer 102 for pattern formation is formed on a semiconductor substrate 101, and then a resist pattern 103 is formed on this first material 1tJW 102. As shown in FIG. Here, the formation of this resist pattern 103 is performed by first applying a resist on the first material layer 102, then exposing this resist to light, and then developing this resist. By etching the first material layer 102 using a method such as reactive ion etching (RIE) using as a mask, patterns P,' are formed as shown in FIG. 4B.
form. Thereafter, the resist pattern 103 is removed to obtain the state shown in FIG. 4C. As shown in the fourth diagram, a second material layer 104 for pattern formation is formed on the entire surface. Next, as shown in FIG. 4, this second material layer 1
A resist pattern 105 is formed on 04.

Next, using this resist pattern 105 as a mask, a second
By etching the material layer 104 using a method such as RIE, a pattern P3' is formed as shown in FIG. 4F. After this, resist pattern 10
5 is removed to obtain the state shown in FIG. 4G. In this way, patterns P+' and Pg' having different heights are formed.

[Problems to be Solved by the Invention] As described above, the conventional pattern forming method involves a series of steps consisting of forming a material layer for pattern formation, coating a resist, exposing the resist, developing the resist, and etching. A pattern is formed by repetition. And the resist pattern formation and etching are one to one.
It corresponds to For this reason, for example, when forming many types of patterns with different heights, there is a problem in that the number of etching operations required for pattern formation is extremely large, thus making the pattern formation process complicated.

Furthermore, in recent years, with the trend toward finer patterns, the RIE method is often used as an etching method for pattern formation. However, this RIE method causes damage to the element during etching, so if etching has to be performed many times, for example when forming many types of patterns with different heights, damage to the element may occur. There is a problem in that damage increases significantly.

Furthermore, as shown in FIG. 5, the height h5 (i=1.
2, 3. -・-, N), the thickness of the material layer that needs to be formed when forming N types of patterns Pi'', and thus the thickness of the material layer that needs to be formed when forming many types of patterns with different heights. The problem is that it becomes extremely large.

Therefore, an object of the present invention is to provide a pattern forming method that can simplify the pattern forming process.

Another object of the present invention is to provide a pattern forming method that can reduce damage caused to elements during etching for pattern formation.

Another object of the present invention is to provide a pattern forming method that can reduce the thickness of a material layer that needs to be formed for pattern formation.

Another object of the present invention is to provide a pattern forming method capable of forming a pattern with an extremely fine width.

Another object of the present invention is to provide a pattern forming method that can prevent damage to a mask layer during etching for pattern formation.

The above objects and other objects of the present invention will become clear from the following description.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a pattern forming method in which a charged particle beam ( 2) forming a first mask layer (R3) made of a substance produced from the raw material by irradiating the first layer to be etched (Ll); A second layer to be etched (L8) is formed on the first mask layer (R3).
) and applying a charged particle beam (2) on the second layer to be etched (L, ) in an atmosphere containing gaseous raw materials.
The second mask layer (R2) made of a substance produced from the raw material by irradiation with the second etched layer (Lz
) and forming the second etched layer Nr (t,z) and the first etched layer (L, ) using the second mask layer (R8) and the first mask Ji (R1).
The method includes a step of continuously etching.

As the charged particle beam (2), an electron beam, a positron beam, a muon beam, etc. can be used. When using an electron beam, a field emission electron gun (field emission electron gun) that can generate an electron beam with good coherence is used.
It is preferable to use an emission gun.

[Effect]

By using an appropriate material as a raw material contained in the atmosphere during irradiation with the charged particle beam (2), a first material consisting of a substance produced by the irradiation with the charged particle beam (2) can be prepared.
The mask layer (R1) and the second mask layer (R2) can have excellent etching resistance.

These second mask layer (R2) and first mask layer (
By sequentially etching the second layer to be etched (L) and the first layer to be etched (L2) using the etching layer R,), these second layers to be etched (L2) can be etched by - times of etching. and the first etched object II (L, )
Pattern formation can be performed. Therefore, the number of times of etching for pattern formation can be reduced compared to the conventional technique, and the pattern formation process can be simplified accordingly. Furthermore, since the number of times of etching can be reduced in this way, even if the RIE method is used as the etching method when forming a complex pattern consisting of multiple types of patterns with different heights, it is possible to reduce the amount of etching that occurs on the element during etching. Damage can be reduced compared to conventional methods.

On the other hand, since the beam diameter of the charged particle beam (2) can be narrowed down to, for example, a few tens of people, even considering the influence of multiple scattering of this charged particle beam (2), the diameter of the charged particle beam (2) can be narrowed down to, for example, about 200 people. The first mask layer (R
1) and a second mask layer (Rg) can be formed. Therefore, using these second mask layer (R2) and first mask layer (R1), the second layer to be etched (
By etching the first etched layer (L2) and the first etched layer (L,), a pattern (PI, p
g) can be formed.

In addition, reflecting the fact that the intensity distribution of the charged particle beam (2) is Gaussian, the cross-sectional shapes of the first mask layer (R1) and the second mask layer (Rt) have a gentle Gaussian distribution. It becomes a shape. Therefore, when forming a layer to be etched on the first mask layer (R1) and the second mask layer (R1), the first mask layer (R1) is
R1) and the second mask layer (R1) can be completely covered by this layer to be etched. This eliminates the problem of the conventional method in which the side surfaces of the mask layer are exposed even when the layer to be etched is formed, causing damage to the side surfaces during etching. That is, it is possible to prevent damage to the first mask layer (R1) and the second mask layer (R□) during etching for pattern formation.

Furthermore, for example, the first layer to be etched (Ll) and the second layer to be etched (Ll)
Assuming that the layers to be etched (Lx) are of the same material, the patterns (P.

pg), these patterns (P+
, PI), it is sufficient to form a material layer with a thickness corresponding to the maximum value of the height. Therefore, the thickness of the material layer that needs to be formed for pattern formation can be made smaller than in the past.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings. In addition, in all the drawings of the embodiment, the same parts are given the same reference numerals.

Figures 1A to 1E show a pattern forming method according to Embodiment I of the present invention in the order of steps.

In this embodiment I, as shown in FIG. 1A, a first material for pattern formation is first deposited on a semiconductor substrate 1 such as a silicon (Si 2 ) substrate or a semi-insulating gallium arsenide (GaAs) substrate. Form layers.

Next, this semiconductor is placed in a sample chamber evacuated to a high vacuum (for example, about 3 x 10-' Torr) of an electron beam direct lithography device (not shown) having a configuration similar to that of a scanning electron microscope (SEM). Place the substrate l. The semiconductor substrate 1 is placed on a sample stage whose temperature can be controlled by a temperature controller, and a resist raw material gas such as gaseous alkylnaphthalene is introduced into the sample chamber. The pressure of this resist raw material gas in the sample chamber is set to a value within the range of 10-1 to 10-'Torr, for example, about 10-''Torr.When the pressure of the resist raw material gas in the sample chamber reaches a predetermined value, e.g. An electron beam 2 is generated by a field emission electron gun (not shown), the beam diameter of the electron beam 2 is narrowed down to, for example, about several dozen, and the electron beam 2 is controlled by an electron beam controller to form a first material layer. and scan over.In this case,
The acceleration voltage of the electron beam 2 is set to a value within the range of 0.5 to 6 kV, for example. Also, the beam current is, for example, 1O-II~
The value shall be within the range of 10-7A.

In the resist source gas atmosphere described above, the first material layer L
Resist raw material gas molecules are adsorbed on the surface of 1. When the adsorbed resist raw material molecules are irradiated with the electron beam 2 as described above, the resist raw material molecules in the portion irradiated with the electron beam 2 are decomposed, and as a result, amorphous hydrocarbons (C, H,)-based material is formed on the first material layer in the same shape as the drawing pattern of the electron beam 2. As a result, amorphous hydrocarbon (C
, H, )-based material is formed. In this case, since the thickness of the resist pattern R1 formed by one drawing with the electron beam 2 is usually small, the drawing with the electron beam 2 is repeated as necessary to obtain the resist pattern R1 with a desired thickness. Note that this resist, which is formed by irradiation with an electron beam 2 in a resist raw material gas atmosphere, is an E B I R (Electro
n Beam 1 nd Re5ist). This EBIR has higher resistance to dry etching such as RIE than polymethyl methacrylate (PMMA), which is often used as an electron beam resist in conventional electron beam lithography, and has excellent heat resistance. The present inventors have confirmed that

Next, as shown in FIG. 1B, a second material layer L2 is formed over the entire surface. Here, when forming this second material layer 1-t by, for example, chemical vapor deposition (CVD), the resist pattern R2 made of EBIR, which has excellent heat resistance, is exposed to heat during growth, as described above. This can prevent deformation or the like from occurring.

Next, as shown in FIG. 1C, a resist pattern R2 made of EB[R is formed on a predetermined portion of the second material layer Lt in the same manner as described above.

Next, using these resist patterns R,,R, as a mask, the second material layer Lt and the first material layer L1 are formed by, for example, the RIE method in a direction perpendicular to the substrate surface, such that the thickness of the first material layer L1 is changed. Anisotropic etching is performed to a depth halfway in the horizontal direction. During this etching, first the second material layer Lt
is anisotropically etched using the resist pattern R2 as a mask, and after the etching progresses and the resist pattern R1 is exposed, the first material layer L1 is also anisotropically etched using the resist pattern R1 as a mask. In this way, as shown in the first diagram, the pattern P,...
P is formed.

Thereafter, the resist patterns R, , R, are removed to form a state as shown in FIG. 1, and the desired pattern formation is completed.

As described above, according to this embodiment I, the second material layer L
Using the resist pattern R2 and the first material layer formed on the second material layer as a mask, the second material layer and the first material layer L1 are successively formed by RIE method. Since the patterns P+ and Pg are formed by etching, these patterns p, , p, having different heights can be formed by one etching. As a result, the number of etching operations required to form these two types of patterns P+ and Pg with different heights can be reduced by one time compared to the conventional method, so these patterns P+ and Pg can be reduced by that amount. The formation process can be simplified. Furthermore, since the number of times of etching by the RIE method can be reduced, damage caused to the element during etching can be reduced. Furthermore, since the resist patterns R1, R1 are formed by irradiation with the electron beam 2 in the resist raw material gas atmosphere, these resist patterns R, .
R, can have a very fine width of, for example, about 200 people, so it is possible to form patterns P+, Pg with a very fine width. Moreover, the resist pattern can be formed through a simpler process than the conventional resist pattern forming method, which requires steps of resist coating, development, and exposure.

Further, according to this embodiment I, there are also the following advantages. That is, as shown in FIG. 6, since the resist pattern 106 formed by the conventional lithography method has a substantially rectangular cross-sectional shape, the material N1 formed thereon is
It is difficult to completely cover the resist pattern 106 with this material layer 107 unless the material layer 107 is etched to a considerable thickness. Therefore, when this material layer 107 is etched, there is a risk that the exposed sides of this resist pattern 106 will be damaged. In contrast, according to Example 1,
The cross-sectional shape of the resist pattern R, , R, made of EBIR has a gentle Gaussian distribution shape. Therefore, for example, the resist pattern R is completely covered by the second material layer Lt formed thereon, so that the above-mentioned problem does not occur.

Further, for example, if the first and second material layers Ll and L2 are made of the same material, the thickness of the material layer that needs to be formed to form the patterns P+ and P- is the same as that of the patterns P.
The thickness corresponding to the maximum height of t and Pz is sufficient, and therefore the thickness of the material layer that needs to be formed for pattern formation can be made smaller than in the past. This makes it possible to reduce the time and cost required for pattern formation.

SIL le FIGS. 2A and 2B show Embodiment 2 of the present invention.

The above-mentioned Example I has two types of patterns P having different heights,
, P, while this embodiment (2) is an example in which the present invention is applied to the general case of forming N types of patterns with different heights. be.

In this embodiment (2), as shown in FIG. EBIR on top
Next, a second material layer L2 is formed on the entire surface, and then a resist pattern R2 made of EBIR is formed on this second material layer. Next, after forming a third material layer over the entire surface, a resist pattern R1 made of EBIR is formed on the third material layer. Thereafter, the formation of a material layer and the formation of a resist pattern made of EBIR are repeated in the same manner until the Nth material layer and resist pattern R8 are formed.

Next, these Nth, -1th, second, and first material layers L
N+...-'*Ls*Lz+Lt is continuously anisotropically etched in the direction perpendicular to the substrate surface by, for example, RIE. During this etching, the resist pattern R,
, -,R,,R,,R,successively serve as masks, resulting in N types of patterns 7, Pz, R3 with different heights, as shown in FIG.

+PN is formed.

As described above, according to this embodiment (2), using the resist patterns RN, . . . r R3, R,, R, as masks, the Nth, . ,
By sequentially etching Lt and L+ by RIE method, pattern PI * PZ rPl, . . . r
For example, these N types of patterns Pt, Pg, Pz, '-' and +PN with different heights can be formed by one etching. Therefore, the process for forming these patterns P+, Pt, Pg, . . . -2PM can be significantly simplified. Also, these patterns P + , P t .

When the RIE method is used as an etching method for forming Ps, '-'-', PM, damage caused to the element can be significantly reduced compared to the conventional method. Further, for example, first, second, third, -1th N material layers L+
, Lx, Ls, -., L) 1 are the same material, these N types of patterns with different heights P+, Pz, Ps, '----', are formed to form PM. The required thickness of the material layer is determined by these patterns P I + pz + R3* −・−3
The thickness corresponding to the maximum height of the P-work is sufficient. That is, if the heights of these patterns P,,Pt,P,,...,PM are respectively,h,,h,,...,hN, the thickness of the material layer to be formed is s+ax (tl+ *
hz * hz + -hN) is sufficient. Therefore, these patterns PL rPl + R3+-...+
The thickness of the material layer required to form the PN can be made significantly smaller than in the past.

Fruit 1 dish J4 FIGS. 3A to 3D illustrate Embodiment 2 of the present invention.

This Example (2) is an example in which the present invention is applied to the manufacture of a transistor.

In this embodiment (2), as shown in FIG. 3A, first, a semiconductor layer 3 such as a semi-insulating GaAs layer is formed on a semiconductor substrate 1 such as a semi-insulating GaAs substrate, and then the semiconductor layer 3 is formed on a semiconductor substrate 1 such as a semi-insulating GaAs substrate. A source electrode S and a drain electrode made of ohmic metal are formed on the layer 3. Thereafter, the source electrode S and the drain electrode S and the semiconductor layer 3 are alloyed by heat treatment.
A resist pattern R made of EBIR and having an extremely fine width is formed on the semiconductor layer 3 in the same manner as described above. Here, this resist pattern R is formed so that both ends thereof span the source electrode S and the drain electrode, respectively.

Next, as shown in FIG. 3B, a metal film 4 for forming a gate electrode is formed on the entire surface by, for example, a vapor deposition method or a sputtering method. A resist pattern R' having a fine width is formed in a direction perpendicular to the resist pattern R.

Next, these metal film 4 and semiconductor layer 3 are subjected to, for example, RIE.
The semiconductor layer 3 is anisotropically etched in a direction perpendicular to the substrate surface to a depth halfway in the thickness direction using a method. As a result, as shown in FIG. 3C, the ultrafine wire 5 made of semiconductor
and gate electrode G are formed. However, in this case, the extremely fine line 5 does not become an extremely fine line at the intersection with the gate electrode G.

In this embodiment (2), a field effect transistor (FET) is constituted by the gate electrode G, source electrode S, and drain electrode. In this case, since a resist pattern R made of EBIR, which is an insulating material, is interposed between the gate electrode G and the ultrafine wire 5, this FE
T can be considered a type of insulated gate FET.

Further, this insulated gate type FET has a structure similar to a one-dimensional channel type FET in which the ultrafine wire 5 is used as a channel, if the intersection with the gate electrode G is ignored. In this insulated gate FET, a gate voltage applied to the gate electrode G controls the current flowing between the source electrode S and the drain electrode through a one-dimensional channel made of ultrafine wires 5.

As described above, according to this embodiment (2), the metal film 4 and the semiconductor layer 3 are
Since the gate electrode G and the ultra-fine wire 5 are formed by successive etching using the IE method, the gate electrode G and the ultra-fine line 5 can be formed by - times of etching, thereby forming an insulated gate. It is possible to simplify the process of patterning a type FET. Furthermore, damage caused to the channel portion and the like can be minimized by etching using the RIE method.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention.

For example, as an etching method for pattern formation,
It is also possible to use etching methods other than the RIE method. Furthermore, it goes without saying that the scope of application of the present invention is not limited to the manufacture of semiconductor integrated circuits.

〔Effect of the invention〕

Since the present invention is configured as described above, it is possible to simplify the process for forming a pattern, and also to form a pattern with an extremely fine width. Furthermore, it is possible to reduce damage to the element during etching for pattern formation, and to prevent damage to the mask layer during etching for pattern formation. Furthermore, the thickness of the material layer that needs to be formed for patterning can be reduced.

[Brief explanation of drawings]

1A to 1E are sectional views for explaining Embodiment I of the present invention in the order of steps, and FIGS. 2A and 2B are sectional views for explaining Embodiment 1 of the present invention in the order of steps. Figures 3A to 3D are perspective views for explaining the embodiment (1) of the present invention in the order of steps, and FIGS. 4A to 4G are cross-sectional views for explaining the conventional pattern forming method in the order of steps. 5 and 6 are cross-sectional views for explaining the problems of the conventional pattern forming method, respectively. Explanation of main symbols in the drawings 1: Semiconductor substrate, 2: Electron beam, 3: Semiconductor layer,
4: Metal film, L, -L,: Material layer, R1 to R,,R
, R'' resist pattern, P. ~ PN: pattern, S: source electrode, D drain electrode, G: gate electrode.

Claims (1)

[Scope of Claims] A first mask layer made of a substance produced from the raw material by irradiating the first layer to be etched with a charged particle beam in an atmosphere containing a gaseous raw material. a step of forming a second layer to be etched on the layer to be etched; a step of forming a second layer to be etched on the first layer to be etched and the first mask layer; and a step of forming a second layer to be etched on the second layer to be etched; forming a second mask layer made of a substance produced from the raw material by irradiating a charged particle beam in an atmosphere containing the raw material on the second layer to be etched; A pattern forming method comprising the step of successively etching the second layer to be etched and the first layer to be etched using the first mask layer.