JP4042893B2 - Processing method of Si semiconductor microstructure by ion beam implantation lithography of inorganic multilayer resist - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a method for microfabrication of a Si semiconductor substrate surface, in particular, a method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist.To the lawIt is related.
[0002]
[Prior art]
In recent years, circuit patterns in these quantum devices have been increasingly miniaturized as the degree of integration of ULSI, which is the core of microelectronics, has improved. 2. Description of the Related Art Conventionally, in a semiconductor device manufacturing process, a semiconductor crystal etching method has been widely adopted as a basic technique for removing unnecessary portions of an insulating film or a metal thin film with high accuracy according to a resist pattern. As means for this etching method, studies on dry etching using a halogen gas are also underway. Since this dry etching is performed in a relatively clean atmosphere in an ultra-high vacuum, it is expected that fine quantum devices can be processed.
[0003]
For example, as for a typical Si as a device material, a dry etching process using fluorine and chlorine-based halogen gases has been studied. However, so far, even in the case of this silicon, the actual situation is that the dry etching process for producing a finer quantum device has not yet been completed. There have been many reports on dry etching processes for compound semiconductors such as GaAs, but the technical means that enable the fabrication of quantum devices are not yet completed, as is the case with Si.
[0004]
As a dry etching method for overcoming the technical limitations of the conventional halogen gas dry etching method for Si semiconductors and the like, the present inventor has proposed a method of dry etching a semiconductor crystal surface in units of one atomic layer with bromide. No. 321483.
[0005]
[Problems to be solved by the invention]
However, conventionally, in the manufacturing method of Si semiconductor, the above-mentioned dry etching method is hardly employed, and the optical lithography method using a wet resist of an organic photosensitive agent is still employed. However, in order to cope with the miniaturization and complexity of circuit patterns with this optical lithography method, it becomes difficult to manufacture the mask itself, and in order to maintain the dust-free cleanliness of the organic resist wet resist process. A huge facility cost is required.
[0006]
The present invention has been made in view of the above problems, and by changing the microfabrication of the Si semiconductor from the conventional organic wet resist method to the inorganic dry resist method, the processing of the Si semiconductor microstructure and the microcircuit is performed with high accuracy. It can be manufactured with well-priced equipment.
[0007]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the method of processing an Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 1 of the present invention comprises forming an Al layer on the surface of a Si wafer substrate, After the Si amorphous layer is formed on the surface of the layer, metal ions are implanted into the required shape through a mask that can selectively absorb an ion beam in an arbitrary shape on the surface of the Si amorphous layer, and are naturally formed on the surface of the Si amorphous layer. The surface natural oxide film is selectively forced oxide film Si by the presence of surface natural oxide film or metal ion implantation under oxygen molecular radiation._xO_yOr the ion implantation amount is increased, and the forced oxide film Si is increased._xO_yAl ions were partially formed on the Al layer by the propagation of O ions from the Si and the sputtering of the Si amorphous layer._xO_yAfter that, the surface of the Si wafer substrate is dry-etched in units of one atomic layer with a reactive etching gas, and the forced oxide film Si_xO_yAnd Al_xO_yThe surface natural oxide film, the Si amorphous layer, the Al layer, and a part of the Si wafer substrate other than the portion replaced with are removed.
[0008]
An Al layer is formed on the surface of the Si wafer substrate, and an Si amorphous layer is further formed on the surface. A predetermined pattern is formed on the surface of the Si amorphous layer, and a mask that does not transmit an ion beam is installed at a place other than a necessary portion, and metal ions are naturally formed on the surface of the Si amorphous layer through the mask. Irradiation is performed in the presence of a surface natural oxide film or oxygen molecular radiation. Then, the surface natural oxide film naturally formed on the surface of the Si amorphous layer is selectively chemically stable by the metal ions that have passed through the pattern provided on the mask.₂Is replaced by When the ion implantation amount is further increased, this SiO 2₂Al is chemically stable on the surface of the Al layer by the propagation of O ions from the substrate or sputtering of the Si amorphous layer._xO_yFor example, Al₂O_ThreeIs formed. After removing the mask, the SiO formed on the Si wafer substrate surface₂And Al_xO_yA part of the Si amorphous layer, Al layer, and Si wafer substrate other than 10 parts^-8Chemically stable Al by dry etching under reduced pressure of about Pa or less₂O_ThreeBy leaving the mark, it is possible to freely form a structure or pattern having an arbitrary shape on the surface of the Si substrate. Here, it is preferable to use Ga or the like, which is a relatively heavy metal, as the metal ion used.
[0009]
Here, the Al layer formed on the surface of the Si substrate was formed by molecular beam epitaxy (hereinafter referred to as MBE) or chemical vapor deposition (hereinafter referred to as CVD). It is preferable. This is because the thickness can be controlled in units of atomic layers by being formed by the MBE method or the CVD method. The Si amorphous layer formed on the surface of the Al layer is also preferably formed by the MBE method or the CVD method. This is because the thickness can be controlled in units of atomic layers, so that the amount of O ions propagating to the surface of the second Al layer can be accurately controlled.
[0010]
The method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 2 is the method of claim 1, wherein after the metal ions are implanted through the mask, the mask is removed, The ion beam diameter and ion current density of the metal ion focused ion beam controlled by the presence of the surface natural oxide film naturally formed on the surface of the Si amorphous layer or metal ion implantation under oxygen molecular radiation, The surface natural oxide film is selectively forced oxide film Si_xO_yOr the ion implantation amount is increased, and the forced oxide film Si is increased._xO_yAl ions were partially formed on the Al layer by the propagation of O ions from the Si and the sputtering of the Si amorphous layer._xO_yThen, the surface of the Si wafer substrate is dry-etched in units of one atomic layer with a reactive etching gas, and the forced oxide film Si_xO_yAnd Al_xO_yThe surface natural oxide film, the Si amorphous layer, the Al layer, and a part of the Si wafer substrate other than the portion replaced with are removed.
[0011]
After using the mask to irradiate the metal ions, the mask is removed and the chemically stable SiO formed by the metal ions that have passed through the mask.₂And Al_xO_yBy further injecting metal ions into the metal, the amount of ion dose injected into them is increased, and Al is formed._xO_yCan be controlled. As a result, it is possible to efficiently perform drawing with a focused ion beam partially on the surface of the Si wafer substrate, and to perform predetermined fine processing on the entire surface of the Si wafer substrate and also to perform partial micro processing. it can.
[0012]
A method for processing an Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 3 is characterized in that, in claim 2, an arbitrary ion beam diameter implanted into a surface natural oxide film after removing the mask, By controlling the implantation amount of metal ions controlled to the ion current density, the Al_xO_ySputtering part of the layer, the Al_xO_yBy finely processing a pattern into an arbitrary shape and freely controlling both the entire pattern and the local pattern, a nano-order-sized fine structure and / or electronic circuit can be efficiently formed on the entire surface of the Si wafer substrate. Is.
[0013]
After removing the mask, the beam diameter and ion current density of the ion beam to be implanted are controlled. Then, for example, a metal ion beam has an ion beam density of, for example, 6 × 10 so that ions to be implanted have a predetermined concentration or more.¹⁶(Pieces / cm²Inject above. Thereby, in addition to the shape obtained by metal ion implantation using a mask, a finely processed shape can be arbitrarily formed. For this reason, it becomes possible to process a fine structure and / or an electronic circuit having a predetermined pattern of a millimeter order to a nano order size on both the entire surface and the local area of the Si wafer substrate.
[0014]
A method for processing an Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 4 is characterized in that in any one of claims 1 to 3, the thickness of the Si amorphous layer is controlled by controlling the thickness of the Si amorphous layer. Al formed on the surface of the Al layer_xO_yThe size of the can be controlled.
[0015]
By controlling the thickness of the Si amorphous layer formed on the surface in units of atomic layers by MBE or CVD, the amount of O ions propagating to the second Al layer can be controlled. Al formed in_xO_yIt becomes possible to control the size of the layer. Also, the ion beam density is set to 6 × 10, for example.¹⁶(Pieces / cm²) Sputtering occurs when increased to above. And Al_xO_ySince a part of the layer and the Si substrate are scraped off and the shape obtained by Ga ion implantation using a mask can be added to form a micro-processed shape arbitrarily, a wide range of shapes from millimeter to nano order can be freely set. Can be formed.
[0016]
A method for processing a Si semiconductor fine structure by ion beam implantation lithography of an inorganic multilayer resist according to claim 5 is the method according to any one of claims 1 to 4._xO_yAnd Al_xO_yThe surface of the Si wafer substrate can be processed into either a nano-order negative type or a positive type by controlling the size of the portion to be replaced with and the amount removed by the dry etching.
[0017]
Chemically stable Si_xO_yAnd Al_xO_yIt is possible to freely control the fine processing area formed on the surface of the Si wafer substrate by controlling the size of the substrate and the amount of etching, and the surface of the Si wafer substrate is negative, Any positive type can be processed freely. For this reason, it becomes possible to deal with complicated and miniaturized circuit patterns such as circuit patterns used in recent quantum devices.
[0018]
A method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 6 is the same as that of claim 5, wherein the reactive etching gas contains BiF._ThreeOr XeF₂Is used.
Etching can be performed in units of atomic layers, and an arbitrary circuit pattern can be freely formed on the surface of the Si wafer substrate.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an example of an embodiment of a method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a state in which ions are implanted in a shower using a mask, and FIG. 2 is a cross-sectional view in a state where ions are subsequently implanted by changing the implantation amount depending on the location by removing the mask and focusing ions finely. FIG. 3 is a schematic view, and FIG. 3 is a schematic cross-sectional view when dry etching is performed in units of atomic layers. FIG. 4 shows a larger amount of etching than FIG. Here, the ion to be used is not particularly limited as long as it is a relatively heavy metal ion, and generally used Ga ions are preferable because existing facilities can be used as they are.
[0021]
In FIG. 1, 1 is a Si wafer substrate, 2 is an Al layer formed on the surface of the Si wafer substrate 1 by MBE or CVD, and 3 is formed on the surface of the Al layer 2 by MBE or CVD. Si amorphous layer 4 is SiO naturally formed on the surface of the Si amorphous layer 3₂A surface natural oxide film such as 5 represents a mask, and 6 represents Ga ions used as metal ions. Here, as the mask 5, a metal such as gold can be exemplified, but it is preferable to select appropriately according to the ions to be irradiated. The mask 5 is a mask in which an arbitrary pattern is processed on a single mask, a mask in which a plurality of masks can be combined to form a predetermined pattern, and a plurality of masks repeatedly subjected to ion irradiation to generate a predetermined pattern. The pattern may be formed.
[0022]
In the method of processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to the present invention, an Al layer 2 is formed on the surface of the Si wafer substrate 1 by an MBE method or a CVD method to an arbitrary thickness. A Si amorphous layer 3 is laminated on the surface of the substrate. And the SiO naturally formed on the surface₂Without removing the surface natural oxide film 4 or the like, a mask 5 having a predetermined pattern formed on the surface natural oxide film 4 is placed, and a Ga ion beam 6 is irradiated through the mask 5 in a vacuum. At this time, the Ga ion beam 6 may be irradiated on the entire surface in a shower form, or the entire surface may be irradiated by scanning the focused Ga ion beam at a constant speed.
[0023]
By implanting Ga ions 6, the surface natural oxide film 4 is made of SiO, which is a chemically stable oxide.₂7 is generated. And SiO₂7 O ions propagate through the Si amorphous layer 3, and an ion intrusion region 12 is formed in the Si amorphous layer 3. Furthermore, when the implantation amount of Ga ions 6 is increased, SiO₂7 O ion propagation, or SiO₂7 and the sputtering of the Si amorphous layer 3 cause the O ions in the ion intrusion region 12 to reach the surface of the Al layer 2, and Al₂O_ThreeLayer 8 is formed. This chemically stable SiO₂Layer 7 and Al₂O_ThreeThe layer 8 serves as a mask during dry etching.
[0024]
FIG. 2 shows a state in which after the implantation of Ga ions 6 using the mask 5 of FIG. 1, the mask 5 is removed and a focused ion beam 9 of Ga ions is implanted in a vacuum. At this time, the Ga ion beam 9 has an ion implantation amount of 6 × 10 6 (a).¹³(Pieces / cm²), (B) is 6 × 10¹⁵(Pieces / cm²), (C) is 6 × 10¹⁶(Pieces / cm²), (D) and (e) are 6 × 10¹⁷(Pieces / cm²). Here, FIG. 2 (e) shows an example in which the Ga ion beam 9 is irradiated in addition to the location that has already been irradiated with the Ga ions 6 through the mask 5.
[0025]
Here, it is preferable that the diameter of the Ga ion beam 9 is narrowed to 0.5 μm or less, preferably 0.3 μm or less, more preferably 0.1 μm or less. The ion beam 9 has a circular beam tip. For this reason, when the surface natural oxide film 4 is scanned at a constant speed, a portion where the ion beam overlaps is formed in each portion. For this reason, the amount of ion implantation implanted into the surface natural oxide film 4 increases in the vicinity of the central portion of the ion beam 9. That is, the ion area exerted on the surface natural oxide film 4 is smaller than the actual diameter of the ion beam 9, and the area can be 2/3 to 1/2 of the diameter of the irradiated ion beam. For this reason, it is possible to process a line pattern having a thickness of 2/3 to 1/2 of the ion beam diameter of the ion beam 9 on the surface of the surface natural oxide film 4.
[0026]
When the Ga ion beam 9 is irradiated in vacuum and implanted into the surface natural oxide film 4, the surface natural oxide film 4 is a chemically stable forced oxide SiO above a certain implantation amount.₂7 (see FIG. 2). Depending on the implantation amount of the Ga ion beam 9 and the thickness of the Si amorphous layer 3, SiO 2₂The amount of propagation of O ions from 7 to the Al layer 2 or the amount of sputtering of the Si amorphous layer 3 can be controlled.₂O_ThreeThe size of 8 is controlled (see FIG. 2). This chemically stable SiO₂7 and Al₂O_Three8 serves as a mask during dry etching. Al₂O_ThreeThe size of 8 is SiO₂Since the size is about 1/10 of 7, it is possible to perform fine patterning. For this reason, the surface is dry-etched with a reactive etching gas in units of one atomic layer, and SiO 2₂7 and Al₂O_ThreeWhen the portion other than the portion replaced with 8 is removed (see FIG. 3), it becomes possible to process the surface of the Si wafer substrate 1 so as to be a circuit pattern having a predetermined nano-order size. Here, the reactive etching gas that can be used is BiF._ThreeOr XeF₂Can be used.
[0027]
Here, according to the dry etching according to the present embodiment example, it is possible to obtain a surface with good flatness with good reproducibility. Specifically, in etching with a reactive etching gas, the atoms to be etched are atoms at the step positions on the surface, and the steps constituting the surface irregularities are preferentially removed, so that the atomic layer is a single unit. Can be etched. The surface obtained as a result of such single-layer etching is extremely flat. That is, a flat surface can be obtained at the atomic level. Further, this method enables similar etching regardless of the plane index even on the (110) plane which is a cleavage plane. For this reason, the surface of the Si or Al crystal can be etched in units of any one of the (100), (110), and (111) planes regardless of the plane index.
[0028]
In this dry etching, a reactive etching gas is used in an ultrahigh vacuum, for example, 10^-810 to 500-600 ° C. after exhausting to Pa level^-6-10^-FiveEtching can be performed by introducing an etchant gas at a gas partial pressure of Pa. Here, as an etchant gas, BiF_ThreeOr XeF₂Is exemplified as a typical example. Of course, other types may be used.
[0029]
FIG. 3 shows a state in which the surface natural oxide film 4, the Si amorphous layer 3, the Al layer 2, and the ion intrusion region 12 are removed by dry etching, and SiO 2 is formed at a predetermined location on the Si wafer substrate 1.₂Layer 7 and Al₂O_ThreeThe state in which the layer 8 is formed is shown. FIG. 4 shows a state in which the dry etching of FIG. 3 is further advanced. In this case, a part of the Si wafer substrate 1 is etched to form Al.₂O_ThreeThe state where the layer 8 and the Si wafer substrate 1 are formed in a convex shape is shown.
[0030]
In FIG. 3, A is Al by ions that have passed through the mask.₂O_ThreeThe layer 8 is formed and is a portion where dry etching is performed without implanting ions separately. Thereby, as shown in FIGS. 3 and 4, it is possible to provide wide protrusions. Further, as described above, the portions a to d in FIGS. 3 and 4 have different ion implantation amounts, and show changes in the form after dry etching as the ion implantation amount increases. 3 and FIG. 4, the e portion is Al by ions that have passed through the mask.₂O_ThreeIons are further implanted into the portion where the layer 8 is formed.
[0031]
In FIG. 3, by reducing the amount of ion implantation in the a part, the surface natural oxide film 4 is forced oxide₂7 shows a convex fine line formed by dry etching. In the part b, an ion intrusion region 12 in which Ga ions are implanted into the Si amorphous layer 3 is formed, and O ions are Al.₂O_ThreeLayer 8 is formed and SiO₂A convex fine line having a groove 10 formed at the center of the layer 7 is shown. In addition, the c portion has an excessive ion implantation amount, and Al is formed on the surface by ions.₂O_ThreeThe center portion of the layer 8 is sputtered to form a V-shaped groove 11 and a wide groove 10 is formed at the center portion. The portion d indicates that the amount of ion implantation is further increased and a part of the Si wafer substrate 1 is processed by sputtering to form a wide groove 13. FIG. 4 shows a state in which dry etching is further advanced as described above.₂7 and the Si amorphous layer 3 and the Al layer 2 below it elute,₂O_ThreeA fine pattern having the layer 8 on the surface was formed.
[0032]
In this way, by using the mask and controlling the amount of Ga ions 9 to be implanted, negative and positive microfabrication of millimeter order size to nano order size can be freely performed on the Si wafer substrate. It becomes possible.
[0033]
Furthermore, since the surface natural oxide film 4, the Si amorphous layer 3, and the Al layer 2 can be etched for each atomic layer unit, a chemically stable oxide formed by ion implantation is dry-etched. As a mask, it is possible to easily form a structure with a high aspect ratio and a fine size with good reproducibility.
[0034]
In addition, an Al layer and an Si amorphous layer are stacked on the surface of the Si substrate, and SiO formed naturally on the surface of the Si amorphous layer.₂Without removing the surface natural oxide film, etc., by implanting Ga ions into the surface natural oxide film, chemically stable SiO₂In addition, by adjusting the Ga ion implantation amount and the thickness of the Si amorphous layer, Al is formed on the surface of the lower Al layer.₂O_ThreeCan be formed. By controlling the amount of Ga ions to be implanted, the dry etching mask on the surface of the Si wafer substrate after dry etching with a reactive etching gas can be processed into either a negative type or a positive type. Also, any circuit pattern can be easily processed with good reproducibility by combining irradiation by masking with an ion beam and drawing without a mask on the surface of the Si wafer substrate so that a predetermined circuit pattern is obtained during Ga ion implantation. it can. As a result, it is possible to apply not only to semiconductor devices but also to wavelength discrimination devices, microfabrication such as micromachining and microcomponents, and quantum wires.
[0035]
In addition, since the Al layer and the Si layer are stacked, it is possible to form masks having different chemically stable atomic sizes formed by ion implantation, and designing a two-dimensional circuit pattern as in the past. Not only that, the degree of freedom of design is widened, and a circuit pattern can be designed three-dimensionally.
[0036]
In addition, the processing method of the Si semiconductor microstructure by the ion beam implantation lithography of the inorganic multilayer resist according to the present invention is not limited to the above-described embodiment example, and is formed on the surface of the Si wafer substrate, An Al layer that serves to prevent oxidation is formed by Ga._xAl_1-xAs_yP_1-yIt can also be layered. In addition, instead of Si amorphous layer, Ga_xIn_1-xAs_yP_1-yIt can also be a layer. In addition to stacking multiple layers of inorganic materials on the surface of the Si wafer substrate, it is possible to process into a more complicated three-dimensional microstructure by forming a single layer.
[0037]
As described above, by injecting metal ions into the surface natural oxide film formed on the surface of the Al layer and Si amorphous layer stacked on the surface of the Si wafer substrate, chemically not etched by the reactive etching gas. SiO as a stable mask₂And Al₂O_ThreeA fine pattern can be formed. Furthermore, by controlling the amount of metal ions implanted, the pattern formed on the surface of the Si substrate can be processed into either a positive type or a negative type. In addition, since masks having different stability can be formed, not only two-dimensional but also three-dimensional circuit patterning can be designed. For this reason, various semiconductor devices, elements utilizing various quantum device characteristics, quantum wires, quantum boxes, diffraction gratings, and micromachine components can be manufactured.
[0038]
Hereinafter, the present invention will be described more specifically with reference to examples.
(Example)
An Al layer having a thickness of 20 nm and an Si amorphous layer having a thickness of 30 nm are formed on the surface of the Si substrate by MBE. And SiO formed naturally on the Si amorphous layer surface₂A mask patterned in a predetermined pattern with an opening diameter of 100 μm and a thickness of 500 μm facing the surface of the surface natural oxide film, etc. is manufactured by a LIGA manufacturing method and attached to a SiC frame as a thin gold mask on the Si substrate And masking to make Ga ions 6 × 10¹⁵(Pieces / cm²) Irradiation in the form of a shower with an acceleration voltage of 30 kV to implant Ga ions into the surface oxide layer. Then, after removing the mask, Ga ions whose ion beam diameter is reduced to 0.1 μm are similarly 6 × 10 6 in vacuum.¹⁵Piece / cm²Irradiation is performed at an acceleration voltage of 30 kV, and Ga ions are implanted into the surface natural oxide film. After Ga ion implantation, it is installed in an ultra-high vacuum apparatus.^-8After exhausting to Pa level, 10 at 600-700 ° C^-6-10^-FiveBiF with gas partial pressure of Pa_ThreeEtching was performed by introducing gas.
[0039]
FIG. 5 shows an AFM image of the Si wafer substrate surface. As shown in FIG. 5, after removing the mask, by partially implanting an ion beam, a groove can be formed locally. For example, a microstructure having a predetermined shape and a high aspect ratio can be formed relatively easily on a Si wafer. It can be formed on the substrate surface.
[0040]
【The invention's effect】
As described above in detail, according to the present invention, an Al layer and an Si amorphous layer are formed on the surface of the Si wafer substrate, and the surface natural oxide film is formed without removing the surface natural oxide film naturally formed on the surface. By implanting metal ions into the chemically stable SiO2 that is not etched by the reactive etching gas₂And Al_xO_yFurthermore, by controlling the implantation amount of metal ions, the pattern formed on the surface of the Si wafer substrate can be processed into either a positive type or a negative type. Al used as a mask for dry etching in microfabrication₂O_ThreeHas excellent insulation and high dielectric constant, and it is possible to greatly improve the performance of the capacitor, which is the main component of the integrated circuit configuration, by using this property, and to greatly enhance the memory function in the integrated circuit. Become. Furthermore, this Al₂O_ThreeThe layer is very suitable for use as an insulator of so-called SOI (silicon on insulator) formed on a Si substrate.₂O_ThreeIt may be possible to form a high-speed operation circuit in which single crystal Si is formed on the layer to reduce parasitic capacitance. In addition, Al with different atomic sizes_xO_yAnd Si_xO_YTherefore, the design flexibility of the circuit pattern is widened, and useful elements such as quantum wires, quantum boxes, diffraction gratings, and micromachines that make use of various quantum device characteristics can be realized.
[Brief description of the drawings]
FIG. 1 shows a process of ion implantation into a whole structure having a large area using a mask of an example of an embodiment of a Si semiconductor fine structure processing method by ion beam implantation lithography and dry etching of an inorganic multilayer resist according to the present invention. It is a figure for demonstrating.
2 removes the mask after the ion implantation using the mask shown in FIG. 1, and implants ions with an arbitrary size and current density by a focused ion drawing method to process the shape of the entire structure and fine details. It is a figure for demonstrating the process which also processes.
3 is a schematic cross-sectional view when the substrate surface after the ion implantation shown in FIG. 1 is dry-etched, and shows a state where the Si substrate is not cut. FIG.
FIG. 4 is a schematic cross-sectional view when the etching amount is large. When the etching amount is large, a part of the Si substrate is scraped to form Al.₂O_ThreeIt is a figure which shows the state which consists of the circuit which carried.
FIG. 5 is a diagram showing an AFM image of a microstructure on a Si wafer substrate according to the present example.
[Explanation of symbols]
1 Si wafer substrate
2 Al layer
3 Si amorphous layer
4 Surface natural oxide film
5 Mask
6 Metal ions (Ga ions)
7 SiO₂
8 Al₂O_Three
9 Metal ions (Ga ions)
10 groove
11 V-shaped groove
12 Ion penetration area
13 groove

Claims (6)

After forming an Al layer on the surface of the Si wafer substrate, and further forming an Si amorphous layer on the surface of the Al layer, the metal ions are passed through a mask that can selectively absorb an ion beam in an arbitrary shape on the surface of the Si amorphous layer. The surface natural oxide film is selectively formed into the forced oxide film Si _x by the presence of a surface natural oxide film naturally formed on the surface of the Si amorphous layer or metal ion implantation under oxygen molecular radiation. O _y substituted or is generated, further increasing the ejection amount of ions, the Al _x O _y in a part of the Al layer by sputtering of propagation and the Si amorphous layer of O ions from the forced oxidation film Si _x O _y After the formation, the surface of the Si wafer substrate is dry-etched in units of one atomic layer with a reactive etching gas, and the forced oxide film Si _x O Fabrication of Si semiconductor microstructure by ion beam implantation lithography of inorganic multilayer resist that removes part of surface natural oxide film, Si amorphous layer, Al layer and Si wafer substrate other than the portion replaced with _y and Al _x O _y Method. After implanting metal ions through the mask, the mask is removed, and a focused ion beam of metal ions controlled to an arbitrary ion beam diameter and ion current density is naturally formed on the surface of the Si amorphous layer. The surface natural oxide film is selectively replaced or generated with a forced oxide film Si _x O _y by the presence of an oxide film or metal ion implantation under the presence of oxygen molecular radiation, and the ion implantation amount is increased to increase the forced ion film. After generating Al _x O _y in a part of the Al layer by the propagation of O ions from the oxide film Si _x O _y and sputtering of the Si amorphous layer, the surface of the Si wafer substrate is made to be a monolayer by a reactive etching gas. The surface natural oxide film other than the portion replaced with the forced oxide film Si _x O _y and Al _x O _y by dry etching in units, Si amorph The method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 1, wherein a part of the first layer, the Al layer, and the Si wafer substrate is removed. A part of the Al _x O _y layer is sputtered by controlling an arbitrary ion beam diameter to be implanted into the surface natural oxide film after removing the mask and an ion ion implantation amount controlled to an ion current density, _By finely processing the _x O _y pattern into an arbitrary shape and controlling both the entire and local patterns freely, a nano-order size fine structure and / or electronic circuit can be efficiently formed on the entire surface of the Si wafer substrate. A method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 2. 4. The inorganic multilayer resist according to claim 1, wherein the size of Al _x O _y formed on the surface of the Al layer can be controlled by controlling the thickness of the Si amorphous layer. A method for processing a Si semiconductor microstructure. By controlling the size of the portion replaced with Si _x O _y and Al _x O _y and the amount removed by dry etching, the surface of the Si wafer substrate can be made into either a nano-order negative type or a positive type. The method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to any one of claims 1 to 4, which can be processed. The method for processing a Si semiconductor microstructure by ion beam implantation lithography of an inorganic multilayer resist according to claim 5, wherein BiF ₃ or XeF ₂ is used as the reactive etching gas.

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