JPH0381581U - - Google Patents

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Publication number
JPH0381581U
JPH0381581U JP14216989U JP14216989U JPH0381581U JP H0381581 U JPH0381581 U JP H0381581U JP 14216989 U JP14216989 U JP 14216989U JP 14216989 U JP14216989 U JP 14216989U JP H0381581 U JPH0381581 U JP H0381581U
Authority
JP
Japan
Prior art keywords
section
signal
receiver
receives
hit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14216989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14216989U priority Critical patent/JPH0381581U/ja
Publication of JPH0381581U publication Critical patent/JPH0381581U/ja
Pending legal-status Critical Current

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  • Radar Systems Or Details Thereof (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の実施例を示す構成図、第2
図はこの考案の受信機の詳細な構成図、第3図は
この考案による一例としてのデフルータ回路図、
第4図はこの考案の送信周波数のスキヤン方法を
示した説明図、第5図はA/D変換前の受信ビデ
オ波形図、第6図はスレツシヨルド1と比較され
た比較回路出力波形図、第7図は同様にスレツシ
ヨルド2と比較された出力波形図、第8図は同様
にスレツシヨルド3と比較された出力波形図、第
9図はこの考案のランダム制御部の構成図、第1
0図は従来のレーダ装置の構成図である。 図に於いて、1は送受信共用のアンテナ、2は
サーキユレータ、3は送信機部、4は安定化発振
器部、5はこの考案による受信機、6はローカル
信号発生部、7は信号処理部、8はデフルータ回
路、9は可変スレツシヨルド回路、10は制御部
、11はMIX、12はFIL、13,16はI
F AMP、14はDIV、15はGAT、17
はDET、18はVID AMP、19は高周波
受信機入力、20はローカル信号、21は電力分
配器出力或いはデフルータ回路入力、22はデフ
ルータ回路出力、23は受信機出力信号、24,
33はDRV、25はDET、26はA/D変換
器、27は比較回路、28〜31はデイレイライ
ン、32は不一致回路、34はOSC、35はゲ
ート回路、36,37,41はカウンタ回路、3
8,40はラツチ回路、39,42はROM、4
3はBUF回路、44はシステムプリトリガ信号
、45はこの考案のランダム制御部の出力信号、
46は従来の受信機である。なお、図中同一或い
は相当部分には同一符号を付してある。
Figure 1 is a configuration diagram showing an embodiment of this invention, Figure 2
The figure is a detailed configuration diagram of the receiver of this invention, and Figure 3 is a circuit diagram of a defruter as an example of this invention.
Fig. 4 is an explanatory diagram showing the transmission frequency scanning method of this invention, Fig. 5 is a received video waveform diagram before A/D conversion, Fig. 6 is a comparison circuit output waveform diagram compared with threshold 1, 7 is a diagram of the output waveform similarly compared with threshold 2, FIG. 8 is a diagram of the output waveform similarly compared with threshold 3, and FIG. 9 is a diagram of the configuration of the random control section of this invention.
FIG. 0 is a configuration diagram of a conventional radar device. In the figure, 1 is an antenna for transmitting and receiving, 2 is a circulator, 3 is a transmitter section, 4 is a stabilizing oscillator section, 5 is a receiver according to this invention, 6 is a local signal generation section, 7 is a signal processing section, 8 is a defruter circuit, 9 is a variable threshold circuit, 10 is a control section, 11 is MIX, 12 is FIL, 13 and 16 are I
F AMP, 14 is DIV, 15 is GAT, 17
is DET, 18 is VID AMP, 19 is high frequency receiver input, 20 is local signal, 21 is power divider output or defruter circuit input, 22 is defruter circuit output, 23 is receiver output signal, 24,
33 is a DRV, 25 is a DET, 26 is an A/D converter, 27 is a comparison circuit, 28 to 31 are delay lines, 32 is a mismatch circuit, 34 is an OSC, 35 is a gate circuit, 36, 37, and 41 are counter circuits ,3
8 and 40 are latch circuits, 39 and 42 are ROMs, 4
3 is a BUF circuit, 44 is a system pre-trigger signal, 45 is an output signal of the random control section of this invention,
46 is a conventional receiver. Note that the same or corresponding parts in the figures are given the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 目標を捜索或いは探知そして追尾する機能を有
するレーダ装置に於いて、送信電波を外部に放射
し、目標からの反射波を受信する送受信共用のア
ンテナと、送信と受信のアイソレーシヨンを行う
サーキユレータと、高周波電力パルスを出力する
送信機部と、送信周波数の占有帯域幅内で周波数
固定の安定化発振器を複数個有する安定化発振器
部と、上記アンテナからの入力を中間周波数信号
に変換した後、後述のデフルータ回路からの信号
を受けて、非同期信号を中間周波数段にて除去し
た後、ビデオ信号として出力する受信機部と、上
記安定化発振器部からの信号を受けて上記受信機
部で使用するローカル信号を作り出すローカル信
号発生部と、上記受信機部の出力を受けて捜索ビ
デオの検出、角度追尾や距離追尾を行う信号処理
部と、従来は信号処理部で行われていた処理であ
るヒツト間相関処理を上記受信機内で行う事によ
り、非同期信号等によつて受信機が飽和するのを
防ぎ、さらにランダムに変化する周波数に対応し
た入力ビデオのヒツト方向の相関をとるデフルー
タ回路と、ヒツト間相関処理を行う信号レベルを
決める可変スレツシヨルド回路と、上記安定化発
振器部の有する発振器の数だけのステツプを1周
期とし、1ヒツト毎にステツプ的にランダムにス
キヤンする周波数切り換え信号を上記安定化発振
器部へ出力するランダム制御部から構成されてい
ることを特徴とするレーダ装置。
In a radar device that has the function of searching for, detecting, and tracking a target, there is a shared antenna for transmitting and receiving that emits transmitted radio waves to the outside and receives reflected waves from the target, and a circulator that isolates transmitting and receiving. , a transmitter section that outputs high-frequency power pulses, a stabilizing oscillator section having a plurality of stabilizing oscillators with fixed frequencies within the occupied bandwidth of the transmission frequency, and after converting the input from the antenna into an intermediate frequency signal, A receiver section that receives a signal from a defruter circuit (described later), removes the asynchronous signal at an intermediate frequency stage, and then outputs it as a video signal, and a receiver section that receives a signal from the stabilizing oscillator section and uses it in the receiver section. A local signal generation section generates a local signal to be used, and a signal processing section receives the output from the receiver section and performs search video detection, angle tracking, and distance tracking. A deruter circuit that performs inter-hit correlation processing within the receiver to prevent the receiver from being saturated by asynchronous signals, etc., and further correlates the input video in the hit direction corresponding to randomly changing frequencies; A variable threshold circuit that determines the signal level for inter-hit correlation processing, and a frequency switching signal that scans randomly in steps for each hit, with one period having steps equal to the number of oscillators in the stabilizing oscillator section, are used to stabilize the frequency switching signal. 1. A radar device comprising a random control section that outputs an output to an oscillator section.
JP14216989U 1989-12-08 1989-12-08 Pending JPH0381581U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14216989U JPH0381581U (en) 1989-12-08 1989-12-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14216989U JPH0381581U (en) 1989-12-08 1989-12-08

Publications (1)

Publication Number Publication Date
JPH0381581U true JPH0381581U (en) 1991-08-20

Family

ID=31689009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14216989U Pending JPH0381581U (en) 1989-12-08 1989-12-08

Country Status (1)

Country Link
JP (1) JPH0381581U (en)

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