JPH0378017B2 - - Google Patents

Info

Publication number
JPH0378017B2
JPH0378017B2 JP2374185A JP2374185A JPH0378017B2 JP H0378017 B2 JPH0378017 B2 JP H0378017B2 JP 2374185 A JP2374185 A JP 2374185A JP 2374185 A JP2374185 A JP 2374185A JP H0378017 B2 JPH0378017 B2 JP H0378017B2
Authority
JP
Japan
Prior art keywords
terminal
signal
line
receiving
switch section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2374185A
Other languages
Japanese (ja)
Other versions
JPS61184022A (en
Inventor
Shigeo Nakatsuka
Tachiki Ichihashi
Yoshihiro Ujihashi
Shoichiro Senoo
Takane Kakuno
Mitsuhiro Ishizaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2374185A priority Critical patent/JPS61184022A/en
Publication of JPS61184022A publication Critical patent/JPS61184022A/en
Publication of JPH0378017B2 publication Critical patent/JPH0378017B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は時分割技術と蓄積プログラム
(stored program)とを用いたデイジタル交換装
置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to a digital switching device using time division technology and stored programs.

〔従来の技術〕[Conventional technology]

第3図は従来のデイジタル交換装置を示すブロ
ツク図であり、図において、101はスイツチ
部、102aは第1の信号送信器、102bは第
2の信号送信器、103aは第1の信号受信器、
103bは第2の信号受信器、104は加入者回
線T1〜Tnの状態を調べる走査器、105は制
御部である。制御部105はプロセツサを備え蓄
積プログラム制御により、交換にかかわる信号の
判断、制御指令信号の出力、交換の動作状態制御
等を行う。交換装置200は上述の101,10
2a,102b,103a,103b,104,
104の部分を含んで構成される。1T,2T,
……nTはそれぞれ端末、T1,T2,……Tnは
それぞれ当該端末から交換装置200への送信
線、R1,R2,……Rnはそれぞれ交換装置2
00から各端末に到る受信線である。
FIG. 3 is a block diagram showing a conventional digital switching device. In the figure, 101 is a switch section, 102a is a first signal transmitter, 102b is a second signal transmitter, and 103a is a first signal receiver. ,
103b is a second signal receiver, 104 is a scanner for checking the status of subscriber lines T1 to Tn, and 105 is a control unit. The control unit 105 includes a processor, and performs judgment of signals related to exchange, output of control command signals, control of operation status of exchange, etc. under storage program control. The exchange device 200 is the above-mentioned 101, 10
2a, 102b, 103a, 103b, 104,
It is composed of 104 parts. 1T, 2T,
...nT are respective terminals, T1, T2, ...Tn are respective transmission lines from the terminals to switching device 200, and R1, R2, ...Rn are respective switching devices 2
00 to each terminal.

また、ST1,ST2はそれぞれ第1及び第2の
信号送信器102a,102bからスイツチ部1
01に到る信号線、SR1,SR2はそれぞれスイ
ツチ部101から第1及び第2の信号受信器10
3a,103bに到る信号線である。
Further, ST1 and ST2 are connected to the switch unit 1 from the first and second signal transmitters 102a and 102b, respectively.
The signal lines SR1 and SR2 leading to 01 are connected from the switch section 101 to the first and second signal receivers 10, respectively.
3a and 103b.

第4図は第3図の各送信線、受信線、信号線上
の信号の時間経過を示す動作タイムチヤートであ
つて、第3図と同一符号は第3図に示す線上の信
号を意味し、〜の符号は以下の説明において
各段階の動作を表すために用いた符号に対応す
る。
FIG. 4 is an operation time chart showing the passage of time of signals on each transmission line, reception line, and signal line in FIG. 3, and the same reference numerals as in FIG. 3 mean signals on the lines shown in FIG. The symbols .about.correspond to the symbols used to represent the operations at each stage in the following explanation.

以下第4図を用い第3図に示す装置の動作を、
端末1Tが端末2Tへの通信を行う場合を例にし
て説明する。
Below, using FIG. 4, the operation of the device shown in FIG. 3 will be explained.
An example will be explained in which the terminal 1T communicates with the terminal 2T.

:端末1Tは送信線T1をオンにする。交換装
置200は走査器104により常時送信線T1
〜Tnを走査しているがT1がオンになつたこ
とを検出すると、第1の信号送信器102a及
び第1の信号受信器103aをスイツチ部10
1を介して送信線T1、受信線R1にそれぞれ
接続し、T1線とSR1線を、またR1線とST
1線をそれぞれ接続する。第1の信号送信器1
02aはST1線をオンにするのでR1線はオ
ンになる。
:Terminal 1T turns on transmission line T1. The switching device 200 uses the scanner 104 to constantly connect the transmission line T1.
When detecting that T1 is turned on while scanning ~Tn, the first signal transmitter 102a and the first signal receiver 103a are switched to the switch unit 10.
1 to the transmission line T1 and the reception line R1, respectively, and connect the T1 line and the SR1 line, and the R1 line and the ST
Connect one wire to each. first signal transmitter 1
02a turns on the ST1 line, so the R1 line turns on.

、:端末1TはR1線がオンになつたことに
よつて、ダイヤルをしても良いことを知り端末
2Tのダイヤル番号をT1線に送出する。
,: When the R1 line is turned on, the terminal 1T learns that it is allowed to dial, and sends the dial number of the terminal 2T to the T1 line.

:第1の信号受信器103aがダイヤル番号を
検出し、制御部105はそのダイヤル番号を調
べて、ダイヤル番号によつて示される相手は端
末2Tであることを知る。
:The first signal receiver 103a detects the dialed number, and the control unit 105 checks the dialed number and learns that the other party indicated by the dialed number is the terminal 2T.

:第2の信号送信器102bとR2線、第2の
信号受信器103bとT2線をスイツチ部10
1で接続して、第2の信号送信器102bによ
り、オン信号を送出して、端末2Tに着信があ
つたことを通知する。
:The second signal transmitter 102b and the R2 line, and the second signal receiver 103b and the T2 line are connected to the switch unit 10.
1, and the second signal transmitter 102b sends an on signal to notify the terminal 2T of an incoming call.

:端末2Tはによる信号を受けて受信状態に
することを通知するためにT2線をオンにす
る。
: The terminal 2T receives the signal and turns on the T2 line to notify that it will be in the receiving state.

:第2の信号受信器103bはT2線がオンに
なつたことにより端末2Tが受信状態になつた
ことを知り、これを制御部105に知らせる。
:The second signal receiver 103b learns that the terminal 2T is in the reception state by turning on the T2 line, and notifies the control unit 105 of this.

:制御部105は端末2Tが受信状態になつた
ことを、端末1Tに通知するための第1の信号
送信器102aによりACK(acknowledge)信
号をR1線へ送出する。
:The control unit 105 sends an ACK (acknowledge) signal to the R1 line using the first signal transmitter 102a to notify the terminal 1T that the terminal 2T has entered the receiving state.

:制御部105はスイツチ部101を切換えて
端末1Tと端末2Tの間を接続する。
:The control unit 105 switches the switch unit 101 to connect the terminal 1T and the terminal 2T.

:スイツチ部101の切換期間を持つた後端末
1T、端末2T間で通信を行う。
: After a switching period of the switch section 101, communication is performed between the terminals 1T and 2T.

なお、上述の動作例で端末1Tを発信端末、端
末2Tを着信端末という。
In addition, in the above-mentioned operation example, the terminal 1T is called a calling terminal, and the terminal 2T is called a receiving terminal.

従来の装置は以上のように動作するので、端末
1Tは線R1からACK信号を受けても直ちにデ
ータ送信を開始することはできず、スイツチ部1
01における切換が終了するのを待たねばなら
ず、この切換えのために必要な時間が、制御部1
05が複数の回線T1〜Tn、R1〜Rnを制御す
るために不定となり、スイツチ部101の切換が
完了する前に端末1Tから送出されたデータは紛
失することがあるので、第4図に示すとの間
に一定の時間tをおいて端末1Tに送信すること
を許していた。
Since the conventional device operates as described above, the terminal 1T cannot immediately start data transmission even if it receives an ACK signal from the line R1, and the switch section 1
It is necessary to wait for the switching at 01 to be completed, and the time required for this switching is
Since 05 controls multiple lines T1 to Tn and R1 to Rn, the data sent from terminal 1T may be lost before the switching of switch unit 101 is completed, so the data sent from terminal 1T may be lost, as shown in FIG. The data was allowed to be transmitted to the terminal 1T after a certain period of time t.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の装置では上述のようにACK信号を受け
てからデータ送信までに一定時間待たねばならぬ
という問題点があつた。
As mentioned above, conventional devices have the problem of having to wait a certain period of time after receiving an ACK signal before transmitting data.

この発明は上記のような問題点を解決するため
になされたもので、ACK信号が端末に知らされ
ると端末で直ちにデータ送信を開始することので
きる交換装置を得ることを目的としている。
The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a switching device that allows a terminal to immediately start data transmission when the terminal is notified of an ACK signal.

〔問題点を解決するための手段〕[Means for solving problems]

この発明では端末側から見た送信線とスイツチ
部との間に遅延回路を設けることによつて、
ACK信号が端末に知らされると端末で直ちにデ
ータ送信を開始しても、そのデータがスイツチ部
に到達するときにはスイツチ部における切換えが
完了しているようにした。
In this invention, by providing a delay circuit between the transmission line and the switch section as seen from the terminal side,
Even if the terminal starts data transmission immediately when the ACK signal is notified to the terminal, the switching at the switch section is completed by the time the data reaches the switch section.

〔作用〕[Effect]

ACK信号が端末に知らされると端末では直ち
にデータ送信を開始することができ、待時間を除
去することができる。
When the terminal is notified of the ACK signal, the terminal can immediately start data transmission, eliminating waiting time.

〔実施例〕〔Example〕

以下この発明の実施例を図面について説明す
る。第1図はこの発明の一実施例を示すブロツク
図であつて、第3図と同一符号は同一又は相当部
分を示し、1D,2D,……nDはそれぞれ遅延
回路、I1,I2,……Inはそれぞれ各遅延回路
1D,2D,……nDの出力をスイツチ部101
へ導く信号線である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention, in which the same symbols as in FIG. 3 indicate the same or corresponding parts, 1D, 2D, . . . nD are delay circuits, I1, I2, . In switches the output of each delay circuit 1D, 2D, ...nD to the switch section 101.
This is the signal line leading to.

第2図は第1図の各送信線、受信線、信号線上
の信号の時間経過を示す動作タイムチヤートであ
つて、第4図と同様な形式で表示してある。
FIG. 2 is an operation time chart showing the passage of time of signals on each transmission line, reception line, and signal line in FIG. 1, and is displayed in the same format as FIG. 4.

以下、第1図及び第2図についてこの発明の装
置の動作を説明するが、第2図と第4図の比較か
ら明らかなように動作段階、、、、、
、、における動作は第1図の装置において
も第3図の装置と同様であるので、この部分の動
作の重複した説明は省略する。
The operation of the apparatus of the present invention will be explained below with reference to FIGS. 1 and 2. As is clear from a comparison between FIGS.
, , , are the same in the apparatus shown in FIG. 1 as in the apparatus shown in FIG. 3, so a redundant explanation of the operations in these parts will be omitted.

第2図に、で示す部分はこの発明の装置に
特有な動作段階であり、以下に説明する。
In FIG. 2, the portions marked with are the operational steps specific to the apparatus of the present invention, which will be explained below.

:端末1TはACK信号を受取ると直ちにデー
タ送信を開始する。
:The terminal 1T starts data transmission immediately upon receiving the ACK signal.

:動作段階で送信が開始されたデータは遅延
回路によつて1Dによつて遅延しI1線上の信
号となりスイツチ部1に入る。遅延回路1Dよ
る遅延時間の間にスイツチ部1の切換が完了し
ているのでI1線上の信号はR2線上に出力さ
れ相手端末2Tへ到着する。
:The data whose transmission is started in the operation stage is delayed by 1D by the delay circuit and becomes a signal on the I1 line and enters the switch section 1. Since the switching of the switch unit 1 is completed during the delay time by the delay circuit 1D, the signal on the I1 line is output onto the R2 line and reaches the destination terminal 2T.

遅延回路1D,2D,……nDはどのような
構成であつてもよい。たとえばシフトレジスタ
を使用する遅延回路であつてもよく、又先入出
(first−in−first−out FIFO)メモリのよう
な、読出されるまでは回路内に情報が保持され
るものであつてもよい。FIFOメモリの場合に
はスイツチ部1の切換動作が完了するまでの
間、スイツチ部に到着するデータを保留してお
くことができる。
The delay circuits 1D, 2D, . . . nD may have any configuration. For example, it may be a delay circuit using a shift register, or it may be a first-in-first-out (FIFO) memory where information is held within the circuit until it is read out. good. In the case of a FIFO memory, data arriving at the switch section 1 can be held until the switching operation of the switch section 1 is completed.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、端末からスイ
ツチ部に到る送信線に遅延回路を入れたので、端
末は呼接続完了を示す信号もしくは着信指示信号
を受信すると直ちにデータの送信を開始すること
ができる。
As described above, according to the present invention, a delay circuit is inserted into the transmission line from the terminal to the switch section, so that the terminal starts transmitting data immediately upon receiving a signal indicating completion of call connection or an incoming call instruction signal. I can do it.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示すブロツク
図、第2図は第1図の各送信線、受信線、信号線
上の信号の時間経過を示す動作タイムチヤート、
第3図は従来の装置を示すブロツク図、第4図は
第3図の各送信線、受信線、信号線上の信号の時
間経過を示す動作タイムチヤートである。 図において1T,2T,……nTはそれぞれ端
末、1D,2D,……nDはそれぞれ遅延回路、
101はスイツチ部、102aは第1の信号送信
器、102bは第2の信号送信器、103aは第
1の信号受信器、103bは第2の信号受信器、
104は走査器、105は制御部、200は交換
装置である。尚、各図中同一符号は同一又は相当
部分を示す。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is an operation time chart showing the time course of signals on each transmission line, reception line, and signal line in FIG. 1.
FIG. 3 is a block diagram showing a conventional device, and FIG. 4 is an operation time chart showing the passage of time of signals on each transmission line, reception line, and signal line in FIG. In the figure, 1T, 2T, ... nT are terminals, 1D, 2D, ... nD are delay circuits, respectively.
101 is a switch section, 102a is a first signal transmitter, 102b is a second signal transmitter, 103a is a first signal receiver, 103b is a second signal receiver,
104 is a scanner, 105 is a control unit, and 200 is an exchange device. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】 1 複数の端末の各端末からの各送信線、上記各
端末からの各受信線、接続制御信号を送出する第
1及び第2の信号送信器、接続制御信号を受信す
る第1及び第2の信号受信器、上記各送信線、上
記各受信線、上記第1及び第2の信号送信器、上
記第1及び第2の信号受信器間の接続切換を行う
スイツチ部、上記各送信線上の信号状態を走査す
る走査器、交換制御動作を統括制御する制御部を
有する交換装置において、 上記各送信線の出力を遅延して上記スイツチ部
に入力する各遅延回路、 上記走査器により送信線がオン状態にあること
が検出された発信端末からの送信線を上記第1の
信号受信器に接続し上記発信端末からの受信線を
上記第1の信号送信器に接続して上記発信端末か
ら送出されるダイヤル番号を検出する手段、 上記ダイヤル番号により着信端末を知り上記着
信端末からの送信線を上記第2の信号受信器に接
続し上記着信端末からの受信線を上記第2の信号
送信器に接続して上記着信端末に着信を通知する
手段、 上記着信端末が受信状態になつたことを上記第
1の信号送信器により上記発信端末に知らせ上記
発信端末と上記着信端末とを上記スイツチ部を介
して接続する手段、 上記着信端末が受信状態となつたことを知らさ
れた上記発信端末が送出したデータが上記発信端
末と上記着信端末間が上記スイツチ部を介して接
続された後に上記スイツチ部に入力されるよう上
記遅延回路を設定する手段を備えたことを特徴と
する交換装置。 2 遅延回路を先入先出メモリ(FIFOメモリ)
により構成したことを特徴とする特許請求の範囲
第1項記載の交換装置。
[Claims] 1. Each transmission line from each of the plurality of terminals, each reception line from each of the terminals, first and second signal transmitters that transmit connection control signals, and receive connection control signals. a first and second signal receiver, each of the transmission lines, each of the reception lines, the first and second signal transmitters, and a switch unit that switches connections between the first and second signal receivers; In a switching device having a scanner that scans the signal state on each of the transmission lines, and a control unit that centrally controls the switching control operation, each delay circuit that delays the output of each of the transmission lines and inputs it to the switch unit; A transmitting line from a transmitting terminal whose transmitting line is detected to be in an ON state by a device is connected to the first signal receiver, and a receiving line from the transmitting terminal is connected to the first signal transmitter. means for detecting a dial number sent from the calling terminal, which detects the called terminal from the dial number, connects a transmission line from the called terminal to the second signal receiver, and connects a receiving line from the called terminal to the second signal receiver; means for notifying the receiving terminal of an incoming call by connecting to a second signal transmitter, and notifying the calling terminal by means of the first signal transmitter that the receiving terminal is in a receiving state; means for connecting the above-mentioned calling terminal and the receiving terminal via the switch section, and data sent by the calling terminal that has been informed that the receiving terminal is in a receiving state is connected via the switch section between the sending terminal and the receiving terminal. 1. An exchange device comprising: means for setting the delay circuit so that the signal is input to the switch section after the signal has been switched. 2 Delay circuit as first-in first-out memory (FIFO memory)
An exchange device according to claim 1, characterized in that it is constructed by:
JP2374185A 1985-02-08 1985-02-08 Exchange Granted JPS61184022A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2374185A JPS61184022A (en) 1985-02-08 1985-02-08 Exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2374185A JPS61184022A (en) 1985-02-08 1985-02-08 Exchange

Publications (2)

Publication Number Publication Date
JPS61184022A JPS61184022A (en) 1986-08-16
JPH0378017B2 true JPH0378017B2 (en) 1991-12-12

Family

ID=12118731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2374185A Granted JPS61184022A (en) 1985-02-08 1985-02-08 Exchange

Country Status (1)

Country Link
JP (1) JPS61184022A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2555222B2 (en) * 1989-09-14 1996-11-20 富士通株式会社 Network control system

Also Published As

Publication number Publication date
JPS61184022A (en) 1986-08-16

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