JPH0376338A - Node equipment - Google Patents

Abstract

PURPOSE:To attain the setting of diversified and flexible transmission paths corresponding to a label number by providing a label detector connecting to an input terminal, a switch, a gate circuit and a branch insertion processing decision memory. CONSTITUTION:When a block-processing transmission signal is inputted to a node equipment input 2, the transmission signal is fed to a level detector 3 and a 2X1 switch 8. Then the detector 3 extracts a label number from the transmission signal and a branch insertion processing decision memory 4 is operated by using the number as a storage address. As a result, a branch insertion processing decision is read as an output of a branch insertion processing decision memory state of the memory 4 to control the gate 5 and the switch 8. Then the branch and insertion operation of each node is specified depending on the label of an input transmission signal via the gate 5 and the switch 8 in response to the state as to when the branch decision output of the memory 4 is 0 or 1. Thus, the versatile and flexible transmission path is set corresponding to the label number by setting the memory state in each node equipment.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a device that provides various transmission paths (buses) in a transmission network.

(Prior art) In transmission used in LAN, etc., a receiving node device number is added to the transmission information before transmission, and if the receiving node device side has its own node device number in the transmission signal, it receives the signal. was. This is sufficient for transmission between two nodes, but when transmitting to all node devices, a code called a global bit is added and received when each node device detects this.

(Problem to be Solved by the Invention) However, when there are many sets of transmissions between a certain group of specific node devices, it is necessary to add corresponding global bits. For this reason, there are disadvantages of an increase in the number of additional bits and an increase in the number of circuits for processing the additional bits. Furthermore, such an addition has the disadvantage that flexibility is lost with respect to changes in the transmission route (path).

The present invention aims to improve this drawback.

(Means for Solving the Problems) A feature of the present invention is that fixed-length or variable-length blocks of information including label information and transmission information are transmitted between nodes by connecting to a ring-type or bus-type transmission line. In the node device, a label detection device connected to the input end;
a switch that is inserted between the input end and the output end and inserts a transmission signal; a gate circuit that is connected to the input end and takes out a branch output; and a memory for controlling a gate circuit, and the node device controls branching and relay judgment of received signals and insertion of transmitted signals according to label information.

(Operation) Determination of branching, relay processing, and node insertion processing of the received signal corresponding to the label added to the head portion of the received signal can be defined in the memory in each node device. Therefore, by rewriting the memory, various flexible transmission paths (buses) such as transmission between two nodes or transmission between one node and multiple nodes (broadcasting, multicasting) become possible.

(Example) FIG. 1 is a diagram for explaining the present invention in detail, in which 1 is a node device, 2 is a node device input, 3 is a label detection, 4 is a branch/insertion processing judgment memory, 5 is a gate, and 6 is a Branch output, 7
is an insert input, 8 is a 2×1 switch, 9 is a node device output, and lo is a memory status write input. FIG. 2 is a block transmission signal diagram input to the node device 1. As shown in FIG.

The operation of the node device 1 shown in FIG. 1 is as follows. Second
When the transmission signal shown in blocks is input to the node device 2, the transmission signal is sent to the label detection 3 and the 2X1 switch 8. In the label detection 3, a label number is extracted from the transmission signal, and the branch/insertion processing judgment memory 4 operates using the number as a storage address. As a result, the branch/insertion judgment shown in FIG. 3 is read out as the processing judgment memory state output of the branch/insertion processing judgment memory 4, and the gate 5 and the 2×1 switch 8 are controlled.

The branch judgment output of this memory 4 is O'' as shown in FIG.
In this case, the gate 5 closes and nothing is output to the branch output 6. In the case of "1", the transmission signal is output to the branch output 6 by opening the gate 5. This indicates that a branching operation can be defined at each node depending on the label of the input transmission signal.

On the other hand, if the branch judgment output of the memory 4 sent to the 2×1 switch 8 is “O” as shown in FIG. The transmitted signal is relayed as is to the node. In the case of “1”, the insertion hole cuff and the node device output 9 are connected by the 2×1 switch 8, and the signal input to the insertion hole cuff is output to the node device output 9. This indicates that the insertion operation can be defined at each node depending on the label of the input transmission signal.

The state of the branch/insert processing judgment memory 4 is that the detection 3 is the state of the memory 4.
The state (label number and branch/insertion state) corresponding to the transmission route (bus) to be set is input and set from the memory state write input 10 using the period when the is not operating.

As explained above, branching and
The insertion operation can be defined by the branch/insertion processing judgment memory 4 of each node device. This node operation can be classified into relay, transmission only, reception only (broadcasting), and transmission and reception as shown in FIG.

Next, regarding the configuration using the transmission path in the direction of node 1→node 2→...→node 1→node 1 in the direction of node 1→node 2→→node 1→node 1 in FIG. , indicates that a multicast transmission path (bus) is possible.

FIG. 5 shows an example of the correspondence between the transmission route (bus)/label number and the four states of the intra-node branch/insertion processing judgment memory. In FIG. 6, label numbers corresponding to FIG. 5 and transmission paths (buses) that can be transmitted between nodes are shown by arrows, including the transmission direction.

Label 1: Transmission between node 1 and node 5 (other nodes are relays).

Label 2: Transmission between node 3 and node 5 (other nodes are relays).

Label 3: Node 2 is transmitting, all other nodes are receiving.

Label 4: Node 1 is sending, node 2.4.5.7 is receiving (other nodes are relaying).

Label 5: Node l is sending, node 2.3 is receiving (4
node is a relay).

Furthermore, using the same label, Node 5 is transmitting, nodes 6, 7 . 1 is the form that uses multiplexing for reception. Status.

In this way, it can be seen that various transmission paths (buses) can be set by using the branch/insertion process determination memory.

Although Fig. 4 shows an example of a ring type transmission line, the connection between node 7 and node 1 is eliminated to make it a bus type, and node 7
→ Node 6 → ... → Node 2 → Node I is added to create a bidirectional bus. Each node is composed of a total of two devices: a node device 1 and a node device 1° with the left and right sides reversed. In order to realize the same transmission route (bus) as shown in FIG. 6 using this bidirectional bus, the transmission route (bus) and label number shown in FIG. →) and reverse direction (-) transmission line) can be realized.

Although the ring-type transmission line and the bus-type transmission line are shown, in order for the received signal to be processed by the node device, the transmitted signal must be in a blocked transmission signal format (FIG. 2). For this reason, in a ring network, one of the node devices, and in a bus network, the node devices at both ends of the bus need a function to generate a block transmission signal format (with a label display that can be inserted in all node devices). be.

(Effects of the Invention) As explained above, the label added to the beginning of the received signal is used as the address of the rewritable memory installed in each node device, and the received signal is branched according to the memory state. , performs relay processing and determination of insertion processing from a node. This has the advantage that various and flexible transmission paths (buses) corresponding to label numbers can be set by setting the memory state within each node device.

The limit on the number of settings is up to the maximum number of labels that are added parts of block information. If this number of labels is large, each node device will require a large amount of branch/insert processing judgment memory. To avoid this, node equipment is involved (
(Corresponding to operations other than relay) The amount of memory used can be reduced by using a hash method that shortens the address corresponding to a label, an associative memory that stores processing corresponding to the related label, etc.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a node device according to the embodiment, FIG. 2 is a block transmission signal diagram, FIG. 3 is a relationship diagram between the branch/add processing judgment memory state and node device operation, and FIG. 4 is a ring-shaped transmission path. Figure 5 is an example showing the relationship between the transmission path (bus)/label number and the branch/insertion processing judgment memory state in a ring type, Figure 6 is a diagram showing Figure 5 as a connection between nodes, and Figure 7 is a bus This is another example showing the relationship between the transmission path (bus)/label number and the branch/insertion processing judgment memory state in the form of a data transmission route (bus). 1: Node device, 2: Node device input, 3 Label detection, 4: Branch/insertion processing judgment memory, 5: Gate, 6: Branch output, 7: Insertion input,
8: 2X1 switch, 9: Node device output, 10: Memory status write input.

Claims (1)

[Claims] In a node device that is connected to a ring-type or bus-type transmission line and transmits fixed-length or variable-length block information including label information and transmission information between nodes, the node device is connected to an input end. a label detection device that is inserted between the input end and the output end and inserts a transmission signal; a gate circuit that is connected to the input end and takes out a branch output; , and a memory that controls the switch and gate circuits by readout output, and controls branching and relay judgment of received signals and insertion of transmission signals according to label information.