JPH0371712A - Active filter - Google Patents
Active filterInfo
- Publication number
- JPH0371712A JPH0371712A JP20810989A JP20810989A JPH0371712A JP H0371712 A JPH0371712 A JP H0371712A JP 20810989 A JP20810989 A JP 20810989A JP 20810989 A JP20810989 A JP 20810989A JP H0371712 A JPH0371712 A JP H0371712A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- differential amplifier
- input terminal
- output terminal
- capacitance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 31
- 238000010586 diagram Methods 0.000 description 3
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- Networks Using Active Elements (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
本発明は、Ｂ Ｅ Ｆ （Ｂａｎｄ Ｅｌｉｍｉｎａｔ
ｅ Ｆｉｌｔｅｒ ）を構成するアクティブフィルタに
関するもので、特にフィルタ特性の調整を容易に行なう
ことの出来るアクティブフィルタに関する。DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Field of Application The present invention is directed to BEF (Band Eliminat)
The present invention relates to an active filter constituting a filter, and particularly relates to an active filter whose filter characteristics can be easily adjusted.
（口〉従来の技術 ２次のＢＥＦとして第２図の如きものが知られている。(mouth) Conventional technology The one shown in FIG. 2 is known as a second-order BEF.
第２図において、入力端子（１）からの入力信号は、第
１差動増幅器（２）及び第１コンデンサ〈３〉から成る
積分回路（４〉に印加される。積分回路（４〉の出力信
号は、第１バツフア（５）を介して第２差動増幅器（６
）に印加される。又、入力端子（１〉からの入力信号は
、分圧抵抗（７〉及び（８）で分圧された後、第３バツ
フア〈９〉を介して第２コンデンサ（１０〉の一端に印
加される。前記第２コンデンサ（１０）の一端から第２
差動増幅器（６）の出力端及び第２バツフア（１１）の
入力端側を見ると、これはＨＰＦ特性を呈している。そ
の為、積分特性即ちＬＰＦ特性及びＨＰＦ特性を通過し
た信号が第２バツフγ（１１〉を介して出力端子（１２
）に得られる。In Figure 2, an input signal from an input terminal (1) is applied to an integrating circuit (4) consisting of a first differential amplifier (2) and a first capacitor <3>.The output of the integrating circuit (4) The signal is passed through the first buffer (5) to the second differential amplifier (6).
) is applied to In addition, the input signal from the input terminal (1) is divided by the voltage dividing resistors (7) and (8), and then applied to one end of the second capacitor (10) via the third buffer (9). from one end of the second capacitor (10) to the second capacitor (10).
Looking at the output end of the differential amplifier (6) and the input end of the second buffer (11), they exhibit HPF characteristics. Therefore, the signal that has passed through the integral characteristic, that is, the LPF characteristic and the HPF characteristic, passes through the second buffer γ (11) to the output terminal (12
) can be obtained.
前記出力端子（１２）に発生する出力信号は、第１及び
第２差動増幅器（２）及びり６）の負入力端子（−）に
帰還され、フィルタのＱを定めている。The output signal generated at the output terminal (12) is fed back to the negative input terminal (-) of the first and second differential amplifiers (2) and 6), thereby determining the Q of the filter.
第２図において、入力信号をＶｉｎ、出力信号をＶ ｏ
ｕｔ、第１及び第２差動増幅器（２）及び（６）の相互
コンダクタンスをｇ ｆｌｉｔ ＋ ｇ ｌ１ｌｔｓ第
１コンデンサ（３〉の容量をＣ０、第２コンデンサ（１
０）の容量をＣ２、分圧抵抗（７〉及び（８〉の分圧比
をａとすると、出力信号Ｖｏｕｔは重ね合わせの理より
ｇｍ、 ｇｍｔ
Ｖｏｕｔ＝ （（Ｖｉｎ−Ｖｏｕｔ） −−Ｖｏｕｔ
）式ａＶｉｎ…（１〉ＣＩ
〔ただし、Ｓ＝ｊω（ωは角周波数）〕となり、第（１
）式より伝達関数（Ｖｏｕｔ／ Ｖ ｉｎ ）はとなり
、折点（カットオ））周波数ω。、零点（中心）周波数
ω６、鮮鋭度Ｑ、
ω、＝Ｗ ・・ ・・・・・・ （３）となる。従っ
て、第（２）式より第２図の回路がＢＥＦとなることが
解かる。In Figure 2, the input signal is Vin and the output signal is V o
ut, the mutual conductance of the first and second differential amplifiers (2) and (6) is g flit + g l1lts The capacitance of the first capacitor (3) is C0, the second capacitor (1
If the capacitance of 0) is C2, and the voltage division ratio of voltage dividing resistors (7> and (8>) is a, then the output signal Vout is gm from the principle of superposition, gmt Vout= ((Vin-Vout) −-Vout
) formula aVin...(1>CI [however, S=jω (ω is the angular frequency)], and the (1st
) From the equation, the transfer function (Vout/Vin) becomes, where the cutoff frequency is ω. , zero point (center) frequency ω6, sharpness Q, ω, =W (3). Therefore, it can be seen from equation (2) that the circuit shown in FIG. 2 becomes BEF.
（ハ）発明が解決しようとする課題 ところで、第２図の回路におて折点周波数ω。(c) Problems to be solved by the invention By the way, in the circuit of FIG. 2, the corner frequency ω.
を変更する場合、第（３）式よりコンデンサの容量Ｃ８
及びＣ１を変えれば良いことが明らかである。When changing the capacitance C8 from equation (3),
It is clear that it is sufficient to change C1 and C1.
ところが、そうすると、零点周波数ω、も−緒に変化し
てしまい、元の値に戻す為に分圧比ａを再設定しなけれ
ばならないという問題が生じる。However, if this is done, the zero point frequency ω will also change, causing the problem that the voltage division ratio a must be reset in order to return to its original value.
（二〉課題を解決するための手段
本発明は、上述の点に鑑み成されたもので、入力信号が
印加される入力端子と、正入力端子及び負入力端子を有
し、該正入力端子に前記入力信号が印加される能動型の
積分回路と、正入力端子及び負入力端子を有し、該正入
力端子に前記積分回路の出力信号がバッファを介して印
加される差動増幅器と、該差動増幅器の出力信号がバッ
ファを介して得られる出力端子と、該出力端子と前記積
分回路及び前記差動増幅器の負入力端子との間に接続さ
れた帰還手段と、前記差動増幅器の出力端子と前記入力
端子との間に接続された第１のコンデンサと、から成る
アクティブフィルタにおいて、前記差動増幅器の出力端
と所定電位点との間に第２のコンデンサを接続し、該コ
ンデンサの容量を変えることによりフィルタ特性を変え
るようにしたことを特徴とする。(2) Means for Solving the Problems The present invention has been made in view of the above points, and has an input terminal to which an input signal is applied, a positive input terminal and a negative input terminal, and the positive input terminal an active type integrating circuit to which the input signal is applied, and a differential amplifier having a positive input terminal and a negative input terminal, and to which the output signal of the integrating circuit is applied via a buffer; an output terminal from which an output signal of the differential amplifier is obtained via a buffer; a feedback means connected between the output terminal and the negative input terminal of the integrating circuit and the differential amplifier; a first capacitor connected between an output terminal and the input terminal; a second capacitor connected between the output terminal of the differential amplifier and a predetermined potential point; The filter characteristic is changed by changing the capacitance of the filter.
（＊〉作用
本発明に依れば、入力端子と差動増幅器の出力端子との
間に第１のコンデンサを接続すると共に、前記差動増幅
器の出力端子と所定電位点との間に第２のコンデンサを
接続している。その為、前記第２のコンデンサの値を変
えることに依って、零点周波数の変動を起こすこと無く
折点周波数の調整を行なうことが出来る。(*> Effect: According to the present invention, a first capacitor is connected between the input terminal and the output terminal of the differential amplifier, and a second capacitor is connected between the output terminal of the differential amplifier and a predetermined potential point. Therefore, by changing the value of the second capacitor, the corner frequency can be adjusted without causing a fluctuation in the zero point frequency.
（へ）実施例
第１図は、本発明の一実施例を示す回路図で、（１３）
は入力端子（１＞と第２差動増幅器（６）の出力端との
間に接続される第２コンデンサ、及び（１４）は前記第
２差動増幅器（６）の出力端とアースとの間に接続され
た第３コンデンサである。(f) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, (13)
is a second capacitor connected between the input terminal (1>) and the output terminal of the second differential amplifier (6), and (14) is a capacitor connected between the output terminal of the second differential amplifier (6) and the ground. A third capacitor is connected between the two capacitors.
尚、第１図において第２図と同一の回路素子については
同一の符号を付し、説明を省略する。Note that circuit elements in FIG. 1 that are the same as those in FIG. 2 are designated by the same reference numerals, and explanations thereof will be omitted.
第１図において、入力信号をＶｉｎ、出力信号をＶ ｏ
ｕｔ、第１及び第２差動増幅器（２）及び（６）の相互
コンダクタンスをｇｍ、及びｇｍｔｓ第１乃至第３コン
デンサ（３） 、 （１３）及び（１４）の容量をＣ１
乃至Ｃｈ第２及び第３コンデンサ（１３）及び（１４）
の入力端子（１）から見た分圧比をａ、（ａ＝ｃｔ／ｃ
、＋Ｃ，）とすると、出力信号Ｖｏｕｔは、ｇｍ、
ｇｍ。In Figure 1, the input signal is Vin and the output signal is V o
ut, the mutual conductance of the first and second differential amplifiers (2) and (6) as gm, and gmts as the capacitance of the first to third capacitors (3), (13) and (14) as C1
~Ch second and third capacitors (13) and (14)
The partial voltage ratio seen from the input terminal (1) of is a, (a=ct/c
, +C,), the output signal Vout is gm,
gm.
Ｖｏｕｔ＝ （（Ｖｉｎ−Ｖｏｕｔ） −−Ｖｏｕｔ
） ｚＳＣ。Vout= ((Vin-Vout) --Vout
) zSC.
＋ ａ Ｖｉｎ ・・・・・・・・・・・
・・・・・・・・・・・・・〈６）となり、第（６）式
より伝達関数（Ｖ ｏｕｔ／ Ｖ ｉｎ ）は、
となる。その為、折点周波数ω。、零点周波数ω９、鮮
鋭度Ｑは、
うことの出来るＢＥＦを提供することが出来る。+ a Vin・・・・・・・・・・・・
・・・・・・・・・・・・〈6) From equation (6), the transfer function (V out/V in ) is as follows. Therefore, the corner frequency ω. , zero point frequency ω9, and sharpness Q can provide a BEF that can be determined as follows.
第１図は、本発明の一実施例を示す回路図、及び第２図
は従来のＢＥＦを示す回路図である。
（１）・・・入力端子、 （４）・・・積分回路２．
（６）・・・第２差動増幅器、 （１２）・・・出力
端子、 （１３）・・・第２コンデンサ、（１４）・・
・第３コンデンサ。
となる。第（８）式より、第１図の回路において折点周
波数ω。を変更する場合第３コンデンサ（１４）の容量
Ｃ３を変えても良いことが明らかである。
前記容量Ｃ１は零点周波数ω、を示す第（９）式中には
含まれない。その為、第１図の回路に依れば、零点周波
数ω、の値を変動させること無く折点周波数ω。の調整
が可能となる。
（ト）発明の効果FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional BEF. (1)...Input terminal, (4)...Integrator circuit 2.
(6)...Second differential amplifier, (12)...Output terminal, (13)...Second capacitor, (14)...
・Third capacitor. becomes. From equation (8), the corner frequency ω in the circuit of FIG. It is clear that when changing the capacitance C3 of the third capacitor (14), the capacitance C3 of the third capacitor (14) may be changed. The capacitance C1 is not included in equation (9) representing the zero point frequency ω. Therefore, according to the circuit shown in FIG. 1, the corner frequency ω can be maintained without changing the value of the zero point frequency ω. can be adjusted. (g) Effects of the invention
Claims (1)
入力信号が印加される能動型の積分回路と、 正入力端子及び負入力端子を有し、該正入力端子に前記
積分回路の出力信号がバッファを介して印加される差動
増幅器と、 該差動増幅器の出力信号がバッファを介して得られる出
力端子と、 該出力端子と前記積分回路及び前記差動増幅器の負入力
端子との間に接続された帰還手段と、前記差動増幅器の
出力端子と前記入力端子との間に接続された第１のコン
デンサと、から成るアクティブフィルタにおいて、前記
差動増幅器の出力端と所定電位点との間に第２のコンデ
ンサを接続し、該コンデンサの容量を変えることにより
フィルタ特性を変えるようにしたことを特徴とするアク
ティブフィルタ。(1) An input terminal to which an input signal is applied; an active integrating circuit having a positive input terminal and a negative input terminal, and to which the input signal is applied; a positive input terminal and a negative input terminal; a differential amplifier having a positive input terminal to which an output signal of the integrating circuit is applied via a buffer; an output terminal from which an output signal of the differential amplifier is obtained via a buffer; a feedback means connected between the integrating circuit and the negative input terminal of the differential amplifier; and a first capacitor connected between the output terminal of the differential amplifier and the input terminal. An active filter characterized in that a second capacitor is connected between the output end of the differential amplifier and a predetermined potential point, and the filter characteristics are changed by changing the capacitance of the capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20810989A JPH0691412B2 (en) | 1989-08-11 | 1989-08-11 | Active filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20810989A JPH0691412B2 (en) | 1989-08-11 | 1989-08-11 | Active filter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0371712A true JPH0371712A (en) | 1991-03-27 |
| JPH0691412B2 JPH0691412B2 (en) | 1994-11-14 |
Family
ID=16550787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20810989A Expired - Lifetime JPH0691412B2 (en) | 1989-08-11 | 1989-08-11 | Active filter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0691412B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010070880A (en) * | 2001-06-16 | 2001-07-27 | 김명진 | Manufacturing method of Metal Powder and facility of the same by Ultrasonic Atomizing Nozzle |
-
1989
- 1989-08-11 JP JP20810989A patent/JPH0691412B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010070880A (en) * | 2001-06-16 | 2001-07-27 | 김명진 | Manufacturing method of Metal Powder and facility of the same by Ultrasonic Atomizing Nozzle |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0691412B2 (en) | 1994-11-14 |
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