JPH0371661U - - Google Patents

Info

Publication number
JPH0371661U
JPH0371661U JP13270689U JP13270689U JPH0371661U JP H0371661 U JPH0371661 U JP H0371661U JP 13270689 U JP13270689 U JP 13270689U JP 13270689 U JP13270689 U JP 13270689U JP H0371661 U JPH0371661 U JP H0371661U
Authority
JP
Japan
Prior art keywords
layer
semiconductor
integrated circuit
semiconductor integrated
layer electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13270689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13270689U priority Critical patent/JPH0371661U/ja
Publication of JPH0371661U publication Critical patent/JPH0371661U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の半導体集積回路の断面図、第
2図は本考案の他の実施例を示す半導体集積回路
の断面図、第3図は従来の半導体集積回路の断面
図である。
FIG. 1 is a cross-sectional view of a semiconductor integrated circuit according to the present invention, FIG. 2 is a cross-sectional view of a semiconductor integrated circuit showing another embodiment of the present invention, and FIG. 3 is a cross-sectional view of a conventional semiconductor integrated circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 光を電気信号に変換する受光領域とこの電
気信号を処理する半導体素子領域とを一つの半導
体層内に形成した半導体集積回路に於いて、 前記半導体層上に形成される層間絶縁膜は遮光
機能を有することを特徴とした半導体集積回路。 (2) 前記遮光膜は有機材料より成ることを特徴
とした請求項第1項記載の半導体集積回路。 (3) 光を電気信号に変換する受光領域とこの電
気信号を処理する半導体素子領域とを一つの半導
体層内に形成した半導体集積回路に於いて、 前記半導体層上に形成された第1の層間絶縁膜
と、 前記受光領域および前記半導体素子領域に接続
した第1層目の電極と、 前記受光領域を除いた前記第1層目の電極と前
記第1層目の層間絶縁膜を覆い、遮光機能を有し
た第2の層間絶縁膜と、 前記第1層目の電極と接続した第2層目の電極
とを有することを特徴とした半導体集積回路。 (4) 光を電気信号に変換する受光領域とこの電
気信号を処理する半導体素子領域とを一つの半導
体層内に形成した半導体集積回路に於いて、 前記半導体層上に形成されるパツシベーシヨン
膜は、遮光機能を有し、前記受光領域は除去され
ることを特徴とした半導体集積回路。 (5) 前記半導体層と前記パツシベーシヨン膜と
の間には、第1層目の電極と第2層目の電極が形
成され、前記半導体層と前記第1層目の電極との
間および前記第1層目の電極と前記第2層目の電
極との間には、夫々第1層目の層間絶縁膜と第2
層目の層間絶縁膜が形成されることを特徴とした
請求項第4項記載の半導体集積回路。 (6) 光を電気信号に変換する受光領域とこの電
気信号を処理する半導体素子領域とを一つの半導
体層内に形成した半導体集積回路に於いて、 前記半導体集積回路の表面に形成したパツシベ
ーシヨン膜上に遮光機能を有した膜を有すること
を特徴とした半導体集積回路。
[Claims for Utility Model Registration] (1) In a semiconductor integrated circuit in which a light receiving region that converts light into an electrical signal and a semiconductor element region that processes this electrical signal are formed in one semiconductor layer, the semiconductor layer A semiconductor integrated circuit characterized in that an interlayer insulating film formed thereon has a light shielding function. (2) The semiconductor integrated circuit according to claim 1, wherein the light shielding film is made of an organic material. (3) In a semiconductor integrated circuit in which a light receiving region that converts light into an electrical signal and a semiconductor element region that processes this electrical signal are formed in one semiconductor layer, a first an interlayer insulating film; a first layer electrode connected to the light receiving region and the semiconductor element region; covering the first layer electrode and the first layer interlayer insulating film excluding the light receiving region; A semiconductor integrated circuit comprising: a second interlayer insulating film having a light shielding function; and a second layer electrode connected to the first layer electrode. (4) In a semiconductor integrated circuit in which a light receiving region that converts light into an electrical signal and a semiconductor element region that processes this electrical signal are formed in one semiconductor layer, a passivation film formed on the semiconductor layer is . A semiconductor integrated circuit having a light shielding function, wherein the light receiving area is removed. (5) A first layer electrode and a second layer electrode are formed between the semiconductor layer and the passivation film, and a first layer electrode and a second layer electrode are formed between the semiconductor layer and the first layer electrode and the second layer electrode. Between the first layer electrode and the second layer electrode, a first layer interlayer insulating film and a second layer insulation film are provided, respectively.
5. The semiconductor integrated circuit according to claim 4, wherein the interlayer insulating film is formed in two layers. (6) In a semiconductor integrated circuit in which a light receiving region that converts light into an electrical signal and a semiconductor element region that processes this electrical signal are formed in one semiconductor layer, a passivation film formed on the surface of the semiconductor integrated circuit. A semiconductor integrated circuit characterized by having a film having a light shielding function thereon.
JP13270689U 1989-11-15 1989-11-15 Pending JPH0371661U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13270689U JPH0371661U (en) 1989-11-15 1989-11-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13270689U JPH0371661U (en) 1989-11-15 1989-11-15

Publications (1)

Publication Number Publication Date
JPH0371661U true JPH0371661U (en) 1991-07-19

Family

ID=31680151

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13270689U Pending JPH0371661U (en) 1989-11-15 1989-11-15

Country Status (1)

Country Link
JP (1) JPH0371661U (en)

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