JPH0369940U - - Google Patents
Info
- Publication number
- JPH0369940U JPH0369940U JP12847289U JP12847289U JPH0369940U JP H0369940 U JPH0369940 U JP H0369940U JP 12847289 U JP12847289 U JP 12847289U JP 12847289 U JP12847289 U JP 12847289U JP H0369940 U JPH0369940 U JP H0369940U
- Authority
- JP
- Japan
- Prior art keywords
- squelch
- level
- display circuit
- circuit
- squelch level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Noise Elimination (AREA)
Description
第１図はこの考案に係るスケルチレベル表示回
路の実施例を示す回路ブロツク図である。第２図
は従来例の回路ブロツク図である。
主な符号の説明、１……クロツク発振器、２…
…アツプダウンカウンタ、３……アナログスイツ
チ、４……スケルチレベル設定用抵抗、５……ス
ケルチ回路、６……デコーダ、７……スケルチレ
ベル表示発光ダイオード、８……Ｓメータレベル
表示発光ダイオード、９……コンパレータ、１０
……コンパレータ設定用抵抗、１１……Ｓメータ
用検出回路、１２……スケルチレベル設定用ダウ
ンスイツチ、１３……スケルチレベル設定用アツ
プスイツチ。
FIG. 1 is a circuit block diagram showing an embodiment of the squelch level display circuit according to the invention. FIG. 2 is a circuit block diagram of a conventional example. Explanation of main symbols, 1...Clock oscillator, 2...
... Up-down counter, 3 ... Analog switch, 4 ... Squelch level setting resistor, 5 ... Squelch circuit, 6 ... Decoder, 7 ... Squelch level display light emitting diode, 8 ... S meter level display light emitting diode, 9...Comparator, 10
... Resistor for setting comparator, 11 ... Detection circuit for S meter, 12 ... Down switch for setting squelch level, 13 ... Up switch for setting squelch level.
Claims (1)
スケルチレベルコントロール回路を有する無線通
信機のスケルチレベル表示回路において、 前記スケルチレベルコントロール回路にスケル
チ開放の設定レベルを表示させるデコーダと、表
示器とを設け、スケルチ開放設定レベルを受信信
号強度メータの指示と一致させて表示するように
構成したことを特徴とするスケルチレベル表示回
路。[Claims for Utility Model Registration] A squelch level display circuit for a wireless communication device having an up-down squelch level control circuit using a binary counter, comprising: a decoder for displaying a squelch release setting level on the squelch level control circuit; 1. A squelch level display circuit comprising: a squelch level display circuit configured to display a squelch open setting level in accordance with an indication of a received signal strength meter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12847289U JPH0369940U (en) | 1989-11-04 | 1989-11-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12847289U JPH0369940U (en) | 1989-11-04 | 1989-11-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0369940U true JPH0369940U (en) | 1991-07-12 |
Family
ID=31676179
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12847289U Pending JPH0369940U (en) | 1989-11-04 | 1989-11-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0369940U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001095775A1 (en) * | 2000-06-14 | 2001-12-20 | Matsushita Electric Industrial Co., Ltd. | Rice scoop |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6070828A (en) * | 1983-09-27 | 1985-04-22 | Nec Corp | Squelch level setting device |
-
1989
- 1989-11-04 JP JP12847289U patent/JPH0369940U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6070828A (en) * | 1983-09-27 | 1985-04-22 | Nec Corp | Squelch level setting device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001095775A1 (en) * | 2000-06-14 | 2001-12-20 | Matsushita Electric Industrial Co., Ltd. | Rice scoop |