JPH0368218A - Deglitch circuit - Google Patents

Abstract

PURPOSE:To eliminate the glitch of a D/A converter and to prevent the level reduction in a high band due to an aper ture effect by selecting and using a signal in the period free from glitch of the output signal of the D/A converter. CONSTITUTION:The digital input signal of a D/A converter 1 is changed at the time of the change from the low level to the high level of a transfer clock signal D of the digital input signal of the converter 1. Consequently, an analog output A is changed stepwise at the time of the change from the low level to the high level of the signal D. A delay circuit 5 outputs a signal E obtained by delaying the signal D by 1/4 period, and an AND 9 operates AND between signals D and E to output a signal F. The signal F is in the high level for 1/4 period of the signal D, and the signal A is inputted to an analog switch 2 from a terminal 6 and this switch 2 sends a signal D to an amplifying circuit 3 while the signal F is in the high level. Since the signal A is delayed behind the stepwise change by the delay time, the signal A is free from glitch, and the signal B inputted to the circuit 3 is free from glitch and the signal value is stable.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a deglitch circuit that removes glitches in a DA conversion circuit.

[Prior Art] FIG. 4 is a block diagram showing the configuration of a conventional deglitch circuit. In the figure, (41) is a DA converter, (42)
is a sample-and-hold circuit that samples and holds the output signal of the DA converter (41), and (43) is a low-pass filter that smoothes the output signal of the sample-and-hold circuit (42).

Figure 5 is a time chart explaining the operation of the circuit in Figure 4.
It is.

The output signal a of the DA converter (41) is input to a sample hold circuit (42), sampled when the sample signal is rHJ, and then held until the sample signal becomes rHJ. This sample signal S is a signal that is output when there is no glitch in the output signal a of the DA converter (41>), and the output signal C of the sample hold circuit 2) becomes a glitch-free signal. This output signal C is smoothed by a low-pass filter (43) and taken out as an analog signal.

[Problem to be solved by the invention] In such a conventional deglitch circuit, glitches are completely eliminated, but the signal becomes a step-like waveform with a width of one sampling period, and the high frequency level is reduced due to the aperture effect. There was a problem.

The present invention was made in order to solve the above problems, and an object of the present invention is to provide a deglitch circuit that can eliminate glitches in a DA converter and at the same time prevent a drop in high frequency level due to the aperture effect. purpose.

[Means for Solving the Problems] A deglitch circuit according to the present invention is provided between a DA converter and a low-pass filter, selects a glitch-free period of the output signal of the DA converter, and sets the period to 1. It has an analog switch that sends a pulse amplitude modulated signal having a pulse width shorter than one sampling period to a low-pass filter.

[Function] In the present invention, a width is selected that is a glitch-free period of the output signal of the DA converter and whose period is shorter than one sampling period. Then, the output signal of the DA converter selected in this way, that is, a pulse amplitude modulated signal having a pulse width shorter than one sampling period, is sent to a low-pass filter.

[Embodiment] FIG. 1 is a block diagram showing the configuration of a deglitch circuit according to an embodiment of the present invention.

The analog output A of the DA converter (1>) is input to the input terminal (6) of the analog switch (2), and the input terminal (7) of the analog switch (2) is connected to ground.

The signal B selected by the analog switch (2) is input to the amplifier circuit (3), and the output signal C of the amplifier circuit (3) is input to the low-pass filter (4>).

DA converter (1) digital input signal transfer lock D
is input to the delay circuit (5), and the AND circuit (9) takes the logical product of the output signal E of the delay circuit (5) and the transfer lock D, and the logical product F is used to control the analog signal (2). Input to terminal <8).

FIG. 2 is a time chart illustrating the operation of the circuit of FIG. 1.

The analog switch (2) selects the signal at the input terminal (6) when the signal level at the control terminal (8) is rHJ, and selects the signal at the input terminal (6) when the signal level at the control terminal (8) is rLJ.
7).

The signal is a transfer lock of the digital input signal of the DA converter (1), and is a signal whose time at rLJ and time at rHJ are equal, and when it changes from "L" to rHJ, D
The digital human input signal of the A converter (1) changes. Therefore, the signal A changes stepwise when the signal changes from rLJ to rl(J).

The delay circuit (5) has a delay time of 1/4 of the period of the signal, and outputs a signal E which is delayed by 1/4 of the period of the signal.

The signal F, which is the logical product of the signal RI and the signal E, is a signal that is rHJ for a period of 1/4 of the period of the signal RI, and the analog switch (2) operates during the period when the signal F is "H". The input of the input terminal (6), that is, the output signal A of the DA converter (1>) is sent to the amplifier circuit (3) as a signal B. The signal F is rHJ
During the period of , there is no glitch in signal A because it is delayed by the delay time from the time when signal A changes stepwise, and since signal A is stable, signal B input to amplifier circuit (3) There are no glitches and the signal value is stable.

During the period when the signal F is rLJ, the analog switch (2)
Signal B
The human input signal B of the amplifier circuit (3) is a pulse amplitude modulated (PAM) signal whose pulse width is 1/4 of the period of the signal.

The amplifier circuit (3) amplifies the signal B by the value obtained by dividing the period of the signal by the pulse width of the human input signal B. In this example, the pulse width of the input signal B is 174 times the period of the signal, so the signal The value obtained by dividing the period of R by the pulse width of input signal B is r4J
The amplitude of the human input signal B is amplified four times, and the signal C is converted into a signal C whose effective value is almost the same as the effective value of the signal A in the low frequency band. This signal C is filtered through a low-pass filter (4
> is smoothed and extracted as an analog signal.

By the way, the high frequency level drop due to the aperture effect in the above embodiment is due to the output signal A of the DA converter (1).
is converted into a pulse amplitude modulation signal whose pulse width is 1/4 of the sampling period, so its frequency characteristics are as follows (1
) is as follows. If the sampling period is Ts, then 2 π fTs 7s However, equation (1) is normalized by f-OH.

Furthermore, if the output signal of the DA converter is used as is, as in the conventional deglitch circuit shown in FIG.
Its frequency characteristic is expressed by the following equation (2).

2 π fTs Off ≦ 7s However, equation (2) is normalized by f-OH.

FIG. 3 is a characteristic diagram illustrating the above equations (1) and (2). According to FIG. 3, it can be seen that the high frequency reduction of the aperture effect according to the present invention is at most about 0.2 db, which is an improvement of more than 3 db compared to the conventional method.

[Effect of the Invention J As described above, according to the present invention, since the signal in the glitch-free period of the output signal of the DA converter is selected and used by the switch, it is possible to obtain a signal completely free of glitches. I can do it. Furthermore, a width whose period is shorter than one sampling period is selected, and a pulse amplitude modulation signal with a pulse width shorter than one sampling period is sent to the low-pass filter, thereby reducing the drop in high frequencies due to the aperture effect. It can be prevented.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a deglitch circuit according to an embodiment of the present invention, FIG. 2 is a time chart explaining the operation of the circuit in FIG. 1, and FIG. 4 is a block diagram showing the configuration of a conventional deglitch circuit, and FIG. 5 is a time chart explaining the operation of FIG. 4. In the figure, <l) is a DA converter, (2) is an analog switch, (3> is an amplifier, (4) is a low-pass filter,
(5) is a delay circuit. Figure 1 Frequency characteristics Figure 3 Figure 1.1. Figure 5)・

Claims (1)

[Claims] provided between a DA converter and a low-pass filter, selecting a glitch-free period of the output signal of the DA converter;
A deglitch circuit characterized in that it has an analog switch that makes the period shorter than one sampling period and sends a pulse amplitude modulated signal having a pulse width shorter than one sampling period to the low-pass filter.