JPH0367404A - Manufacture of conducting composition material and conducting circuit - Google Patents

Manufacture of conducting composition material and conducting circuit

Info

Publication number
JPH0367404A
JPH0367404A JP20432089A JP20432089A JPH0367404A JP H0367404 A JPH0367404 A JP H0367404A JP 20432089 A JP20432089 A JP 20432089A JP 20432089 A JP20432089 A JP 20432089A JP H0367404 A JPH0367404 A JP H0367404A
Authority
JP
Japan
Prior art keywords
dimethylsiloxane
added
conductive
pts
firing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20432089A
Other languages
Japanese (ja)
Inventor
Toshio Ogawa
敏夫 小川
Tadamichi Asai
忠道 浅井
Osamu Ito
修 伊藤
Noritaka Kamimura
神村 典孝
Satoru Ogiwara
荻原 覚
Takao Kobayashi
小林 喬雄
Hiromi Isomae
磯前 博巳
Michio Otani
大谷 通男
Katsuo Ebisawa
海老沢 勝男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Hitachi Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP20432089A priority Critical patent/JPH0367404A/en
Publication of JPH0367404A publication Critical patent/JPH0367404A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks

Landscapes

  • Paints Or Removers (AREA)
  • Conductive Materials (AREA)

Abstract

PURPOSE:To prevent the occurrence of worm-eaten hole-shaped defects and form a dense and uniform thin conducting layer by containing a material generating a specific quantity or more of dimethylsiloxane at the time of baking in a composition material containing metal powder, a binder and an organic solvent. CONSTITUTION:Glass powder 5 pts.wt. is added to spherical copper powder 100 pts.wt. to obtain a powder composition material. A vehicle such as acrylic resin and silicone resin 0.1-1.0 pts.wt. are added to it and kneaded, and butyl carbitol acetate is added to obtain the conductor paste with the viscosity suitable for screen printing. It is coated on an alumina board and baked in the nitrogen atmosphere at 900 deg.C for 10min. Dimethylsiloxane 100ppm or above is generated in the baking atmosphere, thus adequate coagulation among metal grains is suppressed, no worm-eaten hole-shaped defect is generated on a conducting layer with the thickness 5mum or below, and the dense and uniform layer can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、セラミックス上に導電層を形成するに好適な
導電性組成物および導電回路の製法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a conductive composition suitable for forming a conductive layer on ceramics and a method for manufacturing a conductive circuit.

〔従来の技術〕[Conventional technology]

高精細な混成集積回路を製造する方法の一つに、回路パ
ターンをホトリソグラフ技術を用いて、エツチングによ
り形成する方法〔小川敏夫他ニアイエムシー(インター
ナショナルマイクロエレクトロニクス)1988プロシ
ーデインゲス:IMC(International 
 Microelectrics  conferen
ce)1988 Proceedings、 194〜
200頁〕がある。
One of the methods for manufacturing high-definition hybrid integrated circuits is to form a circuit pattern by etching using photolithography [Toshio Ogawa et al.
Microelectronics conference
ce) 1988 Proceedings, 194~
200 pages].

この方法は、大別して次の4工程により行なうことがで
きる。
This method can be roughly divided into the following four steps.

■ セラミック基板上に導電性ペーストを塗布、乾燥し
て導体層を形成する工程。
■ The process of applying conductive paste onto a ceramic substrate and drying it to form a conductive layer.

■ 前記導電層上に感光性レジストを用いて所望のパタ
ーンを形成する工程。
(2) A step of forming a desired pattern on the conductive layer using a photosensitive resist.

■ 前記導電層の不要部分をエツチングにより除去する
工程。
(2) A step of removing unnecessary portions of the conductive layer by etching.

■ 前記レジストを除去する工程。■ A step of removing the resist.

上記の方法で高精細なパターンを形成するためには、厚
さが薄く、緻密、均質な導体層の形成が要求される。
In order to form a high-definition pattern using the above method, it is required to form a thin, dense, and homogeneous conductor layer.

例えば、線幅、線間ともに40μmのパターンを得るた
めには、導体層としての厚さは5μm以下で、かつ、緻
密な膜が要求される。緻密な膜が得られれば膜厚を薄く
することができ、高精細なパターンを得ることができる
For example, in order to obtain a pattern with both line width and line spacing of 40 μm, the thickness of the conductor layer is required to be 5 μm or less and a dense film is required. If a dense film can be obtained, the film thickness can be reduced and a highly precise pattern can be obtained.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

セラミック基板上に銅等の金属の厚さ5μm以下の導電
層を形成しようとすると、焼成工程において金属粒子が
局部的に凝集を起し、形成される導電層が、あたかも虫
に食われたようないわゆる「虫食い状欠陥」を生成して
、緻密、均質な導電層を形成できないと云う問題があっ
た。
When attempting to form a conductive layer of metal such as copper with a thickness of 5 μm or less on a ceramic substrate, the metal particles locally agglomerate during the firing process, leaving the formed conductive layer as if eaten by insects. There is a problem in that so-called "worm-eaten defects" are generated, making it impossible to form a dense and homogeneous conductive layer.

また、こうした前記金属粒子の過度な凝集を抑制する手
段として、焼成温度を低くすることが考えられるが、こ
の場合は、基板であるセラミックと導電層中のバインダ
との反応が不十分となり、実用に足る接着強度が得られ
ないと云う問題があつた・ 本発明の目的は、膜厚5μm以下でも緻密、均質な導電
層を形成できる導電性組成物、導電回路の製法を提供す
ることにある。
In addition, as a means to suppress such excessive agglomeration of the metal particles, it may be possible to lower the firing temperature, but in this case, the reaction between the ceramic substrate and the binder in the conductive layer would be insufficient, making it practical for practical use. There was a problem that sufficient adhesive strength could not be obtained.The purpose of the present invention is to provide a conductive composition and a method for manufacturing a conductive circuit that can form a dense and homogeneous conductive layer even with a film thickness of 5 μm or less. .

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、 金属粉末、バインダ、有機溶媒を含む組成物に、焼成時
の加熱により焼成雰囲気中にジメチルシロキサンを11
00pp以上(より好ましくは200〜101000p
p生成する物質を含むことを特徴とする導電性組成物、
並びに、セラミック基板上に導電性ペーストによる回路
パターンを形成し、焼成炉で焼成する導電回路の製法に
おいて、 前記焼成炉内の雰囲気が、1100pp以上(より好ま
しくは200〜101000ppのジメチルシロキサン
を含むことを特徴とする導電回路の製法。
The present invention involves adding 11% dimethylsiloxane to a composition containing metal powder, a binder, and an organic solvent in the firing atmosphere by heating during firing.
00pp or more (more preferably 200 to 101000p
A conductive composition characterized by containing a substance that generates p,
In addition, in the method for manufacturing a conductive circuit in which a circuit pattern is formed using a conductive paste on a ceramic substrate and fired in a firing furnace, the atmosphere in the firing furnace contains dimethylsiloxane of 1100 pp or more (more preferably 200 to 101000 pp). A method for manufacturing a conductive circuit characterized by:

にある。It is in.

前記ジメチルシロキサンは、導電性組成物の焼成時にジ
メチルシロキサンを生成する物質を導電性組成物に直接
添加するか、焼成炉の雰囲気中にジメチルシロキサンを
導入することによって、本発明の目的を達成することが
できる。
The dimethylsiloxane achieves the object of the present invention by directly adding a substance that generates dimethylsiloxane to the conductive composition during firing of the conductive composition, or by introducing dimethylsiloxane into the atmosphere of the firing furnace. be able to.

これにより厚さが5μm以下の導電層においても、前記
虫食い状欠陥を発生することなく、緻密。
As a result, even in a conductive layer with a thickness of 5 μm or less, the above-mentioned moth-eaten defects are not generated and the conductive layer is dense.

均質な導電層を形成することができる。A homogeneous conductive layer can be formed.

前記導電層は、前記ホトリソグラフ法によるパターニン
グによって、線幅、線間ともに40μmまたはそれ以下
のパターン精度で導電回路を形成することができる。
By patterning the conductive layer using the photolithography method, a conductive circuit can be formed with a pattern accuracy of 40 μm or less in both line width and line spacing.

前記ジメチルシロキサンを生成する物質としては、ジメ
チルシロキサンそのものを用いてもよいし、またシリコ
ーンレジン等を用いてもよい。
As the substance that generates dimethylsiloxane, dimethylsiloxane itself may be used, or silicone resin or the like may be used.

例えば、シリコーンレジンの場合は、導電性組成物10
0重量部に対して、 0.2〜4重量部配合することに
よって達成される。
For example, in the case of silicone resin, the conductive composition 10
This is achieved by adding 0.2 to 4 parts by weight to 0 parts by weight.

また、前記シリコーンレジンを導電性組成物の焼成温度
で加熱することによって、焼成雰囲気中に容易に含ませ
ることもできる。
Furthermore, by heating the silicone resin at the firing temperature of the conductive composition, it can be easily included in the firing atmosphere.

〔作用〕[Effect]

本発明において、緻密、均質な導電層が得られる理由は
、添加されたジメチルシロキサンが導電層を形成する金
属粒子の表面に作用して、焼成による該金属粒子相互の
過度な凝集を抑制する効果があるためと考える。
In the present invention, the reason why a dense and homogeneous conductive layer is obtained is that the added dimethylsiloxane acts on the surface of the metal particles forming the conductive layer and suppresses excessive aggregation of the metal particles with each other during firing. I think this is because there is.

次に、本発明を実施例により具体的に説明する。Next, the present invention will be specifically explained using examples.

〔実施例 1〕 平均粒径0.3,0.5.1μmの3種の球状混合銅粉
末(重量比1:1:1)100重量部(以下単に部と云
う)に対し、はうけい酸鉛を主成分とする平均粒径 1
.4μmのガラス粉末5部を配合し、らい壊機で混合し
て粉末組成物を作成した。
[Example 1] For 100 parts by weight (hereinafter simply referred to as parts) of three types of spherical mixed copper powders (weight ratio 1:1:1) with average particle diameters of 0.3 and 0.5.1 μm, Average particle size mainly composed of acid lead 1
.. A powder composition was prepared by blending 5 parts of 4 μm glass powder and mixing with a lysate machine.

該粉末組成物にアクリル樹脂(サンヨー化rli、二C
B−1)/ブチルカルピトールアセテートの1/3(部
)の割合で配合したビヒクルと、シリコーンレジン(信
越化学: X−62−7411)とを適量加え、3本ロ
ールを用いて室温で混練した。
The powder composition is coated with an acrylic resin (saniolated rli, 2C).
B-1)/Butyl carpitol acetate (1/3 part) of the vehicle and an appropriate amount of silicone resin (Shin-Etsu Chemical: X-62-7411) were added and kneaded at room temperature using three rolls. did.

これに更にブチルカルピトールアセテートを加えてスク
リーン印刷に好適な粘度約2000cpsの導体ペース
トを調製した。
Butylcarpitol acetate was further added to this to prepare a conductive paste with a viscosity of about 2000 cps suitable for screen printing.

なお、粘度の測定は、ブルックフィールド回転式粘度計
により、回転数10rpm、温度25℃で行なった。
The viscosity was measured using a Brookfield rotational viscometer at a rotational speed of 10 rpm and a temperature of 25°C.

次に、表面粗さ0.2  μm以下のグレーズ層を設け
たアルミナ基板上に前記導体ペーストをフレキソ印刷法
によって塗布し、120℃、10分乾燥した。
Next, the conductor paste was applied by flexographic printing onto an alumina substrate provided with a glaze layer having a surface roughness of 0.2 μm or less, and dried at 120° C. for 10 minutes.

前記印刷工程を2回繰返した後、連続ベルト式焼成炉を
用いて、窒素雰囲気中で900℃、10分間焼成した。
After repeating the printing process twice, it was fired at 900° C. for 10 minutes in a nitrogen atmosphere using a continuous belt firing furnace.

焼成後、SEM顕微鏡による表面観察と、はんだ浴浸漬
(230℃、5秒間)によるはんだの濡れ性を評価した
After baking, the surface was observed using a SEM microscope, and the wettability of the solder was evaluated by immersion in a solder bath (230° C., 5 seconds).

なお、焼成後の本実施例の導電層の厚さは約4μmであ
った。
Note that the thickness of the conductive layer of this example after firing was about 4 μm.

前記表面a祭による「虫食い状欠陥の有無」と、「はん
だ濡れ性」の結果を第1表に示す。
Table 1 shows the results of the "presence or absence of moth-eaten defects" and "solder wettability" determined by the surface a test.

第  1 表 第1表から明らかなように、シリコーンレジンの添加量
0.1  部以下のものは、虫食い状欠陥の発生が認め
られた。
Table 1 As is clear from Table 1, when the amount of silicone resin added was 0.1 part or less, occurrence of moth-eaten defects was observed.

また、4.0 部以上添加したものにおいては、はんだ
濡れ性がよくない。
Furthermore, if 4.0 parts or more is added, the solder wettability is poor.

また、虫食い状欠陥の発生がなく、はんだ濡れ性におい
てもすぐれているNo、3.No、4およびN o 、
 5 の各試料は、セラミック基板と銅導電層との接着
強度においても良好であることが分かった・ 〔実施例 2〕 実施例1の試料N004の銅導電層の表面に感光性レジ
スト(シュプレイ ファ イースト社:S+1IPLE
Y FAREAST Co、 : A Z −1300
−31)を回転塗布法によって塗布し、90℃、30分
乾燥した。
In addition, No. 3 has no occurrence of moth-eaten defects and has excellent solder wettability. No, 4 and No,
It was found that each of the samples in Example 5 had good adhesion strength between the ceramic substrate and the copper conductive layer. [Example 2] A photosensitive resist (Spray Fiber) was applied to the surface of the copper conductive layer of sample N004 of Example 1. East Company: S+1IPLE
Y FAREST Co.: AZ-1300
-31) was applied by a spin coating method and dried at 90°C for 30 minutes.

次に、該レジスト上にフォトマスクを重ね、紫外光を照
射してパターンニングし、2分間現像(シュプレイ フ
ァ イースト社:MF−TM312)処理した。水洗、
乾燥した後120℃。
Next, a photomask was placed on the resist, patterned by irradiation with ultraviolet light, and developed for 2 minutes (Spree Far East: MF-TM312). washing with water,
120℃ after drying.

20分のベーキングによってレジストを硬化し、アルゴ
ンイオンビームによるイオンミリング、およびよう素/
よう化カリ水溶液によるケミカルエツチングによって、
回路不要部の銅導体を除去し導電回路を形成した。
The resist was hardened by baking for 20 minutes, ion milling with an argon ion beam, and iodine/
By chemical etching with potassium iodide aqueous solution,
A conductive circuit was formed by removing the copper conductor from unnecessary parts of the circuit.

次いで、アセトンで上記レジストを除去する一連の工程
によって、最小線幅、線間がともに40μmの銅導電回
路を得た。
Next, through a series of steps of removing the resist with acetone, a copper conductive circuit having a minimum line width and line spacing of 40 μm was obtained.

該回路導体には、断線等の欠陥は認められなかった・ 〔実施例 3〕 実施例1の試料No、1  の導体ペーストを用いて、
前記実施例1と同様の条件により導11Mを形成した。
No defects such as disconnection were observed in the circuit conductor. [Example 3] Using the conductor paste of sample No. 1 of Example 1,
A conductor 11M was formed under the same conditions as in Example 1.

但し、焼成時に、シリコーンレジンを適量載置したセラ
ミック基板を焼成炉内に置いて導’U−を形成するセラ
ミック基板と一緒に加熱することにより、ジメチルシロ
キサンが約50,100゜200.400.1000お
よび2000ppm含む雰囲気を形成しその中で焼成し
て、厚さ約4μmの導電層を形成した。
However, during firing, by placing a ceramic substrate on which an appropriate amount of silicone resin is placed in a firing furnace and heating it together with the ceramic substrate forming the conductive 'U-', dimethylsiloxane is heated to about 50,100°200.400°. An atmosphere containing 1,000 and 2,000 ppm was created and fired in the atmosphere to form a conductive layer with a thickness of about 4 μm.

なお、上記ジメチルシロキサンおよび雰vB気中の含有
量は、ガスマススペクトル並びにガスクロマトグラフに
よって測定した。
Note that the content of the dimethylsiloxane and the content in the atmosphere VB was measured by gas mass spectrometry and gas chromatography.

上記において、100〜11000ppのものにおいて
は上記欠陥は認められなかった。一方、約50ppmお
よび2000ppm(7)ジメチルシロキサンを含む雰
囲気中で焼成したものは、導電層に前記の虫食い状欠陥
が発生していた。
In the above, the above-mentioned defects were not observed in those having a concentration of 100 to 11,000 pp. On the other hand, those fired in an atmosphere containing about 50 ppm and 2000 ppm (7) dimethylsiloxane had the above-mentioned moth-eaten defects in the conductive layer.

なお、上記雰囲気中のジメチルシロキサン量としは、2
00〜11000pp範囲がより好まし〔発明の効果〕 本発明の導電性組成物は、焼成時の金属粒子の過剰な凝
集を抑制する効果があり、高精細な導体回路を容易に形
成することができる。また、該回路基板を用いることに
よって電子部品の小型化、高密度化を図ることができる
In addition, the amount of dimethylsiloxane in the above atmosphere is 2
A range of 00 to 11,000 pp is more preferable [Effects of the Invention] The conductive composition of the present invention has the effect of suppressing excessive aggregation of metal particles during firing, and can easily form a high-definition conductor circuit. can. Further, by using the circuit board, it is possible to miniaturize and increase the density of electronic components.

Claims (3)

【特許請求の範囲】[Claims] 1. 金属粉末、バインダ、有機溶媒を含む組成物に、
焼成時の加熱により焼成雰囲気中にジメチルシロキサン
を100ppm以上生成する物質を含むことを特徴とす
る導電性組成物。
1. A composition containing a metal powder, a binder, and an organic solvent,
A conductive composition comprising a substance that generates 100 ppm or more of dimethylsiloxane in a firing atmosphere when heated during firing.
2. 金属粉末、バインダ、有機溶媒を含む組成物10
0重量部に対し、 シリコーンレジン0.2〜4重量部含むことを特徴とす
る導電性組成物。
2. Composition 10 containing metal powder, binder, and organic solvent
An electrically conductive composition comprising 0.2 to 4 parts by weight of silicone resin per 0 parts by weight.
3. セラミック基板上に導電性ペーストによる回路パ
ターンを形成し、焼成炉で焼成する導電回路の製法にお
いて、 前記焼成炉内の雰囲気が、100ppm以上のジメチル
シロキサンを含むことを特徴とする導電回路の製法。
3. A method for manufacturing a conductive circuit, comprising forming a circuit pattern using a conductive paste on a ceramic substrate and firing it in a firing furnace, wherein the atmosphere in the firing furnace contains 100 ppm or more of dimethylsiloxane.
JP20432089A 1989-08-07 1989-08-07 Manufacture of conducting composition material and conducting circuit Pending JPH0367404A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20432089A JPH0367404A (en) 1989-08-07 1989-08-07 Manufacture of conducting composition material and conducting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20432089A JPH0367404A (en) 1989-08-07 1989-08-07 Manufacture of conducting composition material and conducting circuit

Publications (1)

Publication Number Publication Date
JPH0367404A true JPH0367404A (en) 1991-03-22

Family

ID=16488535

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20432089A Pending JPH0367404A (en) 1989-08-07 1989-08-07 Manufacture of conducting composition material and conducting circuit

Country Status (1)

Country Link
JP (1) JPH0367404A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06243716A (en) * 1993-02-16 1994-09-02 Kyocera Corp Copper paste

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06243716A (en) * 1993-02-16 1994-09-02 Kyocera Corp Copper paste

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