JPH0366854B2 - - Google Patents

Info

Publication number
JPH0366854B2
JPH0366854B2 JP4985885A JP4985885A JPH0366854B2 JP H0366854 B2 JPH0366854 B2 JP H0366854B2 JP 4985885 A JP4985885 A JP 4985885A JP 4985885 A JP4985885 A JP 4985885A JP H0366854 B2 JPH0366854 B2 JP H0366854B2
Authority
JP
Japan
Prior art keywords
prediction
circuit
output
difference
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4985885A
Other languages
Japanese (ja)
Other versions
JPS61208924A (en
Inventor
Norio Suzuki
Tadashi Ishii
Masakazu Aritome
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4985885A priority Critical patent/JPS61208924A/en
Publication of JPS61208924A publication Critical patent/JPS61208924A/en
Publication of JPH0366854B2 publication Critical patent/JPH0366854B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はテレビ信号や音声信号等の情報を符号
化する装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an apparatus for encoding information such as television signals and audio signals.

〔従来の技術〕[Conventional technology]

テレビ信号や音声信号は信号自体多くの冗長成
分を含んでおり、伝送情報量を減らすために、デ
ルタ変調やDPCM等の予測符号化により冗長度
抑圧が行われている。
Television signals and audio signals themselves contain many redundant components, and redundancy suppression is performed by predictive coding such as delta modulation and DPCM in order to reduce the amount of transmitted information.

この予測符号化装置は、第4図に示すように、
入力信号と予測回路出力との差をとる差回路22
と、差回路出力を量子化する量子化器25と、量
子化器出力から入力信号を予測回する予測回路2
6,27とから構成される。テレビ信号を符号化
する場合には、標本化周波数が10MHzと非常に高
いため、差分符号化のループ処理を100nsec近く
で処理する必要があり、各処理回路には高速動作
が要求される。
This predictive encoding device, as shown in FIG.
Difference circuit 22 that takes the difference between the input signal and the prediction circuit output
, a quantizer 25 that quantizes the difference circuit output, and a prediction circuit 2 that predicts the input signal from the quantizer output.
It consists of 6 and 27. When encoding television signals, the sampling frequency is extremely high at 10 MHz, so loop processing for differential encoding must be performed at nearly 100 nsec, and each processing circuit is required to operate at high speed.

一搬に、予測符号化による伝送情報量の抑圧、
つまり冗長度の抑圧の効果は予測回路の特性が入
力信号のスペクトラムに近ければ近い程大きくな
る。しかし、入力信号は、常に変化するため一つ
の予測特性ですべての入力信号に対して冗長度抑
圧の効果を最大にすることはむずかしい。そこで
複数個の予測特性をもつた予測回路を設け、常に
予測の一番当たる予測特性を選択し、冗長度抑圧
を大きくした適応予測符号化方式が提案されてい
る。この方式では、予測符号化のループ処理に予
測が一番当たつている予測器出力を見付け出して
切りかえる処理が増える。
One important step is to suppress the amount of transmitted information through predictive coding.
In other words, the effect of redundancy suppression becomes greater as the characteristics of the prediction circuit are closer to the spectrum of the input signal. However, since input signals constantly change, it is difficult to maximize the redundancy suppression effect for all input signals using one prediction characteristic. Therefore, an adaptive predictive coding method has been proposed in which a prediction circuit having a plurality of prediction characteristics is provided, the prediction characteristic that gives the most accurate prediction is always selected, and redundancy suppression is increased. In this method, the process of finding and switching to the predictor output with the best prediction accuracy is increased in the predictive coding loop process.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような適応予測符号化方式をテレビ信号に
適用する場合には高速の素子が必要になり実現が
むずかしいという問題がある。
When applying such an adaptive predictive coding method to a television signal, there is a problem in that it requires a high-speed element and is difficult to implement.

本発明の目的は予測符号化装置の予測特性に複
数個の予測特性を設け、適応的に切りかえる適応
予測を適用したときに、予測符号化のループの処
理時間の増加を最小に抑え、動作の安定な予測符
号化装置を実現することにある。
An object of the present invention is to provide a plurality of predictive characteristics in a predictive encoding device, and when applying adaptive prediction that can be switched adaptively, to minimize the increase in processing time of the predictive encoding loop, and to improve operation efficiency. The objective is to realize a stable predictive coding device.

〔問題点を解決するための手段〕[Means for solving problems]

上述の欠点を解決するために、本発明では入力
信号と複数個の予測回路出力との差をとる複数個
の差回路と、差回路出力の中の一つを選択信号に
より選択する切替器Aと、切替器Aの出力を量子
化する量子化器と、複数個の予測回路出力の一つ
を選択信号により選択する切替器Bと、その出力
の量子化器出力とを加算する加算回路と、その出
力より入力信号を予測する複数個の予測回路と複
数個の予測回路出力を与えられたアルゴリズムで
分析し、最適な予測回路出力を決定し前記選択信
号を出力する分析器とを備え、分析器と複数個の
差回路の処理時間を並行させて、分析器の処理時
間の増加をできるだけ少なくしている。
In order to solve the above-mentioned drawbacks, the present invention includes a plurality of difference circuits that take the difference between an input signal and a plurality of prediction circuit outputs, and a switch A that selects one of the difference circuit outputs by a selection signal. , a quantizer that quantizes the output of the switch A, a switch B that selects one of the plurality of prediction circuit outputs using a selection signal, and an adder circuit that adds the output of the quantizer output. , comprising a plurality of prediction circuits that predict input signals from their outputs, and an analyzer that analyzes the outputs of the plurality of prediction circuits using a given algorithm, determines an optimal prediction circuit output, and outputs the selected signal, The processing time of the analyzer and a plurality of difference circuits are parallelized to minimize the increase in the processing time of the analyzer.

〔実施例〕〔Example〕

次に図面を参照して本発明を詳細に説明する。 Next, the present invention will be explained in detail with reference to the drawings.

第1図に本発明による実施例であるカラーテレ
ビ信号用予測符号化装置の構成を、第2図に予測
符号化の構成を示す。
FIG. 1 shows the configuration of a predictive encoding device for color television signals according to an embodiment of the present invention, and FIG. 2 shows the configuration of predictive encoding.

第1図において、端子1からカラーテレビ信号
はA/D変換器2で標本化周波数10.7MHzで標本
化及び量子化され、PCM信号に変換されたのち
予測符号器3で予測符号化され、端子4より伝送
路へ送出される。第2図において、端子21から
の入力カラーテレビ信号は予測回路26,27の
出力との差が差回路22,23でとられ、切替器
24で、分析器28の選択信号により、差回路2
2または23の出力のいずれかが選択され、量子
化器25により量子化され、端子9より伝送路へ
送りだされる。切替器30は予測回路26,27
の出力の一つが選択信号により選択され、加算回
路31で量子化器25の出力と加算される。加算
回路31の出力(局部復号信号)は予測回路2
6,27で各各入力信号に対して予測し、差回路
22,23に入力する。分析器28は、入力信号
と各予測回路との差を求め、その差の絶対値の少
ない予測回路出力を選択する。
In FIG. 1, a color television signal from a terminal 1 is sampled and quantized at a sampling frequency of 10.7MHz by an A/D converter 2, converted to a PCM signal, predictively encoded by a predictive encoder 3, and then sent to a terminal. 4 to the transmission path. In FIG. 2, the difference between the input color television signal from the terminal 21 and the outputs of the prediction circuits 26 and 27 is taken by the difference circuits 22 and 23, and the difference between the input color television signal from the terminal 21 and the outputs of the prediction circuits 26 and 27 is taken by the difference circuits 22 and 23.
Either of the outputs 2 or 23 is selected, quantized by the quantizer 25, and sent out from the terminal 9 to the transmission line. The switch 30 is the prediction circuit 26, 27
One of the outputs is selected by the selection signal and added to the output of the quantizer 25 in the adder circuit 31. The output (locally decoded signal) of the adder circuit 31 is sent to the prediction circuit 2
6 and 27, each input signal is predicted and input to difference circuits 22 and 23. The analyzer 28 calculates the difference between the input signal and each prediction circuit, and selects the prediction circuit output whose absolute value of the difference is small.

(1),(2)式に予測回路26,27の予測特性を示
す。
Equations (1) and (2) show the prediction characteristics of the prediction circuits 26 and 27.

H1(z)=0.5・z-1+z-3−0.5・z-4 ……(1) H2(z)=z-2H ……(2) 上式においてz-1は1標本化周期の遅延を示し、
z-2Hは、2走査線分の遅延を示す。
H 1 (z)=0.5・z -1 +z -3 −0.5・z -4 ...(1) H 2 (z)=z -2H ...(2) In the above equation, z -1 is one sampling period shows the delay of
z -2H indicates a delay of two scan lines.

(1)式は、同一走査線上の標本点に基づく予測で
あり、(2)式は2ライン前の標本点に基づく予測で
垂直方向の相関の高い画像に対してよく予測があ
たる。第3図には、符号化ループの加算,予測,
分析,切替,差処理,量子化の各処理時間を示し
ている。第3図において、(a)は第4図に示す従来
の予測回路における差分符号化ループの処理時間
を示し、(b)は本発明による予測回路による差分符
号化ループの処理時間を示している。第3図(b)よ
り明らかなように、本発明の構成では分析処理及
び差処理が重複して行われるため、従来の構成に
比べ重複の時間分(本実施例では差処理時間分約
24nsec)だけ処理時間が短くなることがわかる。
Equation (1) is a prediction based on sample points on the same scanning line, and Equation (2) is a prediction based on sample points two lines before, and the prediction is accurate for images with high correlation in the vertical direction. Figure 3 shows the addition, prediction, and
The processing times for analysis, switching, difference processing, and quantization are shown. In FIG. 3, (a) shows the processing time of the differential encoding loop in the conventional prediction circuit shown in FIG. 4, and (b) shows the processing time of the differential encoding loop in the prediction circuit according to the present invention. . As is clear from FIG. 3(b), in the configuration of the present invention, analysis processing and difference processing are performed redundantly, so compared to the conventional configuration, the overlapped time (in this embodiment, the difference processing time is approximately
It can be seen that the processing time is reduced by 24nsec).

〔発明の効果〕〔Effect of the invention〕

以上、本発明では、差分符号化ループの処理時
間を短縮できるため、ループの処理時間にタイミ
ングマージンを与えられ、処理の安定化が計れ
る。また、従来の低速素子が使えるため、ローパ
ワー化が計れる。更に、標本化周波数が高い方式
では、現存の素子での装置の実現の可能性がでて
きた等の効果がある。なお、本発明では、予測回
路,差回路が二つの場合について説明したが、こ
れらの数又は特性に限定されない。又、分析の方
法についても実施例に示す方法に限定されず、一
標本化前の時刻において各々の予測回路出力と局
部復号信号の差の絶対値が小さかつた予測回路か
ら出力される予測信号を現在の予測信号として選
択する方法、一標本化前の選択された予測回路出
力と現在の各予測回路出力との差の絶対値の小さ
い方を選ぶ方法等の色々な方法が考えられる。
又、量子化器はなくてスルーであつてもよい。
As described above, according to the present invention, since the processing time of the differential encoding loop can be shortened, a timing margin can be given to the loop processing time, and the processing can be stabilized. Additionally, since conventional low-speed elements can be used, low power can be achieved. Furthermore, the system with a high sampling frequency has advantages such as the possibility of realizing a device using existing elements. Although the present invention has been described with reference to the case where there are two prediction circuits and two difference circuits, the present invention is not limited to these numbers or characteristics. Further, the analysis method is not limited to the method shown in the embodiment, and the prediction signal output from the prediction circuit whose absolute value of the difference between each prediction circuit output and the local decoded signal is small at the time before one sampling. Various methods can be considered, such as selecting the current prediction signal as the current prediction signal, and selecting the one with the smaller absolute value of the difference between the selected prediction circuit output before sampling and the current output of each prediction circuit.
Alternatively, the quantizer may be omitted and the quantizer may be passed through.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例であるカラーテレビ
信号用の予測符号化装置の構成を示すブロツク
図、第2図は予測符号化回路の構成を示すブロツ
ク図、第3図は符号化ループの処理時間を示す
図、及び第4図は従来の予測符号化回路の構成を
示すブロツク図である。 第1図及び第2図において、1……入力端子、
2……A/D変換器、3……予測符号化回路、4
……出力端子、21……入力端子、22,23…
…差回路、24……切替器、25……量子化器、
26,27……予測回路、28……分析器、29
………出力端子、30……切替器B、31……加
算回路、を示す。
FIG. 1 is a block diagram showing the configuration of a predictive encoding device for color television signals which is an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a predictive encoding circuit, and FIG. 3 is a coding loop. FIG. 4 is a block diagram showing the configuration of a conventional predictive encoding circuit. In FIG. 1 and FIG. 2, 1...input terminal;
2... A/D converter, 3... Predictive encoding circuit, 4
...Output terminal, 21...Input terminal, 22, 23...
... difference circuit, 24 ... switch, 25 ... quantizer,
26, 27... Prediction circuit, 28... Analyzer, 29
. . . output terminal, 30 . . . switch B, 31 . . . adder circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 入力信号と複数個の予測回路出力との差をと
る複数個の差回路と、この差回路出力の中の一つ
を選択信号により選択する第一の切替器と、この
第1の切替器の出力を量子化する量子化器と、前
記複数個の予測回路出力の一つを前記選択信号に
より選択する第2の切替器とこの第2の切替器の
出力と前記量子化器出力とを加算する加算回路
と、この加算回路出力より前記入力信号を予測す
る複数個の予測回路と、前記複数個の予測回路出
力を分析し最適な予測回路出力を決定して前記選
択信号として出力する分析器とから構成され、前
記分析器と前記複数個の差回路の処理時間を並行
させたことを特徴とする予測符号化装置。
1. A plurality of difference circuits that take differences between an input signal and a plurality of prediction circuit outputs, a first switch that selects one of the difference circuit outputs by a selection signal, and this first switch. a quantizer that quantizes the output of the prediction circuit; a second switch that selects one of the plurality of prediction circuit outputs according to the selection signal; and an output of the second switch that quantizes the output of the quantizer; an adding circuit for adding, a plurality of prediction circuits for predicting the input signal from the output of the addition circuit, and an analysis for analyzing the outputs of the plurality of prediction circuits to determine an optimal prediction circuit output and outputting it as the selection signal. What is claimed is: 1. A predictive encoding device comprising: a predictive coding device, wherein the processing times of the analyzer and the plurality of difference circuits are made parallel to each other.
JP4985885A 1985-03-13 1985-03-13 Forecast coding device Granted JPS61208924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4985885A JPS61208924A (en) 1985-03-13 1985-03-13 Forecast coding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4985885A JPS61208924A (en) 1985-03-13 1985-03-13 Forecast coding device

Publications (2)

Publication Number Publication Date
JPS61208924A JPS61208924A (en) 1986-09-17
JPH0366854B2 true JPH0366854B2 (en) 1991-10-18

Family

ID=12842746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4985885A Granted JPS61208924A (en) 1985-03-13 1985-03-13 Forecast coding device

Country Status (1)

Country Link
JP (1) JPS61208924A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0793584B2 (en) * 1987-09-25 1995-10-09 株式会社日立製作所 Encoder
JPH082027B2 (en) * 1988-09-09 1996-01-10 日本電気株式会社 Predictive coding device

Also Published As

Publication number Publication date
JPS61208924A (en) 1986-09-17

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